TITLE OF THE INVENTION Power Conversion Apparatus FIELD OF THE INVENTION 5 [0001] The present invention relates to a power conversion apparatus, and particularly to a power conversion apparatus having semiconductor switching elements. 10 BACKGROUND OF THE INVENTION [0002] As a related art power conversion apparatus capable of suppressing a switching surge, there has been known one shown in “Japanese Unexamined Patent Publication Laid-Open No. 15 2010-41790”, hereinafter referred to as “Patent Document 1”. This power conversion apparatus is equipped with a DC power supply line, a DC intermediate capacitor, and an inverter. Of these, the DC power supply line is connected to an output terminal of a converter that outputs a DC voltage. The 20 DC intermediate capacitor is an element that smoothes and stabilizes the DC voltage outputted from the converter. The DC intermediate capacitor is connected to the DC power supply line. The inverter is a circuit that converts the DC power supply voltage smoothed by the DC intermediate capacitor to 25 a three-phase AC voltage. The inverter is connected to the 3 DC power supply line. [0003] Further, the power conversion apparatus is equipped with a capacitor connected in parallel with the DC power supply line. An LC resonant circuit is configured by the capacitor 5 and the inductance of the DC power supply line. This LC resonant circuit is capable of suppressing a switching surge generated with the switching of the inverter. [0005] 10 The power conversion apparatus of the Patent Document 1 needs to prepare a capacitor separately besides the DC intermediate capacitor in order to suppress the switching surge. In addition, this capacitor needs to be one having a large capacitance to absorb an electrical charge generated by a surge 15 phenomenon. [0006] Further, while wiring inductances Ls1 and Ls2 are clearly shown in FIG. 8 of the Patent Document 1 as an equivalent circuit, the wiring inductances of an actual power conversion circuit 20 are distributedly generated and besides its effective inductance is hard to be grasped under the influence of a current flowing through nearby other wiring. Thus, as described in the Patent Document 1, it is difficult to clearly grasp the wiring inductance and configure a desired parallel resonant 25 circuit using capacitors to be provided separately. 4 [0007] Further, when steep switching (switching at high dV/dt and di/dt) is performed, the influence of an ignored small parasitic inductance becomes remarkable at the conventional low di/dt. Therefore, it is not possible for a large-5 capacity and large-sized capacitor to ignore the influence of parasitic inductances generated in its lead wires and terminals or the like, thus creating a vicious circle that brings about a new surge phenomenon. 10 [0008] Thus, in order to suppress the switching surge, there is generally provided as described in FIG. 9 of the Patent Document 1, a countermeasure method for connecting in parallel with a switching element, a snubber circuit in which a capacitor 15 Cs is series-connected to a parallel circuit comprised of a snubber diode Ds and a snubber resistor Rs. [0009] However, the above capacitor Cs also causes a wiring inductance so that a surge voltage and a voltage resonant 20 vibration continuous with it are generated in an inter-terminal voltage of the switching element (e.g., between its drain and source). [0010] Such a resonant phenomenon can be attributed mainly to 25 the snubber circuit added for the switching surge control, the 5 parasitic inductance of a power module storing switching elements therein, the parasitic capacitance of the switching element, etc. A measure is required separately to suppress radiation noise and conduction noise generated by this 5 resonance. [0011] Particularly at the time of turning-off in the switching operations of the power conversion apparatus, a surge peak voltage is generated and thereafter a surge voltage vibration 10 caused by the resonant impedance of a path having a current change continues. When switching is steep although the suppression by the snubber circuit has heretofore been performed, a high frequency resonance of a few tens of MHz or higher is generated due to the parasitic L in the snubber circuit, the 15 parasitic capacitance of the module, and the like. SUMMARY OF THE INVENTION [0012] The present invention has been devised to solve the above 20 problems. An object of the present invention is to rapidly realize convergence of a resonant vibration and reduce the power level of a harmonic wave as radiation noise due to the resonant vibration in a power conversion apparatus having semiconductor switching elements. 25 6 [0013] Therefore, there is provided a power conversion apparatus of the present invention, which is configured by connecting a smoothing capacitor circuit, a first series circuit comprised of switching elements and a second series 5 circuit comprised of snubber circuits in parallel with a DC power supply, and connecting between a connecting point of the switching elements of the first series circuit and a connecting point of the snubber circuits of the second series circuit, wherein a 10 compensation-impedance circuit configured by connecting a second capacitor in series with a parallel circuit of a first capacitor and a reactance is connected in parallel with the DC power supply. [0014] 15 According to the present invention, it is possible to provide a power conversion apparatus capable of suppressing a surge voltage vibration generated with switching. BRIEF DESCRIPTION OF THE DRAWINGS 20 [0015] FIG. 1 is a diagram showing a configuration example of a power conversion apparatus according to a first embodiment; FIG. 2 is a diagram illustrating a mounting configuration of a compensation-impedance circuit 8 applicable to the first 25 embodiment; 7 FIG. 3 is a diagram showing the frequency dependence of impedance in the power conversion apparatus; FIG. 4 is a diagram illustrating a transient response waveform in a related art system using no compensation-5 impedance; FIG. 5 is a diagram illustrating a transient response waveform in the present invention system using the compensation-impedance; FIG, 6 is a diagram depicting an FFT analysis result 10 of a drain-source voltage VDS in each of FIGS. 4 and 5; FIG. 7 is a diagram showing a configuration example of a power conversion apparatus according to a second embodiment; and FIG. 8 is a diagram illustrating a configuration example 15 of a power conversion apparatus according to a third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0016] In the present invention, there are provided means for 20 in consideration of the frequency characteristics of an impedance increased at a resonant frequency, reducing the value of the impedance and dispersing the frequency characteristics to a plurality of frequencies, and means for suppressing a surge voltage vibration. 25 [0017] 8 One example of a plurality of the inventions that solves the above problems is taken as follows: There is provided a power conversion apparatus of the present invention, which is configured by connecting a smoothing capacitor circuit, a first series circuit comprised of switching elements and 5 a second series circuit comprised of snubber circuits in parallel with a DC power supply, and connecting between a connecting point of the switching elements of the first series circuit and a connecting point of the snubber circuits of the second series 10 circuit, wherein a compensation-impedance circuit configured by connecting a second capacitor in series with a parallel circuit of a first capacitor and a reactance is connected in parallel with the DC power supply. [0018] 15 Here, for example, the frequency characteristics of impedance between an input and an output of the compensation-impedance circuit may be configured to have at least one or more pole frequencies and one or more zero point frequencies. 20 [0019] Further, the pole frequencies and the zero point frequencies of the compensation-impedance circuit may be configured in such a manner that one of the zero point frequencies is arranged on a low frequency side, and one of the pole 25 frequencies is arranged on a high frequency side with respect 9 to a resonant frequency included in a surge voltage vibration generated with switching of the power conversion apparatus. [0020] In these respective configurations, further, the first series circuit comprised of the switching elements may c5 onfigure a module, and the compensation-impedance circuit may be configured to be connected between a positive power supply terminal and a negative power supply terminal of the module. [0021] 10 Also, likewise, in the respective configurations, further, the first series circuit comprised of the switching elements may configure a module equipped with a positive power supply terminal and a negative power supply terminal. Furthermore, the compensation-impedance circuit may be 15 configured to be connected between the vicinity of a drain of the switching element that configures an upper arm and the vicinity of a source of the switching element that configures a lower arm. [0022] 20 A more specific configuration of a power conversion apparatus of the present invention is, for example, a power conversion apparatus having a DC power supply, a smoothing capacitor connected to the DC power supply through wirings, a power semiconductor module connected to the smoothing 25 capacitor through a positive power supply bus-bar and a negative 10 power supply bus-bar, a gate drive control circuit connected to the power semiconductor module, an inductive load connected to an intermediate output terminal of the power semiconductor module, snubber circuits connected between a positive power supply terminal of the power semiconductor module 5 and the intermediate output terminal and between a negative power supply terminal and the intermediate output terminal, and a compensation-impedance circuit connected to the positive power supply terminal and the negative power supply terminal of the 10 power semiconductor module. The compensation-impedance circuit has two terminals for input/output thereof. The frequency characteristics of impedance between the input and output of the compensation-impedance circuit have at least one or more pole frequencies and one or more zero point frequencies. 15 With respect to a frequency to be suppressed of frequency components included in a surge voltage vibration generated with switching of the power conversion apparatus, one of the zero point frequencies is arranged on a low frequency side and one of the pole frequencies is arranged on a high frequency side, 20 whereby the amplitude of the surge voltage vibration of the power conversion apparatus is suppressed. [0023] Here, the compensation-impedance circuit may be configured by series-connecting one of terminals of a first 25 capacitor and one of terminals of a second capacitor, 11 parallel-connecting an inductance between the two terminals of the second capacitor, and providing the two terminals of the other of the terminals of the first capacitor and the other of the terminals of the second capacitor as the input and output terminals of the compensation-impedance circuit. T5 he frequency dependence of the impedance of the compensation-impedance circuit may be configured to be adjusted by adjusting at least any one of the capacitance of the first capacitor, the capacitance of the second capacitor and the 10 inductance in such a manner that one of the first zero point frequencies is arranged on a low frequency side and one of the first pole frequencies is arranged on a high frequency side. [0024] Further, the compensation-impedance circuit may be 15 comprised of a plurality of conductors that interpose an insulating substrate therebetween. The first capacitor may be configured between a first conductor and a second conductor of the conductors. The second capacitor may be configured between the first conductor and a third conductor of the 20 conductors. The inductance may be configured by the third conductor. Two connecting terminals connected to the second and third conductors respectively may be configured to be connected to the positive power supply terminal and the negative power supply terminal of the power semiconductor module. 25 [0025] 12 Furthermore, the compensation-impedance circuit may be configured to be capable of changing at least either one of the capacitance of the first capacitor and the capacitance of the second capacitor by separating a part of at least either one conductor pattern of the second conductor and the 5 he third conductor. The change in at least either one of the capacitance of the first capacitor and the capacitance of the second capacitor may be configured in such a manner that the suppression of the amplitude of the surge voltage vibration of the power 10 conversion apparatus is maximized. [0026] Another more specific configuration of a power conversion apparatus of the present invention is, for example, a power conversion apparatus having a DC power supply, a smoothing 15 capacitor connected to the DC power supply through wirings, a power semiconductor module connected to the smoothing capacitor through a positive power supply bus-bar and a negative power supply bus-bar, a gate drive control circuit connected to the power semiconductor module, an inductive load connected 20 to an intermediate output terminal of the power semiconductor module, snubber circuits connected between a positive power supply terminal of the power semiconductor module and the intermediate output terminal and between a negative power supply terminal and the intermediate output terminal, and a 25 compensation-impedance circuit contained in the power 13 semiconductor module. The compensation-impedance circuit has two terminals for input/output thereof. The frequency characteristics of impedance between the input and output of the compensation-impedance circuit have at least one or more pole frequencies and one or more zero point frequencies. W5 ith respect to a frequency to be suppressed of frequency components included in a surge voltage vibration generated with switching of the power conversion apparatus, one of the zero point frequencies is arranged on a low frequency side and one of the 10 pole frequencies is arranged on a high frequency side, whereby the amplitude of the surge voltage vibration of the power conversion apparatus is suppressed. [0027] Here, the power semiconductor module may be configured 15 to have a main terminal on a positive power supply side, a main terminal on a negative power supply side, an intermediate output terminal and a first insulating substrate to which a group of the main terminals is connected. The compensation-impedance circuit may be configured to be connected to the first insulating 20 substrate. [0028] In these respective configurations, further, the power semiconductor module may be comprised of a plurality of conductors that interpose an insulating substrate therebetween. 25 The compensation-impedance circuit may be configured in such 14 a manner that a first conductor of the conductors configures a first parallel plate capacitor taking the insulating substrate as a dielectric between the first conductor and a second conductor of the conductors, a third conductor of the conductors configures a second parallel plate capacitor taking 5 ing the insulating substrate as a dielectric between the third conductor and the second conductor, and a meander-like pattern generating an inductance is formed in a part of the third conductor and further that one end of the meander-like pattern is connected 10 to the second conductor by a first viahole group, and the first conductor and the third conductor are respectively provided as an input terminal and an output terminal. The first conductor may be configured to be connected to a fourth conductor of the conductors, the third conductor may be configured to be connected 15 to a fifth conductor of the conductors, and the fourth conductor and the fifth conductor may respectively be configured to be connected to a main terminal for the positive power supply terminal and a main terminal for the negative power supply terminal and may respectively be configured to be connected 20 to the positive power supply terminal and the negative power supply terminal of the power semiconductor module. The fourth conductor may be configured to be connected to a drain of a first switching element chip and a cathode of a free wheeling diode chip, and a sixth conductor of the conductors may be 25 configured to be connected to a gate terminal of the first 15 switching element chip through a bonding wire. A seventh conductor of the conductors may be configured to be connected to a source of the first switching element chip and an anode of the free wheeling diode chip through bonding wires and connected to a drain of a second switching element 5 chip and a cathode of a free wheeling diode chip, and further the seventh conductor may be configured to be connected to a main terminal for an intermediate terminal of the power semiconductor module. An eighth conductor of the conductors may be configured to be 10 connected to a gate terminal of the second switching element chip through a bonding wire. A ninth conductor of the conductors may be configured to be connected to a source of the second switching element chip and the anode of the free wheeling diode chip through bonding wires, and connected to a tenth conductor 15 being a rear side conductor of the conductors through a second viahole group. The tenth conductor may be configured to be connected to the fifth conductor through a third viahole group. The compensation-impedance circuit may be configured to be formed on a mixed substrate common to the power semiconductor 20 module. [0029] Also, in these respective configurations, further, an insulation breakdown voltage between the input and output terminals of the compensation-impedance circuit may be 25 configured to be more than twice the DC power supply voltage 16 of the power conversion apparatus. [0030] Embodiments of the present invention will be described hereinafter using the accompanying drawings. 5 [First Embodiment] [0031] A first embodiment will describe an example of a power conversion apparatus 100 that suppresses vibrations in surge voltage. 10 [0032] A configuration diagram of the power conversion apparatus 100 according to the first embodiment is shown in FIG. 1. In FIG. 1, the power conversion apparatus 100 is comprised of a DC power supply 1, a smoothing capacitor 2, a 15 positive power supply bus-bar 3a, a negative power supply bus-bar 3b, a power semiconductor module 4, a gate drive control circuit 5, an inductive load 6, a snubber circuit 7, and a compensation-impedance circuit 8. [0033] 20 Of these, the DC power supply 1 is connected to both ends of the smoothing capacitor 2 through wirings 11a and 11b each including a parasitic resistance and a parasitic inductance. Incidentally, in the description which follows, the description of the parasitic resistance accompanying wiring will be omitted 25 unless otherwise required. This is because the parasitic 17 resistance and the parasitic inductance are generated in the wiring, but the value of the parasitic resistance is not principal in regard to the present invention. [0034] The smoothing capacitor 2 is comprised of 5 a parasitic inductance 22 generated in series with a main capacitor 21. [0035] The positive power supply bus-bar 3a and the negative power supply bus-bar 3b connect both ends of the smoothing 10 capacitor 2 to a positive power supply terminal 47 and a negative power supply terminal 48 of the power semiconductor module 4, but a wiring at each of such portions mainly functions as the inductance (parasitic inductance). [0036] 15 The power semiconductor module 4 has a configuration in which a switching element 41 and a free wheeling diode 43 are connected in reversely parallel to each other in an upper arm, and a switching element 42 and a free wheeling diode 44 are connected in reversely parallel to each other in a lower 20 arm. A point of connection between the upper and lower arms is an intermediate terminal 49. A gate drive terminal 4G1 and a source drive terminal 4S1 of the switching element 41 are connected to a gate driving circuit 5a. Further, a gate drive terminal 4G2 and a source drive terminal 4S2 of the switching 25 element 42 are connected to a gate driving circuit 5b. 18 Incidentally, it is needless to say that parasitic inductances 45a to 45e generated in main terminals and an insulating substrate that configure the power semiconductor module 4 are represented in FIG. 1, but it is not shown that inductance elements are directly wire-connected on an actual 5 circuit. [0037] The gate drive control circuit 5 is used to drive the switching elements 41 and 42 of the power semiconductor module 4. A gate drive signal therefor is generated inside the gate 10 drive control circuit 5. [0038] The inductive load 6 is connected as an output load of the power semiconductor module 4 and is, for example, a filter reactor for connecting to a motor, a power system network or 15 the like. In the present embodiment, a reference to the type of load will be omitted because it is not involved in the advantage of the invention. [0039] The snubber circuit 7 (7a, 7b) is shown using a discharge 20 block type RCD snubber circuit as an example. The snubber circuit 7a is connected between the positive power supply terminal 47 and the intermediate terminal 49 of the power semiconductor module 4, and the snubber circuit 7b is connected between the intermediate terminal 49 and the negative power 25 supply terminal 48 of the power semiconductor module 4, 19 respectively. The snubber circuit 7 (7a, 7b) is comprised of a snubber capacitor 71, a diode 72, and a resistor 73. Incidentally, in the illustration shown in the figure, the parasitic inductance in the snubber circuit 7 (7a, 7b) is represented as 74. This is also not intended to show 5 on an actual circuit that each inductance element is directly wire-connected. [0040] In the snubber circuit 7 (7a, 7b) having such a 10 configuration, the relatively large capacitance of the capacitor 71 is required to draw the energy accumulated in the parasitic inductance 74 into the capacitor 71 upon the generation of a switching surge when each of the switching elements 41 and 42 is turned off. In the case of steep switching in 15 particular, a switching surge due to the parasitic inductance 74 of the elements of the snubber circuit 7 is generated by being affected by the series parasitic inductance 74. [0041] The power conversion apparatus 100 according to the first 20 embodiment is one in which the compensation-impedance circuit 8 has been devised. The compensation-impedance circuit 8 is connected between the positive and negative power supply terminals 47 and 48 of the power semiconductor module 4 and is comprised of serially connected two capacitors 81 and 82, 25 and an inductor 83 connected in parallel with the capacitor 20 82. Incidentally, the inductor 83 is not a parasitic inductance, but an inductance element directly wire-connected on an actual circuit. [0042] The capacitances of the respective elements of t5 he capacitors 81 and 82 and the inductor 83 that configure the compensation-impedance circuit 8 are defined from the viewpoint of suppressing variations in surge voltage due to the switching surge. To this end, the dependence of their combined impedance 10 on the frequency is such that the values of the components are determined to have at least more than one of a zero point frequency (fcz) and a pole frequency (fcp) and to take the zero point frequency fcz