TITLE OF THE INVENTION }
Power converter FIELD OF THE INVENTION j
5 {0001} !
The present invention relates to a power converter,
and more particularly to a three-phase power converter
formed with three clusters, each of which is a series I
circuit including one or a plurality of unit cells.
10 i
BACKGROUND OF THE INVENTION I
{0002} t
A cascade multi-level converter (CMC) is a circuit t
system that can output voltages equal to or higher than j
15 the withstand voltages of switching elements used !
therein; the switching elements are, for example, j
insulated gate bipolar transistors (IGBTs) and other j
switching elements that can be turned on and off in a ;
controlled manner. According to NON-PATENT LITERATURE
20 (NPL) 1, the CMC is formed by star-connecting three series circuits, each of which is formed with a reactor I
and a cluster, the cluster being a series circuit I
formed with a plurality of unit cells. {0003} J
25 According to NPL 1, each unit cell is a singleI
^ !
- 3 - phase full bridge circuit; it has a plurality of
switching elements and a DC capacitor. The unit cell I
turns on and off the switching elements in a controlled
manner to output a voltage across the DC capacitor I
5 (referred to below as the DC voltage), a voltage with a
polarity opposite to the polarity of the DC voltage, or j
a zero-voltage. I
{0004} j
Since each cluster is a series circuit having one |
10 or a plurality of unit cells, the output voltage of the !
cluster (referred to below as the cluster voltage) is I
the output voltage of the one unit cell included in the t
cluster or the sum of the output voltages of the t
plurality of unit cells therein. When each cluster f
15 includes a plurality of unit cells, if the switching }
timing of each unit cell in the cluster is i
i
appropriately shifted, the cluster voltage can have a {
i
multi-level waveform. Accordingly, the harmonic i
component of the cluster voltage can be reduced by i
20 increasing the number of unit cells included in each I
cluster. 5
{0005} I
NPL 1 indicates experimental results of a CMC-based S
static var compensator (referred to below as the CMC- I
25 STATCOM), in which a CMC is linked to a power supply
i
I
I
- 4 - ;
system.
PRIOR TECHNICAL LITERATURE j
NON-PATENT LITERATURE (NPL)
5 {0006} !
NPL 1: Yoshii, Inoue, Akagi "Transuresu kasukedo PWM STATCOM no chokuryudenatsuseigyoho no kento (Zero- j
sequence voltage control of a cascade PWM converter i
with star-configuration)" lEE-SPC and lEE-IEA materials, i
10 SPC-07-115/IEA-07-38, pp. 32-36 j
SUMMARY OF THE INVENTION
{Technical Problem} ]
{0007} 15 When an arc furnace or another unbalanced load is
connected to a power supply system, a negative-phase sequence current flowing out of the unbalanced load
causes an unbalanced voltage drop in the impedance of
the power supply system. As a result, the voltage of a
20 power supply system (referred to below as the power j
supply system voltage) in the vicinity is unbalanced. f
{0008}
One method of suppressing the power supply system
voltage from being unbalanced by an unbalanced load is
25 to link a power converter in the vicinity of the
^— f
i
- 5 - I
unbalanced load and output a negative-phase sequence I
current having a phase opposite to the phase of the
negative-phase sequence current of the unbalanced load. I
{0009} [
5 However, NPL 1 discloses results of experiments in j
which the CMC-STATCOM output only positive-phase I
sequence reactive currents and does not disclose a I
circuit system and control method applied to a case in I
which negative-phase sequence currents are output. (
10 {Solution to Problem} I
{0010} i
When a CMC formed by star-connecting three clusters j
outputs a negative-phase sequence current, active f
electric power that flows into each cluster is f
15 unbalanced, so the DC voltage of each unit cell f
included in each cluster is continuously increased or I
decreased.
{0011} I
To address the above problem, the present invention
20 provides a solution described below. I
{0012} j
The present invention provides a power converter f
that has a delta-connected cascade multi-level
converter (CMC) linked to a power supply system, the
25 CMC being formed by delta-connecting series circuits, i
I
f
- 6 - {
each of which is formed with a reactor and a cluster,
the cluster being a series circuit formed with one or a
plurality of unit cells.
{0013}
5 In a power converter that has a delta-connected
cascade multi-level converter (CMC) linked to a power
supply system, the CMC being formed by delta-connecting
series circuits, each of which is formed with a reactor
and a cluster, the cluster being a series circuit j
10 formed with one or a plurality of unit cells, the
present invention provides a power converter that has a function by which a positive-phase sequence reactive i
current and a negative-phase sequence current caused by j
an unbalanced load linked to the power converter are }
15 substantially compensated by a positive-phase sequence
reactive current and a negative-phase sequence current
that are simultaneously output by the power converter.
{0014} I
In a power converter that has a delta-connected
20 cascade multi-level converter (CMC) linked to a power
supply system, the CMC being formed by delta-connecting
series circuits, each of which is formed with a reactor
and a cluster, the cluster being a series circuit
formed with one or a plurality of unit cells, the
25 present invention provides a power converter that has a
I
- 7 - function by which a voltage across a DC capacitor in
each cell is balanced. I
{0015} [
In a power converter that has a delta-connected |
5 cascade multi-level converter (CMC) linked to a power j
supply system, the CMC being formed by delta-connecting i
series circuits, each of which is formed with a reactor [
and a cluster, the cluster being a series circuit !
formed with one or a plurality of unit cells, the }
10 present invention provides a power converter that has a !
function by which if the phase angle of the positive- [
phase sequence component included in a voltage of the i
power supply system is denoted (|)1 and the negative- <
phase sequence current command value of the power I
15 converter or the root-mean-square value of an actual j
negative-phase sequence current and the phase angle of l
the current are respectively denoted 12 and 52, each |
cluster flows a circulating current having root-mean- !
square value 10 and phase angle 60, which are
20 represented by the equations below.
{Eq. 1} j
10 = 12 I
{Eq. 2} i
50 = 2 X (j)l - 52 ± 71 I
25 In a power converter that has a delta-connected j
I'
- 8 - I
cascade multi-level converter (CMC) linked to a power I
supply system, the CMC being formed by delta-connecting series circuits, each of which is formed with a reactor [
and a cluster, the cluster being a series circuit j
5 formed with one or a plurality of unit cells, the t
present invention provides a power converter i
characterized in that the power converter has a •
function by which if the root-mean-square value and j
phase angle of the positive-phase sequence component j
10 included in the voltage of the power supply system are (
respectively denoted VI and ^1, the root-mean-square f
value and phase angle of the negative-phase sequence J
component included in the voltage of the power supply {
system are respectively denoted V2 and (|)2, the command j
15 value of the current that flows into the cluster or the I
I
root-mean-square value of the positive-phase sequence |
component of an actual current and the phase angle of I
I'
the positive-phase sequence component are respectively i
denoted II and 51, and the root-mean-square value and I
20 phase angle of the negative-phase sequence component of I
the actual current are respectively denoted 12 and 52,
each cluster outputs a circulating current having rootmean-
square value 10 and phase angle 60, which are
substantially represented by the equations below. 25 {Eq. 3} I
i
- 9 - I
10 = -(II X V2 X cos (51 - (|)2) + 12 X VI X cos (52 - (|)1))/(V1 X cos (50 - (|)1) + V2 X cos (50 - ^2) ) *
{Eq. 4} I
50 = tan"^ ((II X V2 X (VI x sin (51 + (|)1 - (t)2) + V2 x j
5 sin(5l - 2 X (t)2)) - 12 x VI x (V2 x sin(52 + (t)2 - (|)1) + [
VI X sin(62 - 2 x <|)1)))/(I1 x V2 x (VI x cos (51 + 2) + V2 X cos (61 - 2 X (t)2)) - 12 x VI x (V2 x cos (52 - !
(1)2 + (|)1) - VI X cos (62 - 2 X 61)))) In a power converter that has a delta-connected F
10 cascade multi-level converter (CMC) linked to a power I
supply system, the CMC being formed by delta-connecting t
series circuits, each of which is formed with a reactor and a cluster, the cluster being a series circuit r
formed with one or a plurality of unit cells, the i
15 present invention also provides a power converter l
characterized in that moving average calculation in ;
which a half cycle of the frequency of the power supply system or its integer multiple is handled as a time window is used in the detection of VI, (|)1, V2, <|)2, II, ?
20 61, 12, and 52.
{Advantageous Effects of Invention}
{0016}
When the amplitude and phase of the circulating
current are controlled as in the present invention, the
25 voltage and current of each of the three clusters are
- 10 -
made orthogonal in a state in which a positive-phase
sequence reactive current and a negative-phase sequence ;
current are flowing simultaneously in each cluster.
Accordingly, active electric power does not flow into
5 each cluster. I
{0017} i
According to the present invention, therefore, a
positive-phase sequence reactive current from an
unbalanced current and a negative-phase sequence
10 current can be compensated by using a power converter
formed with three series circuits, each of which is [
formed with a reactor and a cluster, the cluster being a series circuit formed with one or a plurality of unit
i
cells. 15 I
BRIEF DESCRIPTION OF THE DRAWINGS |
{0018} ;
FIG. 1 shows is a main circuit diagram of a delta- ?
connected CMC-STATCOM.
20 FIG. 2 shows a unit cell of full bridge type. ;
FIG. 3 is a control block diagram.
FIG. 4 shows a compensating current command value
calculator.
FIG. 5 shows a feedforward calculator.
25 FIG. 6 shows a cluster balancing controller.
I
- 11 - i
FIG. 7 shows examples of waveforms in the present
invention.
FIG. 8 shows a negative-phase sequence voltage
ready feedforward calculator. i
5 FIG. 9 is a control block in which actual currents
are used. j
FIG. 10 shows a feedforward calculator that uses
actual currents. f
10 DESCRIPTION OF THE PREFERRED EMBODIMENTS
{0019}
Embodiments of the present invention will be
described below with reference to the drawings. i
{Embodiment 1} |
15 {0020} I
A first embodiment of the present invention will be {
described below. {0021} J
In the first embodiment, a positive-phase sequence
20 reactive current from an unbalanced current and a '{
negative-phase sequence current can be compensated by
using a power converter formed with three series I
circuits, each of which is formed with a reactor and a cluster, the cluster being a series circuit formed with 25 one or a plurality of unit cells.
{0022} f
4
- 12 - I
A whole structure in the first embodiment will be [
described below with reference to FIG. 1. I
{0023} i
A power converter 102 connected to a power supply [
5 system 101 includes three reactors 103, a uv-phase j
cluster 104, a vw-phase cluster 105, and a wu-phase J
i
cluster 106. In this description, the uv-, vw-, and wu- I
phase clusters 104 to 106 may not be distinguished but j
may be simply referred to as clusters. f
10 {0024} j
One reactor 103 is connected in series with each of j
the clusters 104 to 106. One end of a series circuit j
formed with the uv-phase cluster 104 and the reactor (
103 is connected to the u-phase of the power supply j
15 system, and the other end is connected to the v-phase. j
One end of a series circuit formed with the vw-phase I
cluster 105 and the reactor 103 is connected to the v- {
phase of the power supply system, and the other end is
connected to the w-phase. One end of a series circuit
20 formed with the wu-phase cluster 106 and the reactor
103 is connected to the w-phase of the power supply
system, and the other end is connected to the u-phase.
{0025}
Each of the clusters 104 to 106 is a series circuit
25 formed with one or a plurality of unit cells 107. In
- 13 - f
FIG. 1, N unit cells are connected in each cell. In the j
clusters 104 to 106, the unit cells are called a first cell, a second cell, and so on, starting from the unit [
I
cell closest to the reactor 103. The internal structure f
5 of the unit cell 107 will be described later. j
{0026} I
An unbalanced load 108 is connected to the power {
supply system 101. The unbalanced load 108 draws all of }
I
a positive-phase sequence active current, a positive- 10 phase sequence reactive current, and a negative-phase I
i
sequence current or a combination of these currents [
from the power supply system 101. f
f
{0027} [
Voltages and currents will be defined below. i
15 {0028} j
Phase voltages of the power supply system 101 are j
denoted VSu, VSv, and VSw. A point 0 is a virtual I
I
neutral point at which the sum of VSu, VSv, and VSw j
I
becomes 0. The line-to-line voltages of the power j
I
20 supply system 101 are denoted VSuv, VSvw, and VSwu. |
{0029} I
I
Currents that flow from the power supply system 101 f
into the power converter 102 are denoted lu, Iv, and Iw. |
Currents that flow into the reactors 103 and the I
25 clusters 104 to 106 are denoted luv, Ivw, and Iwu. f
- 14 -
{0030}
Output voltages (cluster voltages) from the
clusters 104 to 106 are denoted Vuv, Vvw, and Vwu. ;
{0031} i
5 Furthermore, a DC voltage of the unit cell included I
in each of the clusters 104 to 106 is denoted VCij (i = f
uv, vw, wu). If N unit cells 107 are included in each {
cluster, j is 1, 2, ..., or N. !
{0032} [
10 The internal structure of the unit cell 107 will be f
described below with reference to FIG. 2. FIG. 2 shows i-phase cell j (i = uv, vw, wu, j = 1, 2, ..., N) . i
{0033} I
The unit cell 107 is a single-phase full bridge !
15 circuit including an x-phase upper element 201, an x- i
i
phase lower element 202, a y-phase upper element 203, a
j
y-phase lower element 204, and a DC capacitor 205. The i
unit cell 107 controls the switching of the elements
201 to 204 to output voltage Vij at a point x, relative j
20 to a point y, that is set to 0, VCij, or -VCij.
{0034}
In FIG. 2, the elements 201 to 204 are each
represented with a symbol of an IGBT. However, they may
be gate turn-off thyristors (GTOs), gate-commutated
25 turn-off thyristors (GCTs), metal-oxide-semiconductor
- 15 - I
field-effect transistors (MOSFETs), or other types of !
switching elements that can be tuned on and off in a i
controlled manner, instead of IGBTs. j
{0035} j
5 Each of the clusters 104 to 106 shown in FIG. 1 is E
a series circuit including M unit cells 107, as [
described above. Therefore, each of cluster voltages f
Vuv, Vvw, and Vwu is the sum of output voltage Vij of M i
unit cells 107. These voltages can be represented as E
10 Vuv = Vuvl + Vuv2 + ... + VuvN, Vvw = Vvwl + Vvw2 + ... + I
VvwN, and Vwu = Vwul + Vwu2 + ... + VwuN. {0036} When the unit cells undergo pulse-width modulation j
j'
(PWM) control, therefore, the cluster voltages Vuv, Vvw, [
f
15 and Vwu can be controlled. I
f
{0037} 1
Unless otherwise noted, this description will i
explain the principle and effects of the present I
invention, focusing on fundamental wave components f
20 included in clusters voltages Vuv, Vvw and Vwu and I
currents luv, Ivw and Iwu that flow into the respective I
reactors 103 and clusters 104 to 106. I
{0038}
The method of controlling the power converter in
25 the present invention and the principle of the present
- 16 -
invention will be described with reference to FIG. 3.
FIG. 3 shows control blocks, in the controller,
that are not shown in FIG. 1.
{0039} ;
5 The controller detects line voltages VSuv, VSvw,
and VSwu of the power supply system 101 and performs
positive-phase sequence dq conversion on these detected f
line voltages to obtain positive-phase sequence d-axis
voltage Vd and positive-phase sequence q-axis voltage f
10 Vq. The controller also detects currents luv, Ivw, and I
Iwu that flow into the respective reactors and performs positive-phase sequence dq conversion on these detected currents to obtain positive-phase sequence d-axis
current Idl and positive-phase sequence q-axis current I
15 Iql. The controller further detects currents luv, Ivw, and Iwu that flow into their respective reactors 103 j
and performs negative-phase sequence dq conversion on }
these detected currents to obtain negative-phase f
sequence d-axis current Id2 and negative-phase sequence j
20 q-axis current Iq2. The controller gives obtained Vd,
Vq, Idl, Iql, Id2, and Iq2 to a current controller 308. i
{0040} ;
In this description, it is assumed that all the i
reference phase angles of a positive-phase sequence dq
25 converting block 306 and a negative-phase sequence dq
I
J
- 17 - ;
converting block are substantially in synchronization «
with uv-phase line voltage VSuv of the power supply i
system 101. I
{0041} ?
c
5 The current controller calculates cluster voltage I
commands Vuvcc*, Vvwcc*, and Vwucc* to be output from f
f
the current controller so that currents Idl, Iql, Id2, I
and Iq2 match their respective command values Idl*,
Iql*, Id2*, and Iq2*.
t
10 {0042} t
Positive-phase sequence d-axis current command
value idl* and other current command values Iql*, Id2*,
and Iq2* are given in different methods.
{0043}
iI.
15 Positive-phase sequence d-axis current command I
{
value idl* is given by a total average DC voltage |
controller 303. I
i
{0044} , I
j
Positive-phase sequence q-axis current command j
I
20 value Iql*, negative-phase sequence d-axis current I
I
command value Id2*, and negative-phase sequence q-axis I
current command value Iq2* are given from currents ILu, |
ILv, and ILw of the unbalanced load 108 (referred to j
I
below as load currents) through a compensating current j
I-
25 value calculator 305. The internal structure of the ^
I
- 18 - j
compensating current value calculator 305 will be j
described later. I
{0045} I
The controller detects DC voltages VCuvj, VCvwj, i
5 and VCwuj of the unit cells 107 and allows these
voltages to pass through low-pass filter (LPF) 301 to
obtain VCuvf j, VCvwf j , and VCwufj (j = 1, 2, ..., N) . 1
{0046} I
An average calculator 302 calculates average DC I
10 voltages VCu, VCv, and VCw (referred to below as l
i
cluster average DC voltages) in the clusters according f
i
to the equations below. [
I
{Eq. 5} VCuv = (VCuvf 1 + VCuvf2 + ... + VCuvfN)/N [
15 VCvw = (VCvwf 1 + VCvwf2 + ... + VCvwfN)/N
VCwu = (VCwufl + VCwuf2 + ... + VCwufN)/N
The total average DC voltage controller 303
calculates the average (referred to below as the total j
average DC voltage) VC of VCuv, VCvw, and VCwu (VC = I
20 (VCuv + VCvw + VCwu)/3), multiplies error between j
command value VC* and VC by a total average DC voltage J
control gain 304 to calculate positive-phase sequence i
d-axis current command value Idl*, and gives calculated ?
Idl* to the current controller 308.
25 {0047}
I
- 19 - A feedforward calculator 310 uses negative-phase i
sequence d-axis command value Id2*, negative-phase {
sequence q-axis command value Iq2*, and system voltages (
VSuv, VSvw and VSwu to calculate a circulating current f
5 command value feedforward term lOFF* by which active i
electric power that flows into the clusters 104 to 106 f
and active electric power output from there are made
zero.
{0048} 10 A cluster balancing controller 311 uses cluster i
average DC voltages VCuv, VCvw and VCwu and the total {
average DC voltage VC to calculate a circulating I
current command value feedback term lOFB*, which is [
used in cluster balancing control. Thus, the cluster ;
15 balancing controller 311 provides a function that {
balances the DC voltage of each unit cell. The internal {
structure of the cluster balancing controller 311 will [
be described later. {
{0049} I
20 A circulating current controller 312 compares the I
sum of the circulating current command value feedforward term lOFF* and circulating current command {
value feedback term lOFB* (lOFF* + lOFB*) with the
actual circular current 10 and performs a j
25 multiplication by a circulating current control gain
i
- 20 -
313 to calculate a zero-phase sequence voltage command j
value VO. The circulating current controller 312
further adds cluster voltage command values Vuvcc*,
Vvwcc*, and Vwucc* supplied from the current controller •;
5 to the obtained VO to obtain cluster voltage command
values Vuv*, Vvw*, and Vwu*. ;
{0050} i
A voltage command value divider 309 divides cluster
voltage command values Vuv*, Vvw*, and Vw* by cell f
10 count N and distributes output voltage command value
Vij* (i = uv, vw, wu, j = 1, 2, ..., N) to the unit cells r
107. I
{0051} The internal structure of the compensating current t
15 value calculator 305 will be described below with I
reference to FIG. 4. , j
{0052} j
The compensating current value calculator 305 l
detects load currents ILu, ILv and ILw and calculates ;
20 positive-phase sequence d-axis current and f
positive-phase sequence q-axis current through j
the positive-phase sequence dq converting block and a i
moving average calculator 401. The compensating current
value calculator 305 also calculates negative-phase
25 sequence d-axis current and negative-phase I
- 21 - }
sequence q-axis current from ILu, ILv, and ILw j
through the negative-phase sequence dq converting block
and the moving average calculator 401. The time window of the moving average calculator 401 is a half cycle of S
5 the power supply system or its integer multiple.
{0053} I
Three currents of the obtained , , {
, and , excluding , cause a voltage J
drop in the reactance component of the background line l
10 impedance (not shown) of the power supply system 101. I
{0054} I
Positive-phase sequence q-axis current of
the load changes the amplitude of the system voltage. I
Negative-phase sequence d-axis and q-axis currents f
15 and of the load increase the imbalance (
i
ratio of the system voltage. Accordingly, it is I
desirable to output currents having phases opposite to {
the phases of , , and from the power i
f
converter 102 to suppress the change in the amplitude j
20 of the system voltage and the increase in the imbalance j
ratio. i
{0055} I
Therefore, current command values Iql*, Id2*, and }
Iq2* of the power converter 102 are given by using the }
25 equations below.
I
- 22 - j
{Eq. 6] I
Iql* = - f
Id2* = - •
I
Iq2* = - 5 As described above, the current controller 308 (
controls actual currents Iql, Id2, and Iq2 so that they I
match given current command values Iql*, Id2*, and Iq2*. i
{0056} i
The internal structure of the feedforward f
10 calculator 310 will be described with reference to FIG. I
5. I
{0057} f
The feedforward calculator 310 obtains negative- j
phase sequence current root-mean-square value 12 and j
15 positive-phase sequence current phase angle 52 from the [
t
absolute value and angle of vector [Id2*, Iq2*] of f
given current command values Id2* and Iq2* through an {
orthogonal coordinate-polar coordinate converting block I
501. I
20 {0058} I
The feedforward calculator 310 also uses the I
positive-phase sequence dq converting block 306 to
perform negative-phase sequence dq conversion on phase I
voltages VSu, VSv, and VSw of the power supply system j
25 101, and calculates a moving average in which a half
f
I
I
i.
- 23 - - cycle of the power supply system is handled as a time |
window through the moving average calculator 401, i
I
obtaining positive-phase sequence d-axis voltage |
I'
and positive-phase sequence q-axis voltage . The I
5 feedforward calculator 310 also obtains positive-phase f
f
sequence voltage root-mean-square value VI and I
f
negative-phase sequence voltage phase angle <|)1 from the [
I
!
sizes and amplitudes of vectors [, ] through |
the orthogonal coordinate-polar coordinate converting
10 block 501.
I
{0059} [
I
The inventors found from 12, 52, VI, and ^1 obtained I
f
above that active electric power that flows into the I
I-I
clusters 104 to 106 can be made zero by applying the }
I
15 circulating current command value feedforward term I
t
lOFF*, which has root-mean-square value 10 and phase I
i.
angle 50 represented by the equations below, to the [
I
clusters. The mechanism of the present invention will I
I
be described later. j I I
20 {Eq. 7} j
i
10 = 12 I
{Eq. 8} I
I
50 = 2 X (bl - 52 ± 71 !
I
Even if the above equations are rewritten as the j
25 equations below, they are mathematically equivalent. In {
I
I
- 24 -
the block diagram in FIG. 5, the equations below are I
used.
{Eq. 9} 10 = -12 i
5 {Eq. 10} I
50 = 2 X (|)1 - 52 f
A sine wave generator 502 generates the circulating 1
j
current command value feedforward term lOFF* as a sine wave signal having root-mean-square value 10 and phase
10 angle 50.
{0060} r
Instead of an algorithm that is completely the same as in the block diagram shown in FIG. 4, the [;
feedforward calculator 310 can also use another j
15 algorithm if signals that are mathematically equivalent ;
to the equations in [Eq. 7] to [Eq. 10] can be output. 1
{0061} j
The internal structure of the cluster balancing |
controller 311 will be described with reference to FIG. I
20 6. I
{0062} • j
f
The cluster balancing controller 311 calculates i
AVCuv, AVCvw, and AVCwu, which are respectively
differences between the given total average DC voltage
25 VC and cluster average DC voltages VCuv, VCvw and VCwu.
^ I
- 25 - i
The cluster balancing controller 311 then performs aP conversion on the obtained AVCuv, AVCvw, and AVCwu by using an aP converting block 601 and obtains [AVCa, {
AVCP] as a vector on an aP axis. The cluster balancing {
5 controller 311 further calculates the sizes AVC and
amplitude t, of vectors [AVCa, AVCPJ through an
orthogonal coordinate-polar coordinate converting block I
602 . I
{0063}
10 The cluster balancing controller 311 also calculates amplitude ^1 of vectors [Vd, Vq], that is, the phase angle of the line-to-line voltage between I
phases u and v of the power supply system, from vectors [Vd, Vq] of given positive-phase sequence d-axis J
15 voltage Vd and positive-phase sequence q-axis voltage I
Vq though the orthogonal coordinate-polar coordinate |
converting block 501. t
t
{0064} I
f
The sine wave generator 502 outputs the circulating j
i
20 current command value feedback term lOFB* as a sine I
wave signal that has root-mean-square value 10, which I
f
is obtained by multiplying AVC by a cluster balancing {
control gain 603, and phase angle 50 (= (|)1 - ^) . i
{0065} I
25 Effects obtained by the present invention will be j
- 26 -
described with reference to FIG. 7.
{0066} }
FIG. 7 shows schematic waveforms of each part in a
case in which control in the present invention has been ?
5 carried out. The waveforms at the top are schematic ;
waveforms of line-to-line voltages VSuv, VSvw, and VSwu
of the power supply system 101, followed by schematic
waveforms of currents luv, Ivw, and Iwu that flow into
the their respective reactors 103 and clusters 104 to
10 106, a schematic waveform of the circular current (lOFF ;
+ lOFB), schematic waveforms of DC voltages VCuvj, I
VCvwj, and VCwuj, and schematic waveforms of DC {
voltages VCuvfj, VCvwfj, and VCwufj observed after they i
have passed through the LPFs 301 in that order. The [
I
15 waveforms in FIG. 7 are drawn, assuming that circular
current command value 10 ideally follows the command {
value (lOFF* + lOFB*). {
{0067} i
I
In FIG. 7, the horizontal axis indicates time or i
20 phase angle, and the vertical axis indicates amplitudes j
of voltage and current in an arbitrary unit (a.u.). i
{0068} i
I
In the period during which currents luv, Ivw, and I
I
Iwu include a negative-phase sequence current, 5
25 circulating current 10 is flowing. I
- 21 - {0069} {
The mechanism in the present invention will be described below.
{0070} i
5 When circulating current 10 controlled by the j
circulating current controller 312 is superimposed on f
currents luv*, Ivw*, and Iwu* flowing in their f
respective reactors 103 and the clusters 104 to 106, even if luv, Ivw, and Iwu include a negative-phase [
t
10 sequence component, a phase difference between Vuv and I
luv, a phase difference between Vvw and Ivw, and a I
'i
i
phase difference between Vwu and Iwu become 90 degrees. f
That is, active electric power that flows into each i
cluster and active electric power output from there f
15 become zero. Accordingly, active electric power that j
flowed into each cluster and outputs from there becomes I
I
zero, suppressing the DC voltage from being unbalanced. 1
I
{0071} I
i
In the present invention, the zero-phase sequence j
I
20 feedback term lOFB* plays a role of suppressing the DC I
voltages from being unbalanced due to variations in the I
I
I
characteristics of parts in use and other factors. }
{0072} I
With the power converter 102 in this embodiment,
25 the clusters 104 to 106 are connected to the power
i
- 28 - j
supply system 101 through their respective reactors 103. !
{0073} (
The present invention can also be applied to a case |
in which the clusters 104 to 106 are each connected to j
t
1
5 the power supply system 101 through a transformer I
instead of the reactor 103. j
f
{0074} I
I
The present invention can also be applied to a case in which the clusters 104 to 106 are each connected to j
f
10 the power supply system 101 through both the rector 103 j
I
and a transformer. j
I
I
{Embodiment 2}
{0075}
A second embodiment of the present invention will
15 be described below.
{0076}
In the first embodiment, negative-phase sequence
current command values Id2* and Iq2* have been given to
the feedforward calculator 310. In the second
20 embodiment, however, actual negative-phase sequence
currents Id2 and Iq2 are given instead of Id2* and Iq2*.
{0077} Accordingly, even if the current controller 308
cannot control currents as intended due to some
25 disturbance, that is, even if Id2 is not Id2* or Iq2 is J
j
I
I i
i
H^ 1
- 29 - j
not Iq2*, the effect that active electric power that ;
flows into the clusters 104 to 106 can be made {
approximately zero is obtained. i
{0078} I
I
5 Differences between the first embodiment and the {
second embodiment lie in the control block and t
I
feedforward calculator. Accordingly, the control block [
I
and feedforward calculator in the second embodiment {
I
will be described below with reference to FIGs. 8 and 9. j
i
10 {0079} I
r
In the control block in FIG. 8, currents luv, Ivw, [ I
and Iwu are given to a feedforward calculator 801. j I
{0080} I
I I
Next, the internal structure of the feedforward I
i
I
15 calculator 801 will be described with reference to FIG. I
9. j
{0081} '
The feedforward calculator 801 uses a negativephase
sequence dq converting block 307 to perform
20 negative-phase sequence dq conversion on currents luv,
Ivw, and Iwu, and calculates a moving average in which
a half cycle of the power supply system is handled as a
time window through the moving average calculator 401,
obtaining negative-phase sequence d-axis current
25 and negative-phase sequence q-axis current . The
I
- 30 - i
feedforward calculator 801 also obtains root-mean- '
square value 12 and phase angle 82 of the negativephase
sequence current from the sizes and amplitudes of I
I
vectors [, ] through the orthogonal f
5 coordinate-polar coordinate converting block 501. t
{0082} t
The feedforward calculator 801 also uses the |
i
positive-phase sequence dq converting block 306 to I
perform negative-phase sequence dq conversion on phase {
10 voltages VSu, VSv, and VSw of the power supply system {
f
I
101, and calculates a moving average in which a half |
cycle of the power supply system is handled as a time {
window through the moving average calculator 401, I
obtaining positive-phase sequence d-axis voltage
15 and positive-phase sequence q-axis voltage . The
feedforward calculator 801 also obtains positive-phase
sequence voltage root-mean-square value VI and
negative-phase sequence voltage phase angle l from the
sizes and amplitudes of vectors [, ] through
20 the orthogonal coordinate-polar coordinate converting
block 501. I
{0083} ^
The inventors found from 12, 52, VI, and (|)1 obtained
above that active electric power that flows into the ?
25 clusters 104 to 106 can be made zero by applying the J
I
I
I
- 31 - circulating current command value feedforward term j
lOFF*, which has root-mean-square value 10 and phase {
angle 50 represented by the equations below, to the I
k
clusters.
5 {Eq. 11}
10 = 12
{Eq. 12}
I
50 = 2 X (|)1 - 52 ± 71 I
Even if the above equations are rewritten as the }
I
10 equations below, they are mathematically equivalent. In I
I f
the bloclc diagram in FIG. 5, the equations below are t
used. }
{Eq. 13} i
10 = -12 I
15 {Eq. 14} I
60 = 2 X (|)1 - 62 I
The sine wave generator 502 generates the f
circulating current command value feedforward term
lOFF* as a sine wave signal having root-mean-square J
20 value 10 and phase angle 60.
{0084} i
The second embodiment is the same as the first I
embodiment except the control block (FIG. 3) and f
feedforward calculator 801, which have been described j
25 above. !
t
i
i
- 32 - J
{Embodiment 3} j
{0085} {
A third embodiment of the present invention will be I
described below. I
5 {0086} I
In the third embodiment, even if the three phases j
f
',
of the voltage of the power supply system 101 are I
f
unbalanced and include negative-phase sequence {
components, the effect that active electric power that j
10 flows into the clusters 104 to 106 and active electric J
I
power output from there can be made zero can be I
I
obtained as in the first and second embodiments. |
{0087} I
The third embodiment is characterized in that the
15 feedforward calculator 801, shown in FIG. 9, in the *
second embodiment is replaced with a negative-phase
sequence voltage ready feedforward calculator 1001
shown in FIG. 10.
{0088} I
20 The negative-phase sequence voltage ready
feedforward calculator 1001 obtains positive-phase ?
sequence d-axis current and positive-phase
sequence q-axis current from currents luv, Ivw, {
and Iwu through the positive-phase sequence dq
25 converting block 306 and moving average calculator 401. I
I
I
I
A I
(
- 33 - f
The negative-phase sequence voltage ready feedforward J
calculator 1001 further obtains positive-phase sequence I
current root-mean-square value II and positive-phase
sequence current phase angle 51 from the sizes and
5 amplitudes of vectors [, ] through the
orthogonal coordinate-polar coordinate converter 501.
{0089}
The negative-phase sequence voltage ready
feedforward calculator 1001 obtains negative-phase
10 sequence d-axis current and negative-phase
sequence q-axis current from currents lu, Iv, and
Iw through the negative-phase sequence dq converting
block 307 and moving average calculator 401. The
I
negative-phase sequence voltage ready feedforward {
j
15 calculator 1001 further obtains negative-phase sequence i
current root-mean-square value 12 and negative-phase
sequence current phase angle 52 from the absolute value
and angle of vector [, ] through the "
orthogonal coordinate-polar coordinate converter 501.
20 {0090}
f •
The negative-phase sequence voltage ready I
feedforward calculator 1001 obtains positive-phase {
sequence d-axis voltage and positive-phase I
sequence q-axis voltage from voltages VSuv, VSvw, 25 and VSwu through the positive-phase sequence dq ;
i
I
- 34 - j
converting block 306 and moving average calculator 401. The negative-phase sequence voltage ready feedforward j
f
r
calculator 1001 further obtains positive-phase sequence j
i
I
voltage root-mean-square value VI and positive-phase [
5 sequence voltage phase angle ^1 from the absolute value [
and angle of vector [, ] through the
orthogonal coordinate-polar coordinate converter 501.
{0091}
The negative-phase sequence voltage ready
10 feedforward calculator 1001 obtains negative-phase
sequence d-axis voltage and negative-phase
i I
sequence q-axis voltage from voltages VSuv, VSvw, |
!
and VSwu through the negative-phase sequence dq j
converting block 307 and moving average calculator 401. I
15 The negative-phase sequence voltage ready feedforward t
calculator 1001 further obtains positive-phase sequence
voltage root-mean-square value V2 and positive-phase
sequence voltage phase angle (|)2 from the sizes and
amplitudes of vector [, ] through the
20 orthogonal coordinate-polar coordinate converter 501.
{0092}
The inventors found that even if voltages VSuv, I
VSvw, and VSwu include negative-phase sequence t
components, active electric power that flows into the i
25 clusters and active electric power output from there
i
H I
- 35 -
can be made zero by giving the circular current command
value feedforward term lOFF* having root-mean-square
value 10 and phase angle 50, represented by the i
equations below, to the circular current controller 312. j
5 {Eq. 14} 10 = -(II X V2 X cos (51 - (|)2) + 12 X VI X cos (52 - (t)l))/(Vl X cos(60 -