FORM 2
THE PATENTS ACT, 1970
(39 of 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
[See section 10, Rule 13]
CONTROLLER FOR POWER CONVERTER AND FEEDBACK CONTROLLER;
MITSUBISHI ELECTRIC CORPORATION, A CORPORATION ORGANISED
AND EXISTING UNDER THE LAWS OF JAPAN, WHOSE ADDRESS IS 7-
3, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO 1008310, JAPAN
5
10
THE FOLLOWING SPECIFICATION PARTICULARLY DESCRIBES THE
INVENTION AND THE MANNER IN WHICH IT IS TO BE PERFORMED.
15
20
2
DESCRIPTION
Field
[0001] The present invention relates to a controller for
5 a power converter and a feedback controller, the power
converter converting alternating current power output from
an alternating current power supply into direct current
power.
10 Background
[0002] A pulse width modulation (PWM) converter is a
power converter that is connected to an alternating current
power supply and performs mutual conversion between
alternating current power and direct current power. The
15 PWM converter broadly has two roles. One is the control of
direct current voltage, and the other is the control of
alternating current. Hereinafter, the PWM converter will
be simply referred to as a “converter”.
[0003] There are broadly two methods in which the
20 converter controls the alternating current. One is a
method that separates a feedback value of the alternating
current into active current and reactive current in direct
current values by a rotating coordinate transformation
based on the phase of a power supply voltage, and causes
25 them to follow a command value having a direct current
value. The other is a method that causes the feedback
value of the alternating current to directly follow a
sinusoidal current command value. Hereinafter, the former
will be referred to as a “direct current-automatic current
30 regulator (DC-ACR)”, and the latter will be referred to as
an “alternate current-automatic current regulator (AC-ACR)”.
The AC-ACR method typically uses a proportional controller
(hereinafter referred to as a “P controller”) or a
3
proportional integral controller (hereinafter referred to
as a “PI controller”). Patent Literature 1 below discloses
a controller using the AC-ACR method.
5 Citation List
Patent Literature
[0004] Patent Literature 1: Japanese Patent Application
Laid-open No. H11-32486
10 Summary
Technical Problem
[0005] The DC-ACR method has an advantage that the
active current and the reactive current can be controlled
without a steady state error. However, when the power
15 supply is a single-phase alternating current, the DC-ACR
method needs to prepare a signal having a phase difference
of 90° with respect to the original alternating current in
order to define a rotating instantaneous current vector.
This preparatory process causes a delay in the signal
20 output. The DC-ACR method therefore has a disadvantage
that the control response cannot be designed to be high.
The DC-ACR method also has a disadvantage that a step
disturbance superimposed on the alternating current cannot
be eliminated.
25 [0006] Meanwhile, the AC-ACR method can easily design
the control response to be high and has high performance of
eliminating the step disturbance. However, since the ACACR
method uses the P controller or PI controller, there is
a problem that the steady state error remains with respect
30 to the sinusoidal command value.
[0007] The present invention has been made in view of
the above, and an object of the present invention is to
provide a controller for a power converter and a feedback
4
controller capable of reducing a steady state error with
respect to a sinusoidal command value in the AC-ACR method.
Solution to Problem
[0008] In order to solve the above problem and achieve
5 the object, a feedback controller according to the present
invention includes a control unit that amplifies an error
between a command signal and output of a control object and
calculates a control variable to be input to the control
object. The control unit includes a first amplifier that
10 resonates at a frequency of the command signal, and a
second amplifier that performs a proportional calculation
or proportional integral calculation. When a transfer
function of the first amplifier is represented by K1 (s)
and a transfer function of the second amplifier is
15 represented by K2 (s), then a transfer function of the
control unit is represented by K2 (s) (1-K1 (s)). Moreover,
the first amplifier has a negative phase response with
respect to the frequency of the command signal, and a gain
that decreases monotonically in a frequency region higher
20 than the frequency of the command signal.
Advantageous Effects of Invention
[0009] The present invention has an effect of being able
to reduce the steady state error with respect to the
25 sinusoidal command value while maintaining the performance
of eliminating a step disturbance.
Brief Description of Drawings
[0010] FIG. 1 is a block diagram of a drive system
30 including a controller for a power converter according to a
first embodiment.
FIG. 2 is a block diagram illustrating a configuration
of a control arithmetic unit illustrated in FIG. 1.
5
FIG. 3 is a block diagram illustrating a detailed
configuration of a voltage control unit illustrated in FIG.
2.
FIG. 4 is a vector diagram for explaining the
5 operation during power running of a converter according to
the first embodiment.
FIG. 5 is a vector diagram for explaining the
operation during regeneration of the converter according to
the first embodiment.
10 FIG. 6 is a block diagram representing a current
control system including a current control unit according
to the first embodiment.
FIG. 7 is a vector diagram for explaining the
operation during power running when the converter of the
15 first embodiment is not in an operating state corresponding
to a power factor of one.
FIG. 8 is a block diagram illustrating a detailed
configuration of the current control unit according to the
first embodiment.
20 FIG. 9 is a Bode plot representing frequency
characteristics of a first amplifier according to the first
embodiment configured by a second order lag system.
FIG. 10 is a Bode plot provided for explaining an
effect when the current control unit according to the first
25 embodiment is used.
FIG. 11 is a block diagram illustrating an example of
a configuration of a current controller according to a
first comparative example.
FIG. 12 is a Bode plot representing frequency
30 characteristics of a bandpass filter according to the first
comparative example.
FIG. 13 is a Bode plot illustrating frequency
characteristics of an open-loop transfer function of a
6
current control system according to the first comparative
example.
FIG. 14 is a block diagram illustrating an example of
a configuration of a current controller according to a
5 second comparative example.
FIG. 15 is a Bode plot representing frequency
characteristics of a high-pass filter according to the
second comparative example.
FIG. 16 is a Bode plot illustrating frequency
10 characteristics of an open-loop transfer function of a
current control system according to the second comparative
example.
FIG. 17 is a block diagram illustrating an example of
a hardware configuration that implements arithmetic
15 functions of the control arithmetic unit of the first
embodiment.
FIG. 18 is a block diagram illustrating another
example of the hardware configuration that implements the
arithmetic functions of the control arithmetic unit of the
20 first embodiment.
FIG. 19 is a diagram illustrating a first variation of
the current control unit according to the first embodiment.
FIG. 20 is a diagram illustrating a second variation
of the current control unit according to the first
25 embodiment.
FIG. 21 is a diagram illustrating a third variation of
the current control unit according to the first embodiment.
FIG. 22 is a block diagram illustrating a
configuration of a feedback controller according to a
30 fourth embodiment.
Description of Embodiments
[0011] A controller for a power converter and a feedback
7
controller according to embodiments of the present
invention will now be described in detail with reference to
the drawings. Note that the present invention is not
limited to the following embodiments.
5 [0012] First Embodiment.
FIG. 1 is a block diagram of a drive system 100
including a controller for a power converter (hereinafter
simply referred to as a “controller”) 10 according to a
first embodiment. A converter 2 is a power converter that
10 converts alternating current power output from an
alternating current power supply 1 into direct current
power. A load 3 is a control object to be controlled by
the converter 2. Seen from the converter 2, the side of
the alternating current power supply 1 will be called an
15 “alternating current side”, and the side of the load 3 will
be called a “direct current side”. When the controller 10
is included in a feedback controller described later, the
output of a main part on the alternating current side is
fed back to the controller 10.
20 [0013] The direct current power obtained by conversion
by the converter 2 is supplied to the load 3. The load 3
is a concept including an inverter (not shown) that
converts the direct current power output from the converter
2 into alternating current power, and an actuator driven by
25 the alternating current power of the inverter. The
actuator is a motor, for example.
[0014] The converter 2 is connected to the alternating
current power supply 1 via an impedance element 4. The
impedance element 4 includes an impedance element of
30 electrical wiring (not shown) that connects the alternating
current power supply 1 and the converter 2, an internal
impedance element (not shown) of the alternating current
power supply 1, and the like.
8
[0015] The controller 10 includes a control arithmetic
unit 10a that generates a PWM signal. The control
arithmetic unit 10a controls the converter 2 by generating
the PWM signal for PWM control of the converter 2.
5 Depending on the relationship between the output of the
alternating current power supply 1 and the output of the
load 3, the alternating current power output by the
alternating current power supply 1 may be output to the
load 3, or the direct current power output by the load 3
10 may be output to the alternating current power supply 1.
That is, the converter 2 has a function of mutually
converting the alternating current power output by the
alternating current power supply 1 and the direct current
power output by the load 3. Note that many publicly known
15 documents are available regarding the PWM control related
to the converter 2, and thus detailed description thereof
will be omitted here.
[0016] FIG. 2 is a block diagram illustrating a
configuration of the control arithmetic unit 10a
20 illustrated in FIG. 1. The configuration illustrated in
FIG. 2 is a diagram for explaining an overview of converter
control of the present embodiment.
[0017] As illustrated in FIG. 2, the control arithmetic
unit 10a includes a phase calculation unit 11, subtractors
25 12, 14, and 16, a voltage control unit 13, a current
control unit 15, and a switching command generation unit 17.
The operation of each unit will be described below.
[0018] The phase calculation unit 11 generates a power
supply voltage phase θ on the basis of a power supply
30 voltage “vs”. The power supply voltage “vs” is an output
voltage of the alternating current power supply 1. The
power supply voltage phase θ is a reference phase in
generating a current command value “is*”. The power supply
9
voltage phase θ is input to the voltage control unit 13.
[0019] The subtractor 12 generates a direct current
voltage error ΔEd that is an error between a direct current
voltage command value Ed* and a direct current voltage Ed.
5 The direct current voltage Ed is a detected value of the
actual direct current voltage applied to the load 3.
[0020] The voltage control unit 13 generates the current
command value “is*” on the basis of the direct current
voltage error ΔEd and the power supply voltage phase θ.
10 The current command value “is*” is a target value of the
current to be passed to the alternating current side of the
converter 2. The current command value “is*” is input to
the subtractor 14.
[0021] The subtractor 14 generates a current control
15 error Δis that is an error between the current command
value “is*” and an alternating current “is”. The
alternating current “is” is a detected value of the actual
alternating current flowing in and out of the converter 2.
The current control error Δis is input to the current
20 control unit 15.
[0022] The current control unit 15 generates a voltage
compensation amount Δvc on the basis of the current control
error Δis. Details of the voltage compensation amount Δvc
will be described later. The voltage compensation amount
25 Δvc is input to the subtractor 16.
[0023] The subtractor 16 generates an alternating
current voltage command “vc*” obtained by subtracting the
voltage compensation amount Δvc from a feed-forward voltage
vFF which will be described in detail later. The
30 alternating current voltage command “vc*” is a target value
of the alternating current voltage to be output to the
alternating current side of the converter 2. Note that
details of the feed-forward voltage vFF will be described
10
later.
[0024] The switching command generation unit 17
generates a switching command “sw*” on the basis of the
alternating current voltage command “vc*”. The switching
5 command “sw*” is a PWM signal for PWM control of the
converter 2.
[0025] Note that the subtractor 16 of FIG. 2 subtracts
the voltage compensation amount Δvc from the feed-forward
voltage vFF. The subtractor 16 does not add but subtracts
10 the voltage compensation amount Δvc because the direction
from the alternating current power supply 1 to the
converter 2 is defined as the positive of the alternating
current “is”. That is, the polarity of the voltage
compensation amount Δvc can be determined depending on the
15 polarity of the alternating current “is”.
[0026] FIG. 3 is a block diagram illustrating a detailed
configuration of the voltage control unit 13 illustrated in
FIG. 2. As illustrated in FIG. 3, the voltage control unit
13 includes a unit sine wave generation unit 13a, a PI
20 controller 13b (denoted as “PI” in FIG. 3), and a
multiplier 13c.
[0027] As described above, the subtractor 12 generates
the direct current voltage error ΔEd. The PI controller
13b amplifies the direct current voltage error ΔEd. The
25 output of the PI controller 13b is a direct current value
corresponding to the amplitude of the current command value
“is*”. In FIG. 3, the direct current value is expressed as
|is*|.
[0028] The unit sine wave generation unit 13a generates
30 a unit sine wave sinθ having the same phase as the power
supply voltage “vs” and an amplitude of one. The
multiplier 13c multiplies the direct current value |is*| by
the unit sine wave sinθ to generate the current command
11
value “is*”. The current command value “is*” is the output
of the voltage control unit 13. The current command value
“is*” is an alternating current value that oscillates at
the frequency of the power supply voltage “vs”.
5 [0029] Next, the operation of the converter 2 according
to the first embodiment will be described. First, the
following circuit equation holds among the power supply
voltage “vs”, the alternating current voltage “vc”, and the
alternating current “is” in FIG. 1.
10 [0030] [Expression 1]
...(1)
[0031] In the above expression (1), “r” is a resistance
component of the impedance element 4, and “x” is a
reactance component of the impedance element 4.
[0032] Moreover, the above expression (1) expressed in a
15 vector diagram is illustrated in FIGS. 4 and 5. FIG. 4 is
the vector diagram for explaining the operation during
power running of the converter 2 according to the first
embodiment. FIG. 5 is the vector diagram for explaining
the operation during regeneration of the converter 2
20 according to the first embodiment. Note that FIGS. 4 and 5
both illustrate an operating state with a power factor of
one in which the power supply voltage “vs” and the
alternating current “is” do not have components orthogonal
to each other.
25 [0033] In the operating state with the power factor of
one, during power running, the power supply voltage “vs”
and the alternating current “is” are in phase as
illustrated in FIG. 4. Therefore, the flow of power in the
drive system 100 is directed from the alternating current
30 power supply 1 to the direct current side of the converter
2. On the other hand, in the operating state with the
power factor of one, during regeneration, the power supply
vs r + jxis vc
12
voltage “vs” and the alternating current “is” are in
opposite phases as illustrated in FIG. 5. Therefore, the
flow of power in the drive system 100 is directed from the
direct current side of the converter 2 to the alternating
5 current power supply 1.
[0034] The operating principle of the converter 2 is to
control the voltage across the impedance element 4 by
controlling the amplitude and phase of the alternating
current voltage “vc”, and to control the alternating
10 current “is” to a desired value. According to the above
expression (1), once the desired alternating current “is”
is determined, the required alternating current voltage “vc”
can be calculated by using the power supply voltage “vs”
and the resistance component “r” and the reactance
15 component “x” of the impedance element 4. The required
alternating current voltage “vc” is called the “feedforward
voltage” and is denoted as “vFF” as described above.
The feed-forward voltage vFF is represented by the
following expression.
20 [0035] [Expression 2]
...(2)
[0036] Note that in the above expression (2), there is a
method of using a feedback value of the alternating current
“is” instead of the current command value “is*”, but the
present embodiment is not limited to either one.
25 [0037] Here, in the example of FIG. 2, the alternating
current voltage command “vc*” to the converter 2 is
obtained by subtracting the voltage compensation amount Δvc
from the feed-forward voltage vFF. In other words, most of
the alternating current voltage command “vc*” is a
30 component of the feed-forward voltage vFF, and the output
of the current control unit 15 is adjusted by the voltage
compensation amount Δvc that works to eliminate the
vFF:= vs r + jxis 
13
influence of an unknown disturbance, a parameter error of
the impedance element 4, or the like.
[0038] Next, a current control system according to the
first embodiment will be described. FIG. 6 is a block
5 diagram representing the current control system including
the current control unit 15 according to the first
embodiment. The meanings of symbols illustrated in FIG. 6
are as follows.
[0039] R (s): command signal (corresponding to the
10 current command value “is*”)
Y (s): output (corresponding to the alternating
current “is”)
E (s): control error (corresponding to the current
control error Δis)
15 K (s): transfer function of the current control unit
15
P (s): transfer function of a control object 52
(corresponding to the impedance element 4)
[0040] The transfer function of the control object 52
20 can be represented by a first order lag system of P
(s)=1/(R+sL), where “R” is the resistance component of the
impedance element 4 and “L” is the inductance component
thereof. A Laplace operator is denoted by “s”. Note that
in general, the inductance component “L” is sufficiently
25 larger than the resistance component “R” so that the
transfer function may be expressed as P (s)=1/sL by
ignoring the resistance component “R”.
[0041] Here, in order to understand the operation of the
current control system, it is assumed that a controller of
30 the current control unit 15 is a P controller, and K (s)=Kc.
At this time, the transfer function from the command signal
R (s) to the control error E (s) is represented by the
following expression.
14
[0042] [Expression 3]
...(3)
[0043] It is also assumed that the input to the current
control system is a sine wave input, and r (t)=sinωt. Here,
“r (t)” is a time function of an input signal to the
5 current control system. At this time, since the Laplace
transform R (s) of the input signal r (t) is given by R
(s)=ω/(s2+ω2), the control error E (s) is represented by
the following expression.
[0044] [Expression 4]
...(4)
10 [0045] The following expression is obtained by modifying
the above expression (4).
[0046] [Expression 5]
...(5)
[0047] Furthermore, the following expression is obtained
when a time waveform is determined by inverse Laplace
15 transform of the above expression (5).
[0048] [Expression 6]
...(6)
[0049] In the above expression (6), the third term is a
monotonically decreasing exponential function and converges
to zero over time. Meanwhile, the first and second terms
20 do not equal zero and continue to oscillate at the
oscillation frequency. Although the calculation is omitted,
the oscillating term of the control error does not
disappear even if the controller is a PI controller. That
is, the control error remains in the current control system.

Kc+sL
sL
=
R s
E s
2 2 s +
×
Kc+ sL
sL
E s =

















s Kc/L
KcωL
s
KcωL s
s
L
Kc + L
1
E s = 2 2 2 2
2
2 2


2 Kc/L
2 2
L sin t +(KcωL)cos t Kc L e
Kc + L
1
e t = 

15
[0050] Moreover, while the input signal r (t) is the
sine wave, the time function e (t) of the control error E
(s) also includes a cosine wave. That is, since “r (t)”
and “e (t)” have different phases, “r (t)” and “y (t)” also
5 have different phases. This means that the current command
value “is*” and the alternating current “is” are out of
phase, and the power factor is not controlled as intended.
[0051] The feed-forward voltage vFF described above is
expected to reduce the current control error Δis that is
10 the control error of the current control system. However,
compensation by the feed-forward voltage vFF (herein
referred to as “feed-forward compensation”) is not robust
against an unknown disturbance or a parameter fluctuation
in the control object 52. That is, the feed-forward
15 compensation is not sufficiently effective when there is an
unknown disturbance or a parameter fluctuation in the
control object 52.
[0052] The problem when the current control error Δis
occurs in the current control system is that the power
20 factor does not equal a desired value. In the control
arithmetic unit 10a, the amount of active current required
to control the direct current voltage Ed to be constant is
automatically achieved without an error by the function of
the voltage control unit 13. Therefore, the influence of
25 the current control error Δis is mainly reflected in the
reactive current amount or the power factor.
[0053] Next, a description will be given of the
operation of the converter 2 when the operating state does
not correspond to the power factor of one. FIG. 7 is a
30 vector diagram for explaining the operation during power
running when the converter 2 of the first embodiment is not
in the operating state corresponding to the power factor of
one. Note that here, as illustrated in FIG. 7, a case
16
where the phase of the alternating current “is” is delayed
with respect to the power supply voltage “vs” is taken as
an example.
[0054] In FIG. 7, point A is the end point of a vector
5 of an alternating current voltage “vc'” that causes the
alternating current “is”, and point C is the end point of a
vector of the alternating current voltage “vc” that causes
the current command value “is*”. From the vector diagram
of FIG. 7, it can be seen that the desired alternating
10 current can be achieved if the alternating current voltage
output of the converter 2 can be changed from “vc'” to “vc”.
In other words, it can be considered that a difference
between the alternating current voltage “vc'” that causes
the alternating current “is” and the alternating current
15 voltage “vc” that causes the current command value “is*” is
the voltage compensation amount Δvc to be output by the
current control unit 15.
[0055] Next, in FIG. 7, the focus is placed on two
vectors forming the voltage compensation amount Δvc. One
20 of the two vectors is “rΔis” that is in phase with the
current control error Δis, and the other of the two vectors
is “jxΔis” that is 90 degrees ahead of the phase of the
current control error Δis. Here, in the current control
unit according to a conventional method, the amplifier is
25 configured by P control or PI control. Therefore, the
current control unit according to the conventional method
can output only a signal having the same phase as or a
lagging phase with respect to the current control error Δis.
Note that a detailed operation of the current control unit
30 according to the conventional method will be described
later.
[0056] FIG. 8 is a block diagram illustrating a detailed
configuration of the current control unit 15 according to
17
the first embodiment. In FIG. 8, a component identical or
equivalent to that of FIG. 2 is indicated by the same
reference numeral or symbol as that assigned to the
component in FIG. 2.
5 [0057] As described above, the current control unit 15
is a control unit that outputs the voltage compensation
amount Δvc by amplifying the current control error Δis
which is the error between the current command value “is*”
and the alternating current “is”. As illustrated in FIG. 8,
10 the current control unit 15 includes a first amplifier 151,
a subtractor 152, and a second amplifier 153. A transfer
function of the first amplifier 151 is denoted by “K1 (s)”,
and a transfer function of the second amplifier 153 is
denoted by “K2 (s)”.
15 [0058] The first amplifier 151 amplifies the current
control error Δis. The subtractor 152 generates a
difference between the current control error Δis and the
output of the first amplifier 151. The second amplifier
153 amplifies the output of the subtractor 152, that is,
20 the difference between the current control error Δis and
the output of the first amplifier 151.
[0059] The second amplifier 153 is a P controller or a
PI controller as with the amplifier of the current control
unit according to the conventional method. On the other
25 hand, the first amplifier 151 is a controller that
satisfies the following conditions.
[0060] ∙ Having resonance characteristics at the
frequency of the power supply voltage “vs”.
∙ Having a negative phase response characteristic at
30 the frequency of the power supply voltage “vs”.
∙ Having a monotonically decreasing gain in a
frequency region higher than the frequency of the power
supply voltage “vs”.
18
[0061] At this time, the voltage compensation amount Δvc,
which is the output of the current control unit 15
according to the first embodiment, is represented by the
following expression.
5 [0062] [Expression 7]
...(7)
[0063] Here, assuming that the second amplifier 153 is a
P controller, the first term of the above expression (7) is
a signal having the same phase as the current control error
Δis. On the other hand, the second term of the above
10 expression (7) has a leading phase with respect to the
current control error Δis when a negative sign is included.
Therefore, according to the above expression (7), the first
term operates to compensate for the voltage corresponding
to vector “BA” in FIG. 7, and the second term operates to
15 compensate for the voltage corresponding to vector “CB” in
FIG. 7. Note that even in a case where the second
amplifier 153 is a PI controller, a similar relationship
holds if a time constant of an integrator used for the PI
controller is sufficiently larger than the period of the
20 power supply voltage “vs”.
[0064] Also, the reactance component “x” is sufficiently
larger than the resistance component “r” in general.
Accordingly, the voltage compensation amount Δvc in FIG. 7
is dominated by the component in the leading phase (vector
25 “CB”) rather than the component in phase (vector “BA”) with
respect to the current control error Δis. Therefore, in
expression (7), it is necessary for the second term to
function predominantly. This is achieved by designing the
first amplifier 151 to have resonance characteristics at
30 the frequency of the power supply voltage “vs”.
[0065] Furthermore, the first amplifier 151 having a
cutoff characteristic in a frequency region higher than the
vc = K2s1K1sis
19
frequency of the power supply voltage “vs” can reduce a
change in the gain characteristic and the phase
characteristic in the frequency region in the open-loop
transfer function of the current control system. In other
5 words, deterioration of the stability of the current
control system can be prevented or reduced as compared to
when the current control system includes only the second
amplifier 153. The stability of the current control system
when the first amplifier 151 is included will be described
10 later in comparison with another known method.
[0066] Here, the focus is again placed on a phase
difference δ between the current control error Δis and the
voltage compensation amount Δvc in FIG. 7. The phase
difference δ represents the impedance angle, and is
expressed by δ=tan-1 15 (x/r). As described above, since the
reactance component “x” is sufficiently larger than the
resistance component “r”, the voltage compensation amount
Δvc is approximately 90 degrees ahead of the current
control error Δis. Therefore, the conditions of the first
20 amplifier 151 described above may be changed as follows.
[0067] ∙ Resonating at the frequency of the power supply
voltage “vs”.
∙ Having a phase response of -90 degrees at the
frequency of the power supply voltage “vs”.
25 ∙ Having a monotonically decreasing gain in a
frequency region higher than the frequency of the power
supply voltage “vs”.
[0068] In order to satisfy the above conditions, it is
easy to configure the first amplifier 151 with a second
30 order lag system. The second order lag system can be
expressed by the following transfer function where “α” is a
proportional gain, “ωr” is a natural frequency, and “ζ” is
an attenuation coefficient.
20
[0069] [Expression 8]
...(8)
[0070] FIG. 9 is a Bode plot representing the frequency
characteristics of the first amplifier 151 according to the
first embodiment configured by the second order lag system.
5 FIG. 9 illustrates the frequency characteristics of the
second order lag system according to the first embodiment
when, for example, the proportional gain is equal to one
and the natural frequency is equal to 120π [rad/s] (or 60
[Hz]). In the second order lag system according to the
10 example of FIG. 9, at the natural frequency of 60 [Hz], the
gain is maximized as illustrated in the upper diagram, and
the phase response equals “-90 degrees” as illustrated in
the lower diagram. Also, as illustrated in the upper
diagram, the gain decreases monotonically in the frequency
15 region higher than the natural frequency. Therefore, the
three conditions can be achieved at the same time if the
natural frequency is matched with the frequency of the
power supply voltage “vs”, the three conditions including
resonating at the frequency of the power supply voltage
20 “vs”, having the phase response of “-90 degrees” at the
frequency of the power supply voltage “vs”, and having the
monotonically decreasing gain in the frequency region
higher than the frequency of the power supply voltage “vs”.
[0071] FIG. 10 is a Bode plot provided for explaining an
25 effect when the current control unit 15 according to the
first embodiment is used. In both the upper and lower
diagrams of FIG. 10, a solid line represents the frequency
characteristic of the open-loop transfer function of the
current control system according to the first embodiment in
30 which the current control unit 15 is configured as
2 2
2
s + 2ζ rs + r
r
K1s



21
illustrated in FIG. 8, and a dashed line represents the
frequency characteristic of the open-loop transfer function
of the current control system when the current control unit
15 includes only the second amplifier 153. Note that the
5 dashed line is illustrated as a reference characteristic
for explaining a difference between the current control
unit 15 of the first embodiment and current control units
according to two comparative examples described later. FIG.
10 also assumes a dead time of 500 [μs].
10 [0072] In FIG. 10, the open-loop transfer function of
the current control system according to the first
embodiment has the maximum gain and the phase of almost
zero degree at the natural frequency of 60 [Hz]. This
means that the current control error Δis is almost in phase
15 with the current command value “is*”. At this time, the
phase difference between the current command value “is*”
and the alternating current “is” is also eliminated, so
that the power factor can be controlled with high accuracy.
[0073] Now, there is known a method in which a bandpass
20 filter is used as the amplifier having the resonance
characteristics in the current control unit. Hereinafter,
the current controller according to this method will be
referred to as a “current controller according to a first
comparative example” or simply a “first comparative
25 example”. FIG. 11 is a block diagram illustrating an
example of a configuration of a current control unit 15A
according to the first comparative example. In the current
control unit 15A according to the first comparative example,
the first amplifier 151 illustrated in FIG. 8 is replaced
30 with a bandpass filter 154. A transfer function of the
bandpass filter 154 is denoted by “B (s)”.
[0074] Moreover, in the current control unit 15A of FIG.
11, the subtractor 152 illustrated in FIG. 8 is changed to
22
an adder 155. It is to be noted that the subtractor 152
illustrated in FIG. 8 generates the difference between the
current control error Δis and the output of the first
amplifier 151, whereas the adder 155 illustrated in FIG. 11
5 adds the output of the bandpass filter 154 to the current
control error Δis. The rest of the configuration is the
same as that of FIG. 8, and the same components are
indicated by the same reference numerals and symbols.
[0075] The transfer function B (S) of the bandpass
10 filter 154 can be represented by the following expression
where “α” is a proportional gain, “ωr” is a center
frequency, and “ζ” is an attenuation coefficient.
[0076] [Expression 9]
...(9)
[0077] In the above expression (9), “1/2ζ” is also
15 called sharpness, and “2ζωr” is also called a bandwidth.
[0078] Next, a description will be given of the
frequency characteristics of the current control system to
which the current control unit 15A according to the first
comparative example is applied. Note that the center
20 frequency ωr is made to match the frequency of the power
supply voltage “vs” in order to achieve equivalent
conditions in making a comparison with the current control
unit 15 according to the first embodiment.
[0079] FIG. 12 is a Bode plot representing the frequency
25 characteristics of the bandpass filter 154 according to the
first comparative example. FIG. 12 illustrates the
frequency characteristics of the bandpass filter 154 when
the proportional gain is equal to one and the center
frequency is equal to 120π [rad/s] (60 [Hz]). According to
30 the example of FIG. 12, the gain is maximized at the center
frequency, and the phase response is “zero degree” at the


2 2 s +2ζ rs + r
2ζ r s
B s



23
center frequency, that is, the response characteristic is
not negative.
[0080] FIG. 13 is a Bode plot illustrating the frequency
characteristics of an open-loop transfer function of the
5 current control system according to the first comparative
example. The frequency characteristics of the open-loop
transfer function according to the first comparative
example are indicated by solid lines in the upper and lower
diagrams of FIG. 13. Moreover, in both the upper and lower
10 diagrams of FIG. 13, a dashed line is the reference
characteristic indicated by the dashed line in FIG. 10.
[0081] In the open-loop transfer function according to
the first comparative example, the gain is maximized and
the phase is almost “-90 degrees” at the center frequency
15 of the bandpass filter 154. According to the first
comparative example, the gain can be selectively increased
at the center frequency. Therefore, as in the first
embodiment, the control error with respect to the
sinusoidal command input at the center frequency can be
20 reduced, and the power factor can be controlled with high
accuracy.
[0082] However, as illustrated in the lower diagram of
FIG. 13, the first comparative example has a phase lead at
a frequency lower than the center frequency but an
25 increased phase lag at a frequency higher than the center
frequency, as compared with the reference characteristic.
Therefore, if the second amplifier 153 is designed such
that the response frequency (gain crossover frequency) is
higher than the frequency of the power supply voltage “vs”
30 in order to improve the response, there arises a problem
that a phase margin is reduced. Here, in the Bode plot of
the open-loop transfer function, the “phase margin” is an
amount indicating how much the phase has a margin with
24
respect to -180 degrees at the frequency at which the gain
equals zero dB, that is, the phase difference. Note that
the frequency at which the gain equals zero dB is generally
called the “response frequency” or “gain crossover
5 frequency”.
[0083] On the other hand, in the case of the current
control unit 15 according to the first embodiment described
above, the phase characteristic of the open-loop transfer
function only changes in the direction of advancing the
10 phase with respect to the reference characteristic, as
illustrated in the lower diagram of FIG. 10. Therefore,
according to the first embodiment, a sufficient phase
margin can be secured even when the current control system
is designed to have a high response.
15 [0084] There is also known a method of using a high-pass
filter as another method that applies the amplifier having
the resonance characteristics in the current control unit.
Hereinafter, the current controller according to this
method will be referred to as a “current controller
20 according to a second comparative example” or simply a
“second comparative example”. FIG. 14 is a block diagram
illustrating an example of a configuration of a current
control unit 15B according to the second comparative
example. In the current control unit 15B according to the
25 second comparative example, the first amplifier 151
illustrated in FIG. 8 is replaced with a high-pass filter
156. A transfer function of the high-pass filter 156 is
denoted by “C (s)”. Note that in the current control unit
15B of FIG. 14, as with the current control unit 15A of FIG.
30 11, the output of the high-pass filter 156 is added to the
current control error Δis in the adder 155. The rest of
the configuration is the same as that of FIG. 8, and the
same components are indicated by the same reference
25
numerals and symbols.
[0085] The transfer function C (S) of the high-pass
filter 156 can be represented by the following expression
where “α” is a proportional gain, “ωr” is a cutoff
5 frequency, and “ζ” is an attenuation coefficient.
[0086] [Expression 10]
...(10)
[0087] Next, a description will be given of the
frequency characteristics of the current control system to
which the current control unit 15B according to the second
10 comparative example is applied. Note that the cutoff
frequency ωr is made to match the frequency of the power
supply voltage “vs” in order to achieve equivalent
conditions in making a comparison with the current control
unit 15 according to the first embodiment.
15 [0088] FIG. 15 is a Bode plot representing the frequency
characteristics of the high-pass filter 156 according to
the second comparative example. FIG. 15 illustrates the
frequency characteristics of the high-pass filter 156 when
the proportional gain is equal to one and the cutoff
20 frequency is equal to 120π [rad/s] (60 [Hz]). According to
the example of FIG. 15, the gain is maximized at the cutoff
frequency, and the phase response is “+90 degrees” at the
cutoff frequency.
[0089] FIG. 16 is a Bode plot illustrating the frequency
25 characteristics of an open-loop transfer function of the
current control system according to the second comparative
example. The frequency characteristics of the open-loop
transfer function according to the second comparative
example are indicated by solid lines in the upper and lower
30 diagrams of FIG. 16. Moreover, in both the upper and lower
2 2
2
s + 2ζ rs + r
s
C s



26
diagrams of FIG. 16, a dashed line is the reference
characteristic indicated by the dashed line in FIGS. 10 and
13.
[0090] In the open-loop transfer function according to
5 the second comparative example, the gain is maximized at
the cutoff frequency of the high-pass filter 156, and the
phase thereat is almost “0 degree”. This means that the
current control error Δis is almost in phase with the
current command value “is*”. At this time, the phase
10 difference between the current command value “is*” and the
alternating current “is” is also eliminated, so that the
power factor can be controlled with high accuracy.
[0091] However, as illustrated in the upper diagram of
FIG. 16, the second comparative example has the
15 characteristic in which the gain is offset in a positive
direction as compared with the reference characteristic at
a frequency higher than the cutoff frequency. At this time,
the response frequency (gain crossover frequency) is
shifted to the high frequency side as compared with the
20 reference characteristic. Therefore, if the second
amplifier 153 is designed such that the response frequency
(gain crossover frequency) is higher than the frequency of
the power supply voltage “vs” in order to improve the
response, there arises a problem that a gain margin and a
25 phase margin are reduced.
[0092] Moreover, when the current control unit includes
only the second amplifier 153, a desired response frequency
can be easily achieved by simply determining the
proportional gain of the second amplifier 153 corresponding
30 to the magnitude of the inductance component L of the
control object 52. On the other hand, when the current
control unit includes the use of the high-pass filter 156,
parameters of the high-pass filter 156 and parameters of
27
the second amplifier 153 influence each other to change the
response frequency, which causes a problem that the design
of the controller becomes complicated.
[0093] On the other hand, in the case of the current
5 control unit 15 according to the first embodiment described
above, the gain characteristic of the open-loop transfer
function has a small amount of offset with respect to the
reference characteristic at a frequency higher than the
natural frequency, as illustrated in the upper diagram of
10 FIG. 10. Therefore, the control response at a frequency
higher than the natural frequency is determined
predominantly by the parameters of the second amplifier 153
alone. As a result, the controller can be easily designed,
and sufficient gain margin and phase margin can be secured.
15 [0094] As described above, the current control unit of
the first embodiment amplifies the error between the
current command value, which is the target value of the
current to be passed to the alternating current side of the
power converter, and the actual current on the alternating
20 current side. With the first amplifier whose transfer
function is represented by “K1 (s)” and the second
amplifier whose transfer function is represented by “K2
(s)”, the overall transfer function including the first and
second amplifiers is represented by “K2 (s) (1-K1 (s))”.
25 The first amplifier resonates at least at the frequency of
the alternating current power supply, and the second
amplifier performs a proportional calculation or
proportional integral calculation. As a result, the steady
state error with respect to the sinusoidal command value
30 can be reduced while maintaining the performance of
eliminating a step disturbance.
[0095] Moreover, in the controller according to the
first embodiment, if the first amplifier has a negative
28
phase response characteristic at the frequency of the power
supply voltage and a gain monotonically decreasing in the
frequency region higher than the frequency of the power
supply voltage, it is possible to secure sufficient gain
5 margin and phase margin while ensuring the ease of design
of the current controller.
[0096] Next, a hardware configuration for implementing
the arithmetic functions of the control arithmetic unit 10a
of the first embodiment will be described with reference to
10 FIGS. 17 and 18. FIG. 17 is a block diagram illustrating
an example of the hardware configuration that implements
the arithmetic functions of the control arithmetic unit 10a
of the first embodiment. FIG. 18 is a block diagram
illustrating another example of the hardware configuration
15 that implements the arithmetic functions of the control
arithmetic unit 10a of the first embodiment.
[0097] When all or some of the arithmetic functions of
the control arithmetic unit 10a of the first embodiment are
implemented by software, as illustrated in FIG. 17, the
20 control arithmetic unit can include a processor 300 that
performs an arithmetic operation, a memory 302 that saves
programs to be read by the processor 300, and an interface
304 that inputs and outputs signals.
[0098] The processor 300 may be arithmetic means such as
25 an arithmetic unit, a microprocessor, a microcomputer, a
central processing unit (CPU), or a digital signal
processor (DSP). The memory 302 can include, for example,
a non-volatile or volatile semiconductor memory such as a
random access memory (RAM), a read only memory (ROM), a
30 flash memory, an erasable programmable ROM (EPROM), or an
electrically EPROM (EEPROM (registered trademark)), a
magnetic disk, a flexible disk, an optical disk, a compact
disc, a mini disc, or a digital versatile disc (DVD).
29
[0099] The memory 302 stores programs for executing all
or some of the arithmetic functions of the control
arithmetic unit 10a. The processor 300 transmits and
receives necessary information via the interface 304, and
5 can perform PWM control on the converter 2 by executing the
program stored in the memory 302.
[0100] Moreover, the processor 300 and the memory 302
illustrated in FIG. 17 may be replaced with a processing
circuit 303 as in FIG. 18. The processing circuit 303
10 corresponds to a single circuit, a complex circuit, an
application specific integrated circuit (ASIC), a field
programmable gate array (FPGA), or a combination of those.
[0101] Second Embodiment.
In a second embodiment, stability conditions of the
15 current control system of the controller 10 according to
the first embodiment will be considered. First, an openloop
transfer function of the current control system to
which the current control unit 15 according to the first
embodiment is applied is represented by the following
20 expression.
[0102] [Expression 11]
...(11)
[0103] In the above expression (11), when the
denominator polynomial is represented by “D (s)” and the
numerator polynomial is represented by “N (s)”, a closed25
loop transfer function of the current control system is
represented by the following expression.
[0104] [Expression 12]
...(12)
[0105] Also, the transfer function K2 (s) of the second






2 2
2
s + 2ζ rs + r
r
1
R +sL
K2 s
G s


Ds+ Ns
N s
H s 
30
amplifier 153 is set as follows, where “Kp” is a
proportional gain and “Ti” is an integration time constant.
[0106] [Expression 13]
...(13)
[0107] Here, in order to evaluate the stability of the
5 current control system, a characteristic polynomial φ (s)
of the current control system is determined. The
characteristic polynomial φ (s) is represented by the
following expression.
[0108] [Expression 14]
...(14)
10 [0109] In the above expression (14), “a0” to “a4” are
coefficients of the characteristic polynomial φ (s), and “α”
is the proportional gain of the first amplifier 151. Of
the coefficients “a0” to “a4”, the expressions representing
the coefficients “a2” to “a4” do not include a negative
15 sign, and all the constants are positive. Thus, the values
of the coefficients “a2” to “a4” are positive. Therefore,
in order for the current control system to be stable, at
least the coefficients “a0” and “a1” of the polynomial need
to be positive. First, the following expression is
20 obtained from a condition of a1>0.
[0110] [Expression 15]






sTi
1
K2 s Kp 1+











a0 Kp r 1
a1 Ti r R +Kp 1 + 2Kpζ r
a2 Ti r rL + 2ζ R +Kp +Kp
a3 Ti Kp+R + 2ζ rL
a4 TiL
s N s +D s aks
2
2
4
k 0
k
31
...(15)
[0111] Also, in order for a0>0 to be satisfied, α<1 need
only be satisfied. Here, the second and third terms on the
right side of the above expression (15) are clearly
positive. Therefore, a required condition for the current
5 control system to be stable is α<1. A condition for
achieving a negative phase response of the first amplifier
151 is α>0. Considering the above conditions, it is
desirable to set the proportional gain α of the first
amplifier 151 in the range of 0<α<1. Here, it can be
10 confirmed that the current control system is stable by
substituting α=1, which is a boundary condition, into the
above expression (14) and evaluating the polynomial
coefficients “a0” to “a4” on the basis of the Routh
stability criterion. Furthermore, when α=0, the first
15 amplifier is ineffective so that the configuration is the
same as that of a conventional current control system.
Therefore, when the proportional gain α of the first
amplifier 151 is set in the range of 0<α<1, the stability
of the current control system can be maintained without
20 adding another control system.
[0112] Note that the frequency characteristics of the
transfer function may be calculated by replacing the
Laplace operator of the transfer function with s=jω.
Moreover, expression (8) representing the transfer function
25 of the first amplifier 151 agrees with the proportional
gain α when s=0. Therefore, “setting the proportional gain
α of the first amplifier 151 in the range of 0<α<1” may be
rephrased as “setting the gain for the direct current
component in the range of 0<α<1”.
30 [0113] As described above, in the controller according
to the second embodiment, the proportional gain α of the
Ti r
2ζ
+
Kp
R
α 1+


32
first amplifier is set in the range of 0<α<1 so that the
stability of the current control system can be maintained
without adding another control system.
[0114] Third Embodiment.
5 In a third embodiment, a variation of the current
control unit 15 according to the first embodiment
illustrated in FIG. 8 will be described. The current
control unit 15 according to the first embodiment may be
configured as in the following variation.
10 [0115] FIG. 19 is a diagram illustrating a first
variation of the current control unit 15 according to the
first embodiment. In FIG. 19, a component identical or
equivalent to that of FIG. 8 is indicated by the same
reference numeral or symbol as that assigned to the
15 component in FIG. 8.
[0116] In a current control unit 15C illustrated in FIG.
19, the second amplifier 153 amplifies the current control
error Δis. Also, the control system including the first
amplifier 151 amplifies the output of the second amplifier
20 153. Then, the subtractor 152 outputs a difference between
the output of the second amplifier 153 and the output of
the first amplifier 151 as the voltage compensation amount
Δvc.
[0117] FIG. 20 is a diagram illustrating a second
25 variation of the current control unit 15 according to the
first embodiment. In a current control unit 15D of FIG. 20,
a component identical or equivalent to that of FIG. 8 is
indicated by the same reference numeral or symbol as that
assigned to the component in FIG. 8.
30 [0118] In the current control unit 15D illustrated in
FIG. 20, the first amplifier 151 amplifies the current
control error Δis. There are also two of the second
amplifiers 153, where one second amplifier 153a amplifies
33
the current control error Δis, and another second amplifier
153b amplifies the output of the first amplifier 151. Then,
a subtractor 157 outputs a difference between the output of
the one second amplifier 153a and the output of the other
5 second amplifier 153b as the voltage compensation amount
Δvc.
[0119] FIG. 21 is a diagram illustrating a third
variation of the current control unit 15 according to the
first embodiment. In a current control unit 15E of FIG. 21,
10 a component identical or equivalent to that of FIG. 8 is
indicated by the same reference numeral or symbol as that
assigned to the component in FIG. 8.
[0120] The current control unit 15E illustrated in FIG.
21 also includes two of the second amplifiers 153, where
15 the one second amplifier 153a and the other second
amplifier 153b both amplify the current control error Δis.
Moreover, the first amplifier 151 amplifies the output of
the other second amplifier 153b. Then, the subtractor 157
outputs a difference between the output of the one second
20 amplifier 153a and the output of the first amplifier 151 as
the voltage compensation amount Δvc.
[0121] In all of the first to third variations
illustrated in FIGS. 19 to 21, the second amplifier 153 or
the second amplifiers 153a and 153b are each a P controller
25 or PI controller. Also, the first amplifier 151 satisfies
conditions similar to those of the first embodiment.
[0122] The current control units 15, 15C, 15D, and 15E
illustrated in FIGS. 8 and 19 to 21 can all be represented
by the following transfer function equivalent in terms of
30 the mathematical expression.
[0123] [Expression 16]
...(16)
[0124] As described above, the current control unit
GsK2s1K1s
34
according to the present invention is a linear system
including three types of controllers being the first
amplifier, the second amplifier, and the subtractor.
Therefore, any configuration other than those illustrated
5 in FIGS. 8 and 19 to 21 may be used as long as the
equivalent conversion can be performed by the commutative
law, the distributive law, or the associative law. That is,
the current control unit according to the present invention
may have any configuration as long as the transfer function
10 of the current control unit can be expressed in the form of
the above expression (16).
[0125] Fourth Embodiment.
FIG. 22 is a block diagram illustrating a
configuration of a feedback controller 20 according to a
15 fourth embodiment. FIG. 22 illustrates the current control
system of the first embodiment illustrated in FIG. 6 in a
block diagram of a more generalized feedback control system.
Note that in FIG. 22, a component identical or equivalent
to that of FIGS. 6 and 8 is indicated by the same reference
20 numeral or symbol as that assigned to the component in FIGS.
6 and 8.
[0126] In FIG. 22, the feedback controller 20 according
to the fourth embodiment includes a subtractor 14 and a
control unit 24. The control unit 24 corresponds to the
25 current control unit 15 illustrated in FIG. 6. A control
object 26 is on the output side of the control unit 24, and
a model output “y”, which is the output of the control
object 26, is fed back to the subtractor 14. The
subtractor 14 generates a control error “e” by subtracting
30 the model output “y” from a command signal “r”. The
control unit 24 amplifies the control error “e” and
calculates a control variable “u” to be input to the
control object 26. A transfer function of the control unit
35
24 is denoted by “K (s)”, and a transfer function of the
control object 26 is denoted by “P (s)”.
[0127] In FIG. 22, the current control unit 24 includes
a first amplifier 241, a subtractor 242, and a second
5 amplifier 243. The first amplifier 241 corresponds to the
first amplifier 151 illustrated in FIG. 8, the subtractor
242 corresponds to the subtractor 152 illustrated in FIG. 8,
and the second amplifier 243 corresponds to the second
amplifier 153 illustrated in FIG. 8. Also, a transfer
10 function of the first amplifier 241 is denoted by “K1 (s)”,
and a transfer function of the second amplifier 243 is
denoted by “K2 (s)”.
[0128] Here, it is assumed that the first amplifier 241
is a controller satisfying the following conditions when
15 the command signal “r” is a sinusoidal signal that
oscillates at the frequency ωr.
[0129] ∙ Exhibiting resonance characteristics at the
frequency ωr.
∙ Having a negative phase response characteristic at
20 the frequency ωr.
∙ Having a monotonically decreasing gain in a
frequency region higher than the frequency ωr.
[0130] Moreover, as in the first embodiment, it is
assumed that the transfer function P (s) of the control
25 object 26 is represented by P (s)=1/(R+sL) as a first order
lag form, and R<<ωrL holds when the model constant of the
control object 26 is near the frequency ωr. At this time,
the first amplifier 241 need only satisfy the following
conditions.
30 [0131] ∙ Exhibiting resonance characteristics at the
frequency ωr.
∙ Having the phase response of -90 degrees at the
frequency ωr.
36
∙ Having a monotonically decreasing gain in a
frequency region higher than the frequency ωr.
[0132] Furthermore, as a simple amplifier that satisfies
the above conditions, the first amplifier 241 may be a
5 second order lag system as represented by the above
expression (8). In this case, “α” being the proportional
gain of the first amplifier 241 is in the range of 0<α<1.
When the proportional gain α is set to a value within this
range, the control system of the feedback controller 20 can
10 be stabilized by the control unit 24. Note that as the
second amplifier 243, a P controller or PI controller is
used as in the first embodiment.
[0133] At this time, the open-loop transfer function of
the feedback control system illustrated in FIG. 22 has the
15 frequency characteristics as indicated by the solid lines
in FIG. 10, for example. In FIG. 10, the frequency ωr
corresponds to the natural frequency, and the open-loop
transfer function of the feedback control system has the
maximum gain and the phase of almost zero degree at the
20 frequency ωr. This means that the control error “e” is
substantially in phase with the command signal “r”
oscillating at the frequency ωr, which further means that
the model output “y” is substantially in phase with the
command signal “r”. Therefore, the followability of the
25 model output “y” with respect to the command signal “r” is
improved.
[0134] Moreover, the open-loop transfer function of the
feedback control system illustrated in FIG. 22 has almost
no increase in gain or phase lag at a frequency higher than
30 the frequency ωr as compared with the characteristics
indicated by the dashed lines in FIG. 10, that is, the
characteristics when the control unit 24 includes only the
second amplifier 243. Accordingly, the control response at
37
a frequency higher than the frequency ωr is determined
predominantly by the parameters of the second amplifier 243
alone. Therefore, the feedback controller 20 according to
the fourth embodiment can secure sufficient gain margin and
5 phase margin while ensuring the ease of design of the
control unit 24.
[0135] Note that the configuration illustrated in the
aforementioned embodiment merely illustrates an example of
the content of the present invention, and can thus be
10 combined with another known technique or partially omitted
and/or modified without departing from the scope of the
present invention.
Reference Signs List
15 [0136] 1alternating current power supply; 2converter;
3load; 4impedance element; 10controller; 10acontrol
arithmetic unit; 11phase calculation unit; 12, 14, 16, 152,
157, 242subtractor; 13voltage control unit; 13aunit sine
wave generation unit; 13bPI controller; 13cmultiplier; 15,
20 15A, 15B, 15C, 15D, 15Ecurrent control unit; 17switching
command generation unit; 20feedback controller; 24control
unit; 26, 52control object; 100drive system; 151, 241first
amplifier; 153, 153a, 153b, 243second amplifier;
154bandpass filter; 155adder; 156high-pass filter;
25 300processor; 302memory; 303processing circuit;
304interface.
38
WE CLAIM:
1. A feedback controller comprising a control unit to
amplify an error between a command signal and output of a
control object, and to calculate a control variable to be
5 input to the control object, wherein
the control unit comprises:
a first amplifier to resonate at a frequency of the
command signal; and
a second amplifier to perform a proportional
10 calculation or a proportional integral calculation,
when a transfer function of the first amplifier is
represented by “K1 (s)”, and
a transfer function of the second amplifier is
represented by “K2 (s)”, then
15 a transfer function of the control unit is represented
by “K2 (s) (1-K1 (s))”, and
the first amplifier has:
a negative phase response with respect to the
frequency of the command signal; and
20 a gain that decreases monotonically in a frequency
region higher than the frequency of the command signal.
2. The feedback controller according to claim 1, wherein
the first amplifier is a second order lag system with a
25 natural frequency matching the frequency of the command
signal.
3. The feedback controller according to claim 1 or 2,
wherein the first amplifier has a gain of greater than zero
30 and less than one with respect to a direct current
component.
4. A controller for a power converter that converts
39
alternating current power output from an alternating
current power supply into direct current power, wherein
the controller comprises
a current control unit to generate a voltage
5 compensation amount on the basis of an error between a
current command value that is a target value of current to
be passed to an alternating current side of the power
converter, and an actual current on the alternating current
side,
10 the current control unit comprises the control unit
included in the feedback controller according to any one of
claims 1 to 3,
the frequency of the command signal corresponds to a
frequency of the alternating current power supply, and
15 the control variable corresponds to the voltage
compensation amount.