We claim:
1. A power converter (120) for Medium Voltage (MV) grid integration, comprising:
three half-bridge circuits (202, 204, 206), wherein each half bridge circuit of the
three half bridge circuits (202, 204, 206) are adapted to connect in parallel to a DC
5 source (110);
a high-frequency transformer (210) comprising:
three primary windings (212a, 212b, 212c) connected in a delta
configuration,
wherein each half bridge is connected to a terminal of the three primary
10 windings (212a, 212b, 212c); and
a plurality of secondary windings (214a, 216a, 218a …, 214p; 216p,
218p) associated with a three-phase medium voltage grid (150),
wherein the plurality of secondary windings (214a, 216a, 218a …, 214p;
216p, 218p ) are arranged as a first set of secondary windings (214a, 216a, 218a)
15 associated with a first phase of the three-phase medium voltage grid (150), a
second set of secondary windings (214ba, 216b, 218b) associated with a second
phase of the three-phase medium voltage grid (150) and a third set of secondary
windings (214c, 216cb, 218c) associated with a third phase of the three-phase
medium voltage grid (150),
20 a first set of rectifiers (222a, 222b, …, 222p) are connected in parallel to the
coils (214a, 214b, …, 214p) of the first set of secondary windings,
a second set of rectifiers are connected in parallel to the coils (216a, 216b, …,
216p) of the second set of secondary windings; and
a third set of rectifiers are connected in parallel to the coils (218a, 218b, …,
25 218p) of the third set of secondary windings;
a first set of line frequency inverter-unfolder modules (224a, 224b, …, 224p)
are coupled in parallel with the first set of rectifiers (222a, 222b, …, 222p), wherein
outputs of the first set of line frequency -unfolder modules (224a, 224b, …, 224p) are
connected in a cascade arrangement to form the first phase of the three-phase medium
30 voltage grid (150);
a second set of line frequency inverter-unfolder modules coupled in parallel
with the second set of rectifiers, wherein outputs of the second set of line frequency
27
unfolder modules are connected in cascade to form the second phase of the three-phase
medium voltage grid (150);
a third set of line frequency inverter-unfolder modules coupled in parallel with
the third set of rectifiers, wherein outputs of the third set of line frequency unfolder
5 modules are connected in cascade to form the third phase of the three-phase medium
voltage grid (150).
2. The power converter (150) as claimed in claim 1, wherein the first set of secondary
windings (214a, 216a, 218a), the second set of secondary windings (214b, 216b, 218b)
10 and the third set of secondary windings (214c, 216c, 218c) are electrically coupled to a
corresponding primary winding (202, 204, 206).
3. The power converter (120) as claimed in claim 1, wherein each half bridge circuit of
the three half bridge circuits (202, 204, 206) comprises a first transistor and a second
15 transistor connected in series, wherein each half bridge circuit comprises a midpoint
connected to respective terminal of the three primary windings (202, 204, 206).
4. The power converter as claimed in claim 1, wherein the outputs of each of the first set
of line frequency unfolder modules (224a, 224b, …, 224p), the outputs of each of the
20 second set of line frequency unfolder modules, and the outputs of each of the third set
of line frequency unfolder modules are passed through an Inductance-Capacitance (LC)
filter prior to cascading.
5. A system (100) for integration with a Medium Voltage (MV) grid (150), comprising:
25 a power converter (120), comprising:
three half-bridge circuits (202, 204, 206), wherein each half bridge circuit
of the three half bridge circuits (202, 204, 206) are adapted to connect in parallel to
a DC source (110);
a high-frequency transformer (210) comprising:
30 three primary windings (212a, 212b, 212c) connected in a delta
configuration,
wherein each half bridge is connected to a terminal of the three
primary windings (212a, 212b, 212c); and
28
a plurality of secondary windings (214a, 216a, 218a …, 214p; 216p,
218p) associated with a three-phase medium voltage grid (150),
wherein the plurality of secondary windings (214a, 216a, 218a …,
214p; 216p, 218p) are arranged as a first set of secondary windings (214a,
5 216a, 218a) associated with a first phase of the three-phase medium voltage
grid (150), a second set of secondary windings (214b, 216b, 218b)
associated with a second phase of the three-phase medium voltage grid (150)
and a third set of secondary windings (214c, 216c, 218c) associated with a
third phase of the three-phase medium voltage grid (150),
10 a first set of rectifiers (222a, 222b, …, 222p) are connected in parallel to
coils (214a, 214b, …, 214p)of first set of secondary windings,
a second set of rectifiers are connected in parallel to the coils (216a, 216b,
…, 216p) of the second set of secondary windings; and
a third set of rectifiers are connected in parallel to coils (218a, 218b, …,
15 218p) of the third set of secondary windings;
a first set of line frequency inverter-unfolder modules (224a, 224b, …,
224p) are coupled in parallel with the first set of rectifiers (222a, 222b, …, 222p),
wherein outputs of the first set of line frequency -unfolder modules (224a, 224b,
…, 224p) are connected in a cascade arrangement to form the first phase of the
20 three-phase medium voltage grid (150);
a second set of line frequency inverter-unfolder modules coupled in parallel
with the second set of rectifiers, wherein outputs of the second set of line frequency
unfolder modules are connected in cascade to form the second phase of the threephase medium voltage grid (150);
25 a third set of line frequency inverter-unfolder modules coupled in parallel
with the third set of rectifiers, wherein outputs of the third set of line frequency
unfolder modules are connected in cascade to form the third phase of the threephase medium voltage grid (150); and
a control unit (130) for generating a first set of switching signals, a second set
30 of switching signals and a third set of switching signals for respective half bridge
circuits of the three half bridge circuits (202, 204, 206).
29
6. The system (100) as claimed in claim 5, wherein the control unit (130) is configured to:
determine a maximum modulation signal, a minimum modulation signal and a
medium modulation signal from a first modulation signal, a second modulation signal
and a third modulation signal every 60଴
,
5 wherein each of the first modulation signal, the second modulation signal and
the third modulation signal are associated with respective primary winding of three
primary windings connected in a delta configuration;
determine a reference half bridge circuit from three half bridge circuits (202,
204, 206) based on the maximum modulation signal;
10 determine a first phase shift based on a switching time period (Ts) and the
maximum modulation signal;
determine a second phase shift based on the switching time period (Ts) and one
of: the minimum modulation signal and the medium modulation signal; and
generate a first switching signal, a second switching signal and a third switching
15 signal for respective half bridge circuit of the three half bridge circuits (202, 204, 206),
wherein the second switching signal is based on the first phase shift and the third
switching signal is based on the second phase shift.
7. A method for operating a power converter (120), comprising:
20 determining, by a processor (302), a maximum modulation signal, a minimum
modulation signal and a medium modulation signal from a first modulation signal, a
second modulation signal and a third modulation signal every 60଴
;
wherein each of the first modulation signal, the second modulation signal and
the third modulation signal are associated with respective primary winding of three
25 primary windings connected in a delta configuration;
determining, by the processor (302), a reference half bridge circuit from three
half bridge circuits (202, 204, 206) based on the maximum modulation signal;
determining, by the processor (302), a first phase shift based on a switching time
period (Ts) and the maximum modulation signal;
30 determining, by the processor (302), a second phase shift based on the switching
time period (Ts) and one of: the minimum modulation signal and the medium
modulation signal; and
generating, by the processor (302), a first switching signal, a second switching
signal and a third switching signal for respective half bridge circuit of the three half
30
bridge circuits (202, 204, 206), wherein the second switching signal is based on the first
phase shift and the third switching signal is based on the second phase shift.
8. The method as claimed in claim 7, wherein the first phase shift, and the second phase
5 shift are sinusoidally pulse width modulated signals.
9. The method as claimed in claim 7, wherein the maximum modulation signal (𝑚௠௔௫),
minimum modulation signal (𝑚௠௜௡) and the medium modulation signal (𝑚௠௜ௗ) are related
by 𝑚௠௔௫ = 𝑚௠௜ௗ + 𝑚௠௜௡.
We claim:
1. A power converter (120) for Medium Voltage (MV) grid integration, comprising:
three half-bridge circuits (202, 204, 206), wherein each half bridge circuit of the
three half bridge circuits (202, 204, 206) are adapted to connect in parallel to a DC
5 source (110);
a high-frequency transformer (210) comprising:
three primary windings (212a, 212b, 212c) connected in a delta
configuration,
wherein each half bridge is connected to a terminal of the three primary
10 windings (212a, 212b, 212c); and
a plurality of secondary windings (214a, 216a, 218a …, 214p; 216p,
218p) associated with a three-phase medium voltage grid (150),
wherein the plurality of secondary windings (214a, 216a, 218a …, 214p;
216p, 218p ) are arranged as a first set of secondary windings (214a, 216a, 218a)
15 associated with a first phase of the three-phase medium voltage grid (150), a
second set of secondary windings (214ba, 216b, 218b) associated with a second
phase of the three-phase medium voltage grid (150) and a third set of secondary
windings (214c, 216cb, 218c) associated with a third phase of the three-phase
medium voltage grid (150),
20 a first set of rectifiers (222a, 222b, …, 222p) are connected in parallel to the
coils (214a, 214b, …, 214p) of the first set of secondary windings,
a second set of rectifiers are connected in parallel to the coils (216a, 216b, …,
216p) of the second set of secondary windings; and
a third set of rectifiers are connected in parallel to the coils (218a, 218b, …,
25 218p) of the third set of secondary windings;
a first set of line frequency inverter-unfolder modules (224a, 224b, …, 224p)
are coupled in parallel with the first set of rectifiers (222a, 222b, …, 222p), wherein
outputs of the first set of line frequency -unfolder modules (224a, 224b, …, 224p) are
connected in a cascade arrangement to form the first phase of the three-phase medium
30 voltage grid (150);
a second set of line frequency inverter-unfolder modules coupled in parallel
with the second set of rectifiers, wherein outputs of the second set of line frequency
27
unfolder modules are connected in cascade to form the second phase of the three-phase
medium voltage grid (150);
a third set of line frequency inverter-unfolder modules coupled in parallel with
the third set of rectifiers, wherein outputs of the third set of line frequency unfolder
5 modules are connected in cascade to form the third phase of the three-phase medium
voltage grid (150).
2. The power converter (150) as claimed in claim 1, wherein the first set of secondary
windings (214a, 216a, 218a), the second set of secondary windings (214b, 216b, 218b)
10 and the third set of secondary windings (214c, 216c, 218c) are electrically coupled to a
corresponding primary winding (202, 204, 206).
3. The power converter (120) as claimed in claim 1, wherein each half bridge circuit of
the three half bridge circuits (202, 204, 206) comprises a first transistor and a second
15 transistor connected in series, wherein each half bridge circuit comprises a midpoint
connected to respective terminal of the three primary windings (202, 204, 206).
4. The power converter as claimed in claim 1, wherein the outputs of each of the first set
of line frequency unfolder modules (224a, 224b, …, 224p), the outputs of each of the
20 second set of line frequency unfolder modules, and the outputs of each of the third set
of line frequency unfolder modules are passed through an Inductance-Capacitance (LC)
filter prior to cascading.
5. A system (100) for integration with a Medium Voltage (MV) grid (150), comprising:
25 a power converter (120), comprising:
three half-bridge circuits (202, 204, 206), wherein each half bridge circuit
of the three half bridge circuits (202, 204, 206) are adapted to connect in parallel to
a DC source (110);
a high-frequency transformer (210) comprising:
30 three primary windings (212a, 212b, 212c) connected in a delta
configuration,
wherein each half bridge is connected to a terminal of the three
primary windings (212a, 212b, 212c); and
28
a plurality of secondary windings (214a, 216a, 218a …, 214p; 216p,
218p) associated with a three-phase medium voltage grid (150),
wherein the plurality of secondary windings (214a, 216a, 218a …,
214p; 216p, 218p) are arranged as a first set of secondary windings (214a,
5 216a, 218a) associated with a first phase of the three-phase medium voltage
grid (150), a second set of secondary windings (214b, 216b, 218b)
associated with a second phase of the three-phase medium voltage grid (150)
and a third set of secondary windings (214c, 216c, 218c) associated with a
third phase of the three-phase medium voltage grid (150),
10 a first set of rectifiers (222a, 222b, …, 222p) are connected in parallel to
coils (214a, 214b, …, 214p)of first set of secondary windings,
a second set of rectifiers are connected in parallel to the coils (216a, 216b,
…, 216p) of the second set of secondary windings; and
a third set of rectifiers are connected in parallel to coils (218a, 218b, …,
15 218p) of the third set of secondary windings;
a first set of line frequency inverter-unfolder modules (224a, 224b, …,
224p) are coupled in parallel with the first set of rectifiers (222a, 222b, …, 222p),
wherein outputs of the first set of line frequency -unfolder modules (224a, 224b,
…, 224p) are connected in a cascade arrangement to form the first phase of the
20 three-phase medium voltage grid (150);
a second set of line frequency inverter-unfolder modules coupled in parallel
with the second set of rectifiers, wherein outputs of the second set of line frequency
unfolder modules are connected in cascade to form the second phase of the threephase medium voltage grid (150);
25 a third set of line frequency inverter-unfolder modules coupled in parallel
with the third set of rectifiers, wherein outputs of the third set of line frequency
unfolder modules are connected in cascade to form the third phase of the threephase medium voltage grid (150); and
a control unit (130) for generating a first set of switching signals, a second set
30 of switching signals and a third set of switching signals for respective half bridge
circuits of the three half bridge circuits (202, 204, 206).
29
6. The system (100) as claimed in claim 5, wherein the control unit (130) is configured to:
determine a maximum modulation signal, a minimum modulation signal and a
medium modulation signal from a first modulation signal, a second modulation signal
and a third modulation signal every 60଴
,
5 wherein each of the first modulation signal, the second modulation signal and
the third modulation signal are associated with respective primary winding of three
primary windings connected in a delta configuration;
determine a reference half bridge circuit from three half bridge circuits (202,
204, 206) based on the maximum modulation signal;
10 determine a first phase shift based on a switching time period (Ts) and the
maximum modulation signal;
determine a second phase shift based on the switching time period (Ts) and one
of: the minimum modulation signal and the medium modulation signal; and
generate a first switching signal, a second switching signal and a third switching
15 signal for respective half bridge circuit of the three half bridge circuits (202, 204, 206),
wherein the second switching signal is based on the first phase shift and the third
switching signal is based on the second phase shift.
7. A method for operating a power converter (120), comprising:
20 determining, by a processor (302), a maximum modulation signal, a minimum
modulation signal and a medium modulation signal from a first modulation signal, a
second modulation signal and a third modulation signal every 60଴
;
wherein each of the first modulation signal, the second modulation signal and
the third modulation signal are associated with respective primary winding of three
25 primary windings connected in a delta configuration;
determining, by the processor (302), a reference half bridge circuit from three
half bridge circuits (202, 204, 206) based on the maximum modulation signal;
determining, by the processor (302), a first phase shift based on a switching time
period (Ts) and the maximum modulation signal;
30 determining, by the processor (302), a second phase shift based on the switching
time period (Ts) and one of: the minimum modulation signal and the medium
modulation signal; and
generating, by the processor (302), a first switching signal, a second switching
signal and a third switching signal for respective half bridge circuit of the three half
30
bridge circuits (202, 204, 206), wherein the second switching signal is based on the first
phase shift and the third switching signal is based on the second phase shift.
8. The method as claimed in claim 7, wherein the first phase shift, and the second phase
5 shift are sinusoidally pulse width modulated signals.
9. The method as claimed in claim 7, wherein the maximum modulation signal (𝑚௠௔௫),
minimum modulation signal (𝑚௠௜௡) and the medium modulation signal (𝑚௠௜ௗ) are related
by 𝑚௠௔௫ = 𝑚௠௜ௗ + 𝑚௠௜௡.