Power divider and power combiner
TECHNICAL FIELD
The invention relates t o a device for splitting or combining broadband signals, through a
power circuit that can be used as a power divider or power combiner comprising two distinct
sections dividing one transmission line into two transmission lines or combining two
transmission lines into one transmission line. The power circuit is especially suitable for
microwave and millimetre-wave circuitry such as e.g. power amplifiers, phase-array antennas,
mixers and active circulators.
BACKGROUND ART
Power dividers and power combiners, also known as power splitters are passive devices used
t o divide or combine the amount of electromagnetic power in a transmission line t o which the
device is connected. Power circuits such as power dividers and power combiners are useful for
distributing power among various paths and are of importance in a wide array of electronic
equipment such as power amplifiers, phase-array antennas, mixers and active circulators.
They can also be used t o measure or monitor feeds t o and from antennae, o r used in cable
television or telephone lines.
There are many known power divider/combiner designs, and one commonly employed,
especially at frequencies above 500 MHz, is one commonly referred t o as a Wilkinson Power
Divider, described in "An N-way Power Divider" by E. Wilkinson, IEEE Transactions on
Microwave Theory and Techniques, MTT-8, No. 1, January 1960, pages 116-118. The common
Wilkinson power divider comprises two transmission lines running from an inport to two
outports. The transmission lines are connected by an isolating resistor.
The Wilkinson power divider has numerous advantages over other power dividers, such as
being constructed out of passive components, making it reciprocal, allowing it t o be used as a
power combiner as well. Further, the design allows for a high degree of isolation between
ports, which may be crucial during certain implementations. The Wilkinson power divider is
further lossless to a very high degree.
For applications requiring a larger bandwidth, a development of the Wilkinson power divider is
often employed, called a multisection Wilkinson divider in which, after the first isolating
resistor, additional impedances are deployed on both transmission lines, as well as another
isolating resistor connecting them, or equivalent structures.
Depending on the application or the frequencies used, such a Wilkinson power divider can
become relatively large. In various applications where space is at a very high premium,
implementing such a Wilkinson power divider or a similar power combiner may then prove
difficult or impossible.
There is thus room for an improved power circuit that can be used as a power divider or
power combiner.
SUMMARY OF THE INVENTION
An object of the present disclosure is to provide an improved power divider and/or power
combiner.
The object of the invention is achieved by a power circuit according to claim 1. This power
circuit comprises a stepped impedance section and a core section, said stepped impedance
section and said core section being connected by an interconnection. The power circuit has a
first, a second and a third port. The stepped impedance section comprises the first port and a
first transmission line running from said first port to the interconnection. The core section
comprises the second port and the third port, and a second transmission line running from
said interconnection to the second port and a third transmission line running from the
interconnection to the third port. The second and third transmission lines each have at least a
first and a second core subsection. The second and third transmission lines have an equal
number of core subsections, each core subsection having an impedance. The core subsections
form pairs of core subsections, where the first pair of core subsections comprises the first core
subsection of the second transmission line and the first core subsection of the third
transmission line and the second pair of core subsections comprises the second core
subsection of the second transmission line and the second core subsection of the third
transmission line. Each pair of core subsections further comprise resistance means connecting
said second and third transmission lines. The power circuit is characterised in that the first
transmission line comprises at least two stepped impedance subsections; where the
impedance of the transmission line in each of the at least two stepped impedance subsections
differs; the impedances of each core subsection of the second and third transmission lines are
equal; the resistance of each of the resistance means connecting the second and third
transmission lines in each pair of core subsections also differs, and the number of stepped
impedance subsections of the stepped impedance section and the number of pairs of core
subsections of the core section is equal.
A power circuit according to the invention reduces the associated impedances of the
transmission lines near the excitation RF-port. This means that the amount of dielectric or
other insulating agents of the circuit can be reduced, as there is less need for isolation. This
allows the size of the power circuit to be reduced. Alternatively, this allows more power
and/or higher bandwidths to be used with the power circuit without an increase in the size of
the power circuit. This allows the power circuit to be used in applications where space is at a
premium, and where conventionally designed power circuits are too large. In complex
systems, the amount of components can be very large, and thus even a small improvement in
size can result in noticeable improvements, especially true for multilayer arrangements.
In one development of the invention, the impedances of the stepped impedance subsections
of the stepped impedance section decrease stepwise from the first port towards the
interconnection.
In one development of the invention, the impedances of the stepped impedance subsections
is lower than the port impedances of the first, second and third ports. In yet another
development of the invention, the impedances of the stepped impedance subsections is
greater than half of the port impedances of the first, second and third ports.
In one development of the invention, the number of stepped impedance subsections of the
stepped impedance subsection and the number of pairs of core subsections of the core
section are equal to three.
In one development of the invention, the impedances of the core subsections are equal to 50
Ohms. In a further development of the invention, the impedances of the core subsections are
equal to the port impedances of the first, second and third ports. Setting the transmission line
impedances to 50 Ohms allows the power circuit to be used in 50 Ohm systems without
requiring too much modification of the signal. Preferably, the circuit has even power split, with
a coupling factor of -3.0 dB.
Preferably, the signals to be combined or divided by the power circuit are broadband signals
that have a frequency in the range between 4 GHz to 20 GHz. In one embodiment of the
invention, the power circuit is implemented as a stripline or microstrip. The invention can also
be realized as a printed circuit board. The invention can also be realized as a coplanar
waveguide. The invention can also be implemented in MMIC.
In one preferred development of the invention, the power circuit is used as a power divider. In
this development, the first port is an input port, and the second and third ports are output
ports. This also defines the port impedance of the first port to be an input impedance, and the
port impedances of the second and third ports to be output impedances. In another
development of the invention, the power circuit is used as a power combiner. In this
development, the second and third ports are input ports, and the first port is an output port.
This also defines the port impedances of the second and third ports to be input impedances,
and the port impedance of the first port to be an output impedance.
The object of the invention is also achieved by a power circuit system according to the
invention, said system comprising at least a first and a second power circuit according to the
invention. This is realised by connecting the second or third port of the first power circuit to
the first port of the second power circuit. This has the advantage of allowing power
combination or power division among additional ports. Additional number of circuits can be
used, such e.g. if a first power circuit is connected to a second and a third power circuit by
connecting the second and third ports of the first power circuit to the first port of the second
and third power circuits, a power circuit system is realized which could combine or divide
power into or amongst four ports respectively. Further, the circuits could be connected such
that only one of the second and third ports of the first power circuit is connected to a second
power circuit, while the other of the second and third ports is connected t o a different
component. This could provide e.g. unequal power division, or a suitable measuring point.
The invention also relates t o an antenna array, which comprises a power circuit according to
the disclosure.
BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 shows a schematic image of a power circuit according t o the invention,
Fig. 2 shows a power circuit according t o the invention where the number of stepped
impedance subsections and the number of pairs of core subsections are equal t o
three,
Fig. 3 shows a power circuit according t o the invention where the number of stepped
impedance subsections and the number of pairs of core subsections are equal t o
N, and
Fig. 4 shows a schematic image of a power circuit system according t o the invention.
DETAILED DESCRIPTION
Various aspects of the disclosure will hereinafter be described in conjunction with the
appended drawings t o illustrate and not t o limit the disclosure, wherein like designations
denote like elements, and variations of the described aspects are not restricted t o the
specifically shown embodiment, but are applicable on other variations of the disclosure.
Fig. 1 shows a schematic image of a power circuit 10 according t o the invention. The power
circuit 10 has a first port 11, a second port 12 and a third port 13. The power circuit 10 has
port impedances Z0. The power circuit 10 has a stepped impedance section 20 and a core
section 30 interconnected at an interconnection 14. The stepped impedance section 20
comprises the first port 11 and a first transmission line 21 running from the first port 11 t o the
interconnection 14. The core section 30 comprises the second and third ports 12, 13, a second
transmission line 31 which runs from the interconnection 14 t o the second port 12 and a third
transmission line 32 which runs from the interconnection 14 t o the third port 13. The core
section 30 also comprises resistance means which connect the second and third transmission
lines 31, 32.
Fig. 2 shows a power circuit 10 according t o the invention. In the example shown in Fig. 2, the
power circuit 10 is used as a power divider. The power divider 10 has a first port 11, a second
port 12 and a third port 13. The first port of the power divider has an input impedance Z0 and
the second and third ports have output impedances Z0. The power divider comprises a
stepped impedance section 20, and a core section 30. The stepped impedance section 20 and
the core section 30 are interconnected at an interconnection 14. The stepped impedance
section 20 comprises the first port 11, and a first transmission line 21 which runs from the first
port 11 t o the interconnection 14.
The core section 30 comprises the second and third ports 12, 13, and a second and third
transmission line 31, 32. The second transmission line 31 runs from the interconnection 14 t o
the second port 12, and the third transmission line 32 runs from the interconnection t o the
third port 13. The second and third transmission lines 31, 32 have three core subsections each.
The second transmission line 31 has three core subsections 311, 312, 313 and the third
transmission line 32 also has three core subsections 321, 322, 323. The number of core
subsections of the second and third transmission lines 31, 32 is preferably equal. The core
subsections each have an impedance Z. The core subsections form three pairs 361, 362, 363
of core subsections, where the first pair 361 of core subsections comprises the first core
subsection 311 of the second transmission line 31, and the first core subsection 321 of the
third transmission line 32, the second pair 362 of core subsections comprises the second core
subsection 312 of the second transmission line 31 and the second core subsection 322 of the
third transmission line 32 and the third pair 363 of core subsections comprises the third core
subsection 313 of the second transmission line 31 and the third core subsection 323 of the
third transmission line 32. Each pair of core subsections comprises resistance means 371, 372,
373 connecting the core subsections of each pair. As illustrated in Fig. 2, the core subsections
that make up a pair of core subsections are located at essentially the same location on their
respective transmission lines 31, 32. The resistance means of the pair is connected t o the
transmission lines 31, 32 at the end of the core subsections closest t o the output ports. The
power circuit is advantageously symmetrical in its structure.
The first transmission line 21 comprises three stepped impedance subsections 251, 252, 253
where each stepped impedance subsection has an impedance Z i, Z 2, Z 3, . The impedance Z i,
Z 2, Z 3, of each of the stepped impedance subsections differs. The number of stepped
impedance subsections, and the number of pairs of core subsections is preferably equal. The
impedances Z i, Z 2, Z 3 of each of the stepped impedance subsections 251, 252, 253
preferably decrease stepwise from first port 11 towards the interconnection 14. The
impedances Z i, Z 2, Z 3 of the first transmission line 21 in each of the stepped impedance
subsections 251, 252, 253 are less than the input and output impedances Z0, and are also
greater than half of the input and output impedances Z0. These relationships yield the
relationship as follows:
The core subsections 311, 312, 313, 321, 322, 323 of each pair 361, 362, 363 of core
subsections have equal impedance Z. Further, each pair of core subsections has equal
impedance. Thus, the first pair 361 has the same impedance Zi in both of the core subsections
311, 321 of the pair 361, the second pair 362 has the same impedance Z2 in both of the core
subsections 312, 322 of the pair 362 and the third pair 363 has the same impedance Z3 in both
of the core subsections 313, 323 of the pair 363, and further, all the impedances Zi, Z2, Z3 of
each of the pairs of core subsections of the second and third transmission lines 31, 32 are all
equal. The impedances Zi, Z2, Z3 of each of the pairs of core subsections of the second and
third transmission lines 31, 32 are all equal to the associated input and output impedances Z0
of the power divider. The impedances Zi, Z2, Z3 of each of the pairs of core subsection of the
second and third transmission lines 31, 32 and the associated input and output impedances Z0
of the power divider are equal to 50 Ohms. This relationship yields the relationship as follows:
Z = Z2 = Z = Z = 50 Ohms [W]
50 Ohms is used in this example, but it is also possible to design the power circuit 10 for other
input and output impedances Z0 such as e.g. 25, 30, 60, 70 or 90.
The resistances i , R2, R3 of each of the resistance means 371, 372, 373 connecting the second
and third transmission lines 31, 32 differs. The resistances Ri, R2, R3 of each of the resistance
means decrease from the second and third ports 12, 13 towards the interconnection 14. This
yields the relationship as follows:
The power circuit 10 is reciprocal. Depending on what the ports 11, 12, 13 are connected to,
the power circuit may be used as either a power divider or a power combiner. Using the first
port 11 as an input port and the second and third ports 12, 13 as output ports, a power divider
is formed dividing power inputted in the first port 11 between the second and third ports 12,
13, as shown in the example according to Fig. 2. In a further example, the power circuit is used
as a power combiner, by using the second and third ports 12, 13 as input ports and the first
port 11 as an output port, combining the power inputted in the second and third ports 12, 13
and outputting the combined power at the first port 11.
Fig. 3 shows a power circuit 100 according to the invention. The power circuit 100 shown in
Fig. 3 is similar in structure to the power circuit 10 shown in Fig. 2 and discussed above. The
power circuit is in this example a power divider. The power divider has a first port 11, a second
port 12 and a third port 13. The first port of the power divider has an input impedance Z0 and
the second and third ports have output impedances Z0. The power divider comprises a
stepped impedance section 20, and a core section 30. The stepped impedance section 20 and
the core section 30 are interconnected at an interconnection 14. The stepped impedance
section 20 comprises the first port 11, and a first transmission line 21 which runs from the first
port 11 to the interconnection 14.
The core section 30 comprises the second and third ports 12, 13, and a second and third
transmission line 31, 32. The second transmission line 31runs from the interconnection 14 to
the second port 12, and the third transmission line 32 runs from the interconnection to the
third port 13. The second and third transmission lines 31, 32 have N number of core
subsections each. The second transmission line 31 has N number of core subsections 311, 312,
313, 31N and the third transmission line 32 also has N number of core subsections 321, 322,
323, 32N. The number of core subsections of the second and third transmission lines 31, 32 is
preferably equal. The core subsections each have an impedance Z. The core subsections form
N pairs 361, 362, 363, 36N of core subsections, where the first pair 361 of core subsections
comprises the first core subsection 311 of the second transmission line 31, and the first core
subsection 321 of the third tra nsmission line 32, the second pair 362 of core subsections
com prises the second core subsection 312 of the second tra nsmission line 31 and the second
core subsection 322 of the third tra nsmission line 32 and the third pai r 363 of core subsections
com prises the thi rd core subsection 313 of the second tra nsmission line 31 and the third core
subsection 323 of the thi rd tra nsmission line 32, and where the N-th pai r of core subsections
com prises the N-th core subsection 31N of the second tra nsmission line and the N-th core
subsection 32N of the thi rd tra nsmission li ne. Each pai r of core subsections com prises N
resista nce mea ns 371, 372, 373, 37N connecti ng the core subsections of each pai r. As
illustrated in Fig. 2, the core su bsections that make up a pair of core subsections are located at
essentia lly the same location on their respective tra nsmission lines 31, 32. The resista nce
mea ns of the pai r of core su bsections is con nected t o the tra nsm ission lines 31, 32 at the end
of the core subsections closest t o the output ports. The power ci rcuit is adva ntageously
sym metrica l in its structure.
The f irst tra nsmission line 21 com prises N num ber of stepped impeda nce subsections 251,
252, 253 where each stepped impeda nce subsection has an impeda nce Z i , Z 2, Z 3, Z N- The
impeda nce Z i , Z 2, Z 3, Z N of each of the stepped impeda nce subsections differs. The
impeda nces Z i , Z 2, Z 3, Z N of each of the stepped impeda nce subsections 251, 252, 253
prefera bly decrease stepwise from f irst port 11 towa rds the interconnection 14. The
impeda nces Z i , Z 2, Z 3, Z N of the tra nsmission line 21 in each of the stepped impeda nce
subsections 251, 252, 253 are less tha n the input and output impeda nces Z0, and also greater
tha n half of the input and output impeda nces Z0
Fig. 3 shows a power circuit 100 where the number of stepped impeda nce subsections of the
stepped impeda nce section 20 and the num ber of pairs of core subsections of the core
section 30 is equa l t o N. This cha nges the releva nt mathematical relationships to:
< ZTI < T2 < T3 < ...< ZTN < Z o; V ( Zti , Z t 2, Zt 3, ..., ZTN) '
Z = Z 2 = Z 3 = · ·· = ZN = Z 0 = 50 Ohms [W ]
RN < ... < R3 < R2 < R
The power circuit 100 is reci proca l and may be used as either a power divider or a power
com biner. In the exam ple discussed and shown in Fig. 3, the power ci rcuit 100 is a power
divider. Instead using the second and third ports 12, 13 as input ports and the f irst port 11 as
an output port, the power circuit 100 may be used as a power com biner.
The impeda nces Z i , Z 2, Z 3 Z Nof the f irst tra nsmission line 21 can be synthesised usi ng any
appropriate synthesizi ng equations or f ilters such as e.g. Butterworth, Chebyshev, Ca uer or
Bessel equations or filters. Most suita ble for this application are Chebyshev eq uations also
called Chebyshev tra nsforms, and prefera bly, the order of Chebyshev tra nsforms is equa l t o
the number of pai rs of core subsections. Prefera bly, the power ci rcuit has a coupling factor of -
3.0 dB, i.e. equal power split.
While the examples described in the above disclose ci rcuits where the num ber of stepped
impeda nce subsections, and the num ber of pai rs of core subsections are equa l t o three or
more, for some applications it is sufficient t o use a circuit with two stepped impeda nce
subsections, and two pairs of core subsections. Thus the invention relates t o a power circuit
com prising at least two stepped impeda nce subsections and at least two pairs of core
subsections.
The power ci rcuits shown in Figs. 2 and 3 are prefera bly implemented in stripline, but other
implementations are also possible such as in microstrip, copla nar waveguide, through discrete
com ponents on a printed ci rcuit boa rd, etc. In certain implementations such as e.g. stripline,
designing the power circuit 10 for input and output impeda nces Z0 of 70 Ohms or above is
difficult. Thus input and output impedances Z0 of less tha n 70 Ohms is preferred.
Preferably, the ci rcuit is used for broad band signa ls with a freq uency in the range between 4
and 20 GHz as an example. As the number of stepped impeda nce subsections and pairs of core
subsections increase, the bandwidth increases.
Prefera bly, the length of each of the stepped impeda nce su bsections and the length of each of
the core subsections is equa l t o a qua rter of the wavelength of the center frequency of the
power ci rcuit..
Fig. 4 shows a schematic image of a power circuit system 50 accordi ng to the invention. The
power ci rcuit system 50 com prises a f irst 70, a second 80, and a third 90 power ci rcuit
corresponding t o the power ci rcuit 10 accordi ng t o the invention. The second and thi rd ports
of the f irst power circuit 70 are connected t o the first port of the second and the third power
circuits 80, 90 respectively by means of connecting transmission lines 59. In this example, the
power circuit system is a 1:4 power dividing system, wherein the first port of the first circuit is
used as an input port and the second and third ports of the second and third power circuits
are used as output ports. The power circuit system has an input port 51, and output ports 52,
53, 54, 55. The input port 51 of the power circuit system is the same as the first port of the
first power circuit, and the output ports of the power circuit system are the same as the
second and third ports of the second and third power circuits. The connecting transmission
lines have an impedance Z0. When implementing the power circuit system 50 in a stripline,
microstrip, coplanar waveguide or the like, the connecting transmission lines 59 preferably
have a length equal to a quarter wavelength of the center frequency of the circuit multiplied
by a coefficient k. The coefficient k is preferably an uneven number which depends on
numerical analysis of the circuit, especially influenced by the number of stepped impedance
subsections and pairs of core subsections. For a power system with three power circuits, k is
preferably equal to three. This value of k will result in good matching at the ports of the power
circuit system, especially the input port. In another example, the power circuit system is
instead used as a 4:1 power combining system, wherein the second and third ports of the
second and third power circuits are used as input ports and the first port of the first circuit is
used as an output port.
The power circuit system may be constructed in other variants as well to meet other
requirements of the system. The power circuit system may include additional power circuits
connected to the to achieve a different 1:M or M:l power division or power combination
respectively. The power circuit system may also include a number of power circuits with
unequal power division or power combination, allowing for other combinations. M will most
often be an even number. A power circuit system may comprise both power circuits used as
power dividers and power circuits used as power combiners to achieve a desired 1:M or M:l
power division or power combination.
The power circuits used in the power circuit system may be any power circuit according to the
invention such as e.g. the one described in Fig. 2 or the one described in Fig. 3.
The power circuit and power circuit system can be implemented in an antenna array for use
e.g. in radio applications requiring signal transmission in several channels.
CLAIMS
1. Power circuit (10, 100) suitable for combining or splitting broadband signals, the circuit
(10, 100) comprising: a stepped impedance section (20), a core section (30) and a first,
second and third port (11, 12, 13), said stepped impedance section (20) and said core
section (30) being interconnected at an interconnection (14), and where said stepped
impedance section (20) comprises the first port (11) and a first transmission line (21)
running from said first port (11) to said interconnection (14), and where said core
section (20) comprises the second port (12) and the third port (13), and a second
transmission line (31) running from said interconnection (14) to the second port (12)
and a third transmission line (32) running from said interconnection (14) to the third
port (13), and where the second and third transmission lines (31, 32) each have at least
a first and a second core subsection (311, 312, 313, 31N, 321, 322, 323, 32N), where
the number of core subsections (311, 312, 313, 31N) of the second transmission line
(31) and the number of core subsections (321, 322, 323, 32N) of the third transmission
line (32) is equal, each core subsection (311, 312, 313, 31N, 321, 322, 323, 32N) having
an impedance, said core subsections (311, 312, 313, 31N, 321, 322, 323, 32N) forming
at least two pairs (361, 362, 363, 36N) of core subsections where the first pair (361) of
core subsections (311, 312, 313, 31N, 321, 322, 323, 32N) comprises the first core
subsection (311) of the second transmission line (31) and the first core subsection
(321) of the third transmission line (32) and the second pair (362) of core subsections
comprises the second core subsection (312) of the second transmission line (31) and
the second core subsection (322) of the third transmission line (32), and each pair
(361, 362, 363, 36N) of core subsections (311, 312, 313, 31N, 321, 322, 323, 32N)
comprises resistance means (371, 372, 373, 37N) connecting the core subsections,
characterised in that
the first transmission line (21) comprises at least two stepped impedance
subsections (251, 252, 253, 25N), each stepped impedance subsection (251, 252, 253,
25N) having an impedance, and where the impedances of the at least two stepped
impedance subsections (251, 252, 253, 25N) differs, and in that,
the impedances of each core subsection (311, 312, 313, 31N, 321, 322, 323, 32N)
of said second and third transmission lines (31, 32) are equal, and the resistance of
each of the resistance means (371, 372, 373, 37N) connecting said second and third
transmission lines (31, 32) in each pair (361, 362, 363, 36N) of core subsections (311,
312, 313, 31N, 321, 322, 323, 32N) differs, and in that
the number of stepped impedance subsections (251, 252, 253, 25N) of the
stepped impedance section (20) is equal t o the number of pairs (361, 362, 363, 36N) of
core subsections (311, 312, 313, 31N, 321, 322, 323, 32N) of the core section (30).
2. Power circuit (10, 100) according t o claim 1, where the impedances of each of the
stepped impedance subsections (251, 252, 253, 25N) decrease stepwise from the first
port (11) towards the interconnection (14).
3. Power circuit (10, 100) according t o any of the preceding claims, where the
impedances of each of the stepped impedance subsections (251, 252, 253, 25N) are
less than the port impedances of the first, second and third ports (11, 12, 13).
4. Power circuit (10, 100) according t o any of the preceding claims, where the
impedances of each of the stepped impedance subsections (251, 252, 253, 25N) are
greater than half of the port impedances of the first, second and third ports (11, 12,
13).
5. Power circuit (10, 100) according t o any of the preceding claims, where the resistances
of the resistance means (371, 372, 373, 37N) of the core section (30) decreases from
the second and third ports (12, 13) towards the interconnection (14).
6. Power circuit (10, 100) according t o any of the preceding claims, where the number of
stepped impedance subsections (251, 252, 253, 25N) of the stepped impedance
section (20) and the number of pairs of core subsections (311, 312, 313, 31N, 321, 322,
323, 32N) of the core section (20) are both equal t o three.
7. Power circuit (10, 100) according t o any of the preceding claims, where the
impedances of the core subsections (311, 312, 313, 31N, 321, 322, 323, 32N) of the
core section (30) is equal t o the port impedances of the first, second and third ports
(11, 12, 13).
8. Power circuit (10, 100) according to any of the preceding claims, where the
impedances of the core subsections (311, 312, 313, 31N, 321, 322, 323, 32N) of the
core section (30) is equal to 50 Ohms.
9. Power circuit (10, 100) according to any of the preceding claims, where said broadband
signals have a frequency in the range between 4 and 20 GHz.
10. Power circuit (10, 100) according to any of the preceding claims, where the first port
(11) is an input port and the second and third ports (12, 13) are output ports, forming a
power divider.
11. Power circuit (10, 100) according to any of claims 1-9, where the second and third
ports (12, 13) are input ports and the first port (11) is an output port, forming a power
combiner.
12. Power circuit (10, 100) according to any of the preceding claims, where said power
circuit (10, 100) is implemented on a substrate such as a stripline, a microstrip or as a
coplanar waveguide.
13. Power circuit (10, 100) according to claim 12, where each stepped impedance
subsection (251, 252, 253, 25N) of said stepped impedance section (20) and each core
subsection (311, 312, 313, 31N, 321, 322, 323, 32N) of the core section (30) have a
length equal to a quarter wavelength of the center frequency of the power circuit (10,
100).
14. Power circuit (10, 100) according to any of claims 1-11, where said power circuit (10,
100) is implemented using printed circuit board technology.
15. Power circuit system (50), the power circuit system (50) comprising at least a first and
a second power circuit (70, 80) according to any of the preceding claims, where the
second port of the first power circuit (70) is connected to the first port of the second
power circuit (80).
16. Power circuit (50) system according to claim 15, the power circuit system (50) further
comprising a third power circuit (90) according to any of claims 1-14, where the third
port of the first power circuit (70) is connected to the first port of the third power
circuit (90).
17. Power circuit system (50) according to any of claims 15 or 16, where M number of
power circuits (70, 80, 90) according to any of claims 1-14 are connected to form a 1 to
M+l power circuit system (50) or an M+l to 1 power circuit system (50).
18. Power circuit system (50) according to any of claims 15- 17, where the power circuits
(70, 80, 90) are connected by connecting transmission lines (59).
19. Power circuit system (50) according to claim 18, where the connecting transmission
lines (59) have a length equal to a quarter wavelength of the center frequency of the
power circuits (70, 80, 90) of the power circuit system (50) multiplied by a coefficient k.
20. Antenna array, comprising a power circuit according to any of claims 1-14.