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Realization Of Active Filter Circuit

Abstract: REALIZATION OF ACTIVE FILTER CIRCUIT Realization of active filter circuits using current conveyor by employing minimum active and passive components comprising two current conveyors, four resistors and two grounded capacitors while a second circuit realized using two current conveyors, one operational transconductance amplifier (OTA), four resistor and two capacitors, the second circuit is a modified version of a first circuit.

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
29 January 2021
Publication Number
07/2021
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
pujakr@gmail.com
Parent Application

Applicants

Himalayan University
Jullang Village, Near Central Jail, Itanagar Distt: Papumpare Arunachal Pradesh India
Mangalayatan University
Extended NCR, 33rd Milestone, Mathura-Aligarh Highway, Beswan Aligarh Uttar Pradesh India

Inventors

1. Rajesh Kumar
Mo. Unchi Boodh, Trilok Giri Marg, Near Kamla MEmo. English School, Chaudhary Bada Gola Gokarannath, Kheri Uttar Pradesh India 262802
2. Dr. Ghanshyam Singh
Professor, Himalayan University Jullang Village, Near Central Jail, Itanagar Distt: Papumpare Arunachal Pradesh India 791111
3. Dr. Y.P Singh
Associate Professor, Mangalayatan University Extended NCR, 33rd Milestone, Mathura-Aligarh Highway, Beswan Aligarh Uttar Pradesh India 202145

Specification

BRIEF DESCRIPTION OF FIGURES

[0005] The invention is illustrated in the accompanying drawings, throughout which like reference letters indicate corresponding parts in the various figures. The embodiments herein will be better understood from the following description with reference to the drawings, in which:
[0006] FIG. 1 illustrates a block diagram of a balanced output current conveyor.
[0007] FIG. 2 illustrates a voltage mode multifunction filter using the balanced current conveyor.
[0008] FIG. 3 through FIG. 8 illustrate simulation result for the proposed filter.

DETAILED DESCRIPTION OF INVENTION
[0009] In the following detailed description of embodiments of the invention, numerous specific details are set forth in order to provide a thorough understanding of the embodiment of invention. However, it will be obvious to a person skilled in the art that the embodiments of the invention may be practiced with or without these specific details. In other instances, well known methods, procedures and components have not been described in details so as not to unnecessarily obscure aspects of the embodiments of the invention.
[0010] Furthermore, it will be clear that the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions and equivalents will be apparent to those skilled in the art, without parting from the scope of the invention.
[0011] Conditional language used herein, such as, among others, "can," "may," "might," "may," “e.g.,” and the like, unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain embodiments include, while other embodiments do not include, certain features, elements and/or steps. Thus, such conditional language is not generally intended to imply that features, elements and/or steps are in any way required for one or more embodiments or that one or more embodiments necessarily include logic for deciding, with or without other input or prompting, whether these features, elements and/or steps are included or are to be performed in any particular embodiment. The terms “comprising,” “including,” “having,” and the like are synonymous and are used inclusively, in an open-ended fashion, and do not exclude additional elements, features, acts, operations, and so forth. Also, the term “or” is used in its inclusive sense (and not in its exclusive sense) so that when used, for example, to connect a list of elements, the term “or” means one, some, or all of the elements in the list.
[0012] Disjunctive language such as the phrase “at least one of X, Y, Z,” unless specifically stated otherwise, is otherwise understood with the context as used in general to present that an item, term, etc., may be either X, Y, or Z, or any combination thereof (e.g., X, Y, and/or Z). Thus, such disjunctive language is not generally intended to, and should not, imply that certain embodiments require at least one of X, at least one of Y, or at least one of Z to each be present.
[0013] The accompanying drawings are used to help easily understand various technical features and it should be understood that the embodiments presented herein are not limited by the accompanying drawings. As such, the present disclosure should be construed to extend to any alterations, equivalents and substitutes in addition to those which are particularly set out in the accompanying drawings. Although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are generally only used to distinguish one element from another.
[0014] Realization of active filter circuits using current conveyor by employing minimum active and passive components is disclosed that comprises two current conveyors, four resistors and two grounded capacitors while a second circuit realized using two current conveyors, one operational transconductance amplifier (OTA), four resistor and two capacitors, the second circuit is a modified version of a first circuit. The second circuit is on chip tunable for more than a decade range. The circuit provides more number of filter realization at the single output terminal and does not have any matching constraint/cancellation conditions. Further, it is suitable for IC fabrication as it employs grounded capacitor. The realization is orthogonally tunable between the cutoff frequency and the bandwidth. It can be tuned linearly when the bias current of the OTA is higher than the output current. The sensitivity figures of the circuit for active and passive components are low.
[0015] The proposed filter realization employs two balanced output second generation current conveyors (CCII). A balanced output CCII is a four-terminal device, which is obtained with the combination of CCII+ and CCII-. This balanced output current conveyor, represented symbolically by FIG. 1, may be described by the following terminal characteristics.

where the parameters B and K are frequency dependent and ideally B=1 and K=1. All the basic filters (low pass, high pass, band pass and notch filter) may be realized by selecting appropriate input terminals of the circuit. The proposed voltage mode multifunction filter circuit employs two balanced output second generation current conveyors (CCII), four resistors and two grounded capacitors as shown in FIG. 2. The circuit has one output terminal and four input terminals. The analysis and simulation results of the realized filter are given in the following subsections.
[0016] The transfer function of the circuit is

[0017] Thus, by using above equation all five filters responses low-pass, high-pass, band-pass notch and all-pass can be realized at the single output terminal by selecting the proper input terminals as shown in Table 1.

[0018] Since all the filter transfer functions have same characteristics equations, the cutoff/central frequency, bandwidth and the quality factor of all the filters are same, and are respectively given by following equations:

[0019] From the perusal of above equations, it is clear that using resistance R3 the quality factor of the filter can be changed without affecting the cutoff/central frequency. The sensitivity analysis of the proposed circuit in terms of cutoff/central frequency and the quality factor is as follows:


[0020] As per these equations the sensitivity of Q and ?0 with respect to passive components parameter variation is +1/2 except .
[0021] Practically, the parameters B and K are frequency dependent. The parameter B1, K1 and B2 and K2 represent the corresponding gain of the two dual output current conveyors and their values are real and close to unity. The behaviour of the circuit at the output terminal may therefore be expressed as:

[0022] The cutoff/central frequency, bandwidth and the quality factor of the filters with non-ideal parameters are therefore given by the following equations:

[0023] It is observed that bandwidth of the filter does not depend on the non-ideal parameters and the effect on the cutoff/central frequency and the quality factor is negligible. The sensitivity analysis of the cutoff/central frequency and the quality factor is obtained in terms of following equations:

[0024] So, it is observed that sensitivity of Q and ?0 are +1/2 except
[0025] The balanced current conveyor in the proposed circuit is realized by the commercially available AD844 and the operational transconductance amplifier LM13700. AD844 in open-loop mode it acts as CCII+. For the realization of CCII-, the output of the AD844 is fed to LM13700. The bias current of the LM13700 and load impedance at the input terminal of OTA is adjusted such that output current of OTA is in out of phase with the output current of the AD844. FIG. 3 through FIG. 8 displays the simulation result for the proposed filter which matches with the designed specifications. The circuit is designed for f0 = 22.5 kHz and Q=14.14 by considering R1 = R4 = R6 = 10kO, C2 = C5 = 1 nF and R3 = 100kO. The theoretical results are verified to match with simulation result.
[0026] The various actions, acts, blocks, steps, or the like in the flow chart may be performed in the order presented, in a different order or simultaneously. Further, in some embodiments, some of the actions, acts, blocks, steps, or the like may be omitted, added, modified, skipped, or the like without departing from the scope of the invention.
[0027] The embodiments disclosed herein can be implemented using at least one software program running on at least one hardware device and performing network management functions to control the elements.
[0028] The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the spirit and scope of the embodiments as described herein.

We claim:

1. Realization of active filter circuits using current conveyor by employing minimum active and passive components comprising two current conveyors, four resistors and two grounded capacitors while a second circuit realized using two current conveyors, one operational transconductance amplifier (OTA), four resistor and two capacitors, the second circuit is a modified version of a first circuit.

Documents

Application Documents

# Name Date
1 202131003964-COMPLETE SPECIFICATION [29-01-2021(online)].pdf 2021-01-29
1 202131003964-STATEMENT OF UNDERTAKING (FORM 3) [29-01-2021(online)].pdf 2021-01-29
2 202131003964-DECLARATION OF INVENTORSHIP (FORM 5) [29-01-2021(online)].pdf 2021-01-29
2 202131003964-REQUEST FOR EARLY PUBLICATION(FORM-9) [29-01-2021(online)].pdf 2021-01-29
3 202131003964-DRAWINGS [29-01-2021(online)].pdf 2021-01-29
3 202131003964-POWER OF AUTHORITY [29-01-2021(online)].pdf 2021-01-29
4 202131003964-FORM 1 [29-01-2021(online)].pdf 2021-01-29
4 202131003964-FORM-9 [29-01-2021(online)].pdf 2021-01-29
5 202131003964-FORM 1 [29-01-2021(online)].pdf 2021-01-29
5 202131003964-FORM-9 [29-01-2021(online)].pdf 2021-01-29
6 202131003964-DRAWINGS [29-01-2021(online)].pdf 2021-01-29
6 202131003964-POWER OF AUTHORITY [29-01-2021(online)].pdf 2021-01-29
7 202131003964-DECLARATION OF INVENTORSHIP (FORM 5) [29-01-2021(online)].pdf 2021-01-29
7 202131003964-REQUEST FOR EARLY PUBLICATION(FORM-9) [29-01-2021(online)].pdf 2021-01-29
8 202131003964-COMPLETE SPECIFICATION [29-01-2021(online)].pdf 2021-01-29
8 202131003964-STATEMENT OF UNDERTAKING (FORM 3) [29-01-2021(online)].pdf 2021-01-29