1
DESCRIPTION
RECEIVING APPARATUS AND TRANSMITTING-RECEIVING APPARATUS
5 Field
[0001] The present invention relates to a receiving apparatus and a transmitting-receiving apparatus that estimate a channel in wireless communication.
10 Background
[0002] Conventional base stations and terminals that perform wireless communication periodically transmit and receive control signals. The base station and the terminal convert information on reception conditions such as
15 received signal field strength by using the control signals to determine the mutual channel state. The base station that has determined the channel state of the terminal specifies, for the terminal, an operation in a multi-antenna transmission and reception scheme, such as a
20 modulation and coding scheme (MCS) or spatially multiplexed signal separation, and the radio resources to be allocated to the terminal, so as to implement adaptive radio transmission in accordance with the state of the channel between the base station and the terminal. When
25 establishing adaptive radio transmission, the base station
and the terminal need to receive control signals accurately. Control signal transmission requires high reception performance in order to resist noise interference and radio propagation path fluctuations due to fading.
30 [0003] To obtain high reception performance when
transmitting control signals, a transmitting-side apparatus typically performs processing to increase the redundancy on the control signals by applying a low code rate in an

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error-correction code or by applying repetition processing or spread processing using a spreading sequence or the like. Further, the transmitting-side apparatus typically uses a modulation scheme having noise interference resistance in 5 which the distance between signal points is large, with a modulation level such as binary phase-shift keying (BPSK) or quadrature phase-shift keying (QPSK). Hereinafter, transmission of control signals is referred to as control signal transmission, and radio transmission of data
10 performed after exchange of control signals is referred to as data transmission.
[0004] A terminal moving at high speed tends to be degraded in the performance of detecting signals to be demodulated because deviation occurs between the channel
15 value estimated using pilot signals that have a known
pattern between the terminal and a base station and the channel value of the signals to be demodulated. Patent Literature 1 described below discloses a technique that is in response to this problem and that involves assigning
20 control signals to symbol positions adjacent to pilot
signals during control signal transmission in a Long Term Evolution (LTE) system standardized by 3GPP. By arranging control signals and pilot signals adjacently, an error in the estimation of a control signal channel is reduced, so
25 that degradation in detection performance experienced by
control signal transmission due to channel fluctuations can be reduced.
[0005] In the uplink in an LTE system, single-carrier block transmission (hereinafter, referred to as SCBT) is
30 used, which has lower peak performance and places a smaller load on power amplifiers than the orthogonal frequency-division multiplex (OFDM) used in the downlink. It is called multi-access scheme single-carrier frequency-

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3
division multiple access (SC-FDMA) (Non Patent Literature 1 described below). In the LTE uplink, the physical uplink shared channel (PUSCH) is sometimes used to transmit control signals. When the PUSCH is used, a transmitting-5 side apparatus separately encodes data signals and control signals, then multiplexes them, and applies interleaving to a multiplexed sequence to generate an SC-FDMA symbol. A pilot signal is assigned to the third and thirteenth subframes, and an SC-FDMA symbol containing control signals
10 is assigned the positions near the pilot signals to prevent degradation in the performance of receiving the control signals.
[0006] When SCBT is adapted for use in a high-speed mobile environment, a transmitting-side apparatus disposes
15 an SC-FDMA control symbol, which is an SC-FDMA symbol
containing control signals, near an SC-FDMA pilot symbol, which is an SC-FDMA symbol made up of pilot signals. However, even when a receiving-side apparatus can accurately detect the SC-FDMA control signal symbol, its
20 reception performance for an SC-FDMA data symbol, which is an SC-FDMA symbol made up of data signals and is away from the SC-FDMA pilot symbol, may be degraded under the influence of a channel estimation error due to channel fluctuations. In particular, when a high modulation level
25 is used in SC-FDMA data symbols, degradation in reception
performance becomes conspicuous. By increasing the rate of insertion of SC-FDMA pilot symbols and disposing SC-FDMA data symbols near SC-FDMA pilot symbols, degradation in the performance of receiving the SC-FDMA data symbols due to
30 channel fluctuations can be avoided. On the other hand, the increased rate of insertion of SC-FDMA pilot symbols leads to a reduction in transmission efficiency. [0007] Patent Literature 2 described below discloses a

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technique that is in response to this problem and that involves achieving efficient insertion of pilot signals while maintaining low peak performance in SCBT. The dispersed arrangement of pilot signals implemented in OFDM 5 can be implemented also in SCBT.
Citation List
Patent Literature
[0008] Patent Literature 1: JP 2013-102505 A
10 Patent Literature 2: JP 2013-529015 A
Non Patent Literature
[0009] Non Patent Literature 1: 3GPP TS36.212 V9.2.0,
3rd Generation Partnership Project; Technical Specification
Group Radio Access Network; Evolved Universal Terrestrial 15 Radio Access (E-UTRA); Multiplexing and channel coding
(Release 9), 2010-06
Summary Technical Problem
20 [0010] However, the above-described conventional
techniques perform processing on control signals to obtain higher reception performance than that of data signals. Thus, there is a problem in that even when a receiving-side apparatus performs, on data signals that have not been
25 subjected to processing to obtain high reception performance in contrast to control signals at a transmitting-side apparatus, the same channel estimation as that for control signals using pilot signals, the reception performance equal to that of control signals cannot be
30 obtained.
[0011] The present invention has been made in view of the above and has an object of providing a receiving apparatus that can have an improved performance of

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receiving data signals and control signals.
Solution to Problem
[0012] To solve the above-described problem and achieve 5 the object, a receiving apparatus according to an aspect of the present invention includes a first channel estimator to estimate a channel for a control signal using a pilot signal that is extracted from a received signal that is received from a transmitting apparatus and contains a data
10 signal transmitted to the receiving apparatus, the control signal containing control information to be used in processing of receiving the data signal by the receiving apparatus, and the pilot signal having a pattern known between the receiving apparatus and the transmitting
15 apparatus, and generate a first channel estimate value that is a result of estimation. Moreover, the receiving apparatus includes a first frequency domain equalizer to perform frequency domain equalization processing on the control signal by using the first channel estimate value,
20 and output an equalized control signal. Furthermore, the receiving apparatus includes a control signal demodulator to demodulate the equalized control signal. Moreover, the receiving apparatus includes a control signal encoder to encode a demodulated equalized control signal. Furthermore,
25 the receiving apparatus includes a replica generator to generate, from the encoded equalized control signal, a control signal replica that is a replica signal of the control signal. Moreover, the receiving apparatus includes a second channel estimator to estimate a channel for the
30 data signal by using the control signal replica and the
first channel estimate value, and generate a second channel estimate value that is a result of estimation. Furthermore, the receiving apparatus includes a second frequency domain

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equalizer to perform frequency domain equalization processing on the data signal by using the second channel estimate value.
5 Advantageous Effects of Invention
[0013] The present invention achieves an effect of being able to improve the performance of receiving data signals and control signals.
10 Brief Description of Drawings
[0014] FIG. 1 is a block diagram illustrating an example configuration of a transmitting apparatus according to a first embodiment.
FIG. 2 is a block diagram illustrating an example 15 configuration of a control signal encoder according to the first embodiment.
FIG. 3 is a block diagram illustrating an example configuration of a receiving apparatus according to the first embodiment. 20 FIG. 4 is a block diagram illustrating an example
configuration of a control signal demodulator according to the first embodiment.
FIG. 5 is a diagram illustrating an example of a dispersed arrangement in which data signals and control 25 signals are orthogonalized in the frequency domain in the first embodiment.
FIG. 6 is a flowchart illustrating an example of processing of generating an SCBT symbol at the transmitting apparatus according to the first embodiment. 30 FIG. 7 is a flowchart illustrating an example of
processing of receiving an SCBT symbol at the receiving apparatus according to the first embodiment.
FIG. 8 is a diagram illustrating an example of an SCBT

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symbol arrangement at the transmitting apparatus according to the first embodiment and an SCBT symbol arrangement in a comparative example.
FIG. 9 is a diagram illustrating an example of an 5 arrangement of SCBT symbols containing control signals at the transmitting apparatus according to the first embodiment.
FIG. 10 is a diagram illustrating a hardware configuration implementing the configuration of the 10 transmitting apparatus according to the first embodiment.
FIG. 11 is a diagram illustrating a hardware configuration implementing the configuration of the receiving apparatus according to the first embodiment.
FIG. 12 is a block diagram illustrating an example 15 configuration of a synchronization processing unit according to a second embodiment.
FIG. 13 is a block diagram illustrating an example configuration of a transmitting-receiving apparatus according to a third embodiment. 20
Description of Embodiments
[0015] Hereinafter, a receiving apparatus and a transmitting-receiving apparatus according to embodiments of the present invention will be described in detail with 25 reference to the drawings. The embodiments are not intended to limit the invention. [0016] First Embodiment.
FIG. 1 is a block diagram illustrating an example configuration of a transmitting apparatus 100 according to 30 a first embodiment of the present invention. In the
transmitting apparatus 100 for SCBT, an error-correction encoder 101 performs error-correction processing on an information bit sequence on the basis of the code rate

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specified by a controller 106. Error correction includes a block code, a convolutional code, and the like, but is not limited to them. An interleaver 102 performs interleaving on the information bit sequence that has been subjected to 5 the error-correction processing on the basis of the
interleaver size or pattern specified by the controller 106, for changing the sequence of code words to convert a burst error to a random error. A mapping unit 103 is a data signal output unit that performs symbol mapping based on a
10 multiple level specified by the controller 106 on the
interleaved information bit sequence, and generates and outputs data signals to be transmitted to a receiving apparatus described below. [0017] A pilot generator 104 is a pilot signal output
15 unit that generates and outputs pilot signals having a
pattern known between the transmitting apparatus and the receiving apparatus, according to an instruction of the controller 106. [0018] A control signal encoder 105 is a control signal
20 output unit that generates a control bit sequence, which is a signal of a bit sequence, from a control instruction signal; performs mapping after encoding processing; and generates and outputs control signals. Suppose the control signal contains control information to be used in data
25 signal reception processing at the receiving apparatus. The detailed operation of the control signal encoder 105 will be described below.
[0019] A multiplexer 107 receives, in a block made up of single carrier symbols, which are SCBT symbols, the data
30 signals generated by the mapping unit 103, the pilot signals generated by the pilot generator 104, and the control signals generated by the control signal encoder 105; multiplexes the data signals, the pilot signals, and

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the control signals or selects the data signals, the pilot signals, or the control signals in accordance with the control of the controller 106; and then outputs the signal. [0020] The controller 106 controls data signal 5 generation in the error-correction encoder 101, the
interleaver 102, and the mapping unit 103, pilot signal generation in the pilot generator 104, control signal generation in the control signal encoder 105, and multiplexing processing in the multiplexer 107.
10 [0021] A guard interval (GI) inserter 108 inserts a
guard interval (hereinafter, referred to as GI) into the multiplexed signal input from the multiplexer 107, and generates and outputs an SCBT symbol. [0022] FIG. 2 is a block diagram illustrating an example
15 configuration of the control signal encoder 105 according
to the first embodiment. In the control signal encoder 105, a control bit generator 111 generates and outputs a control bit sequence corresponding to an input control instruction signal. An encoding processing unit 112 performs
20 redundancy processing on the control bit sequence input
from the control bit generator 111 in order to increase the noise interference resistance and improve the reception performance at the receiving apparatus. Specifically, the encoding processing unit 112 performs redundancy processing
25 such as error-correction encoding, interleaving, repetition, or spread processing. A mapping unit 113 performs symbol mapping based on the multiple level specified by the controller 106 on the control bit sequence that has been subjected to the redundancy processing and is input from
30 the encoding processing unit 112, and generates and outputs control signals. The control signal encoder 105 may perform redundancy processing such as repetition or spread processing after mapping.

Docket No. PMDA-17017-PCT
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10
15

[0023] In SCBT, the transmitting-side apparatus typically generates SCBT pilot symbols from pilot signals, and generates SCBT symbols in a frame format in which SCBT pilot symbols are inserted on the time axis between SCBT data symbols generated from data signals. For control signals, like pilot signals, the transmitting-side apparatus generates an SCBT control signal symbol by allocating control signals to all the resources constituting one SCBT symbol, and multiplexes it between SCBT data symbols. The transmitting-side apparatus can also multiplex data signals and control signals to form one SCBT symbol. In this case, data signals and control signals are in a superimposed form in the frequency domain, and the f-th frequency component D(f) is expressed by the following formula (1). In formula (1), d(t) corresponds to a data signal, c(t) corresponds to a control signal, and Nd corresponds to the number of data signals relative to the number of signals NFFT formed in an SCBT symbol. [0024] [Formula 1]

f
D(f)
20
25
30

Y|
1
t
t
j2nf
j2nf
f
£ d(t) exp
N
N
+ Z c(t) exp
FFT J
FFT Ji:
NFFT I t=o
[0025] The present embodiment has characteristics in the control of multiplexing processing in the multiplexer 107 by the controller 106, i.e., a method of multiplexing data signals, pilot signals, and control signals in the multiplexer 107. A method of multiplexing the signals at the transmitting apparatus 100 will be described below.
[0026] Next, the configuration of a receiving apparatus 200 that receives SCBT symbols transmitted from the transmitting apparatus 100 will be described.
[0027] FIG. 3 is a block diagram illustrating an example configuration of the receiving apparatus 200 according to

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the first embodiment. In the SCBT receiving apparatus 200, a synchronization processing unit 201 detects the timing to output, to a GI removal unit 202 at a subsequent stage, received signals of SCBT symbols containing data signals, 5 pilot signals, and control signals received from the transmitting apparatus 100, and outputs the received signals at the detected timing. The GI removal unit 202 removes a GI inserted in the received signals, and outputs the Gl-removed received signals. A fast fourier transform
10 (FFT) unit 203 performs FFT processing on the Gl-removed received signals to transform the received signals in the time domain into received signals in the frequency domain. A pilot separator 204 extracts received signals corresponding to SCBT pilot symbols from the received
15 signals transformed into those in the frequency domain, and outputs them to a control signal channel estimator 205. [0028] The control signal channel estimator 205 is a first channel estimator that performs, in order to demodulate the control signals, channel estimation for the
20 control signals by performing linear interpolation or the like with the use of the pilot signals contained in the received signals corresponding to the SCBT pilot symbols extracted in the pilot separator 204. The control signal channel estimator 205 generates a first channel estimate
25 value, which is the channel estimation result of execution of the channel estimation, and outputs it to a control signal frequency domain equalization (hereinafter, frequency domain equalization is referred to as FDE) unit 206. As typical channel estimation processing, by dividing
30 a received signal of a pilot symbol by a pilot symbol value held on the receiving apparatus 200 side, a channel estimate value corresponding to the pilot symbol can be obtained. Next, a channel estimate value corresponding to

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the control signals can be obtained by performing linear interpolation or the like using the channel estimate value obtained from the pilot symbol.
[0029] The control signal FDE unit 206 is a first 5 frequency domain equalizer that performs FDE processing on the control signals, using the first channel estimate value acquired from the control signal channel estimator 205. The FDE processing is processing to compensate for fading or the like experienced by an SCBT symbol transmitted from
10 the transmitting apparatus 100 in a channel to the receiving apparatus 200. In SCBT, typically, FFT processing is performed on a received signal to transform it into a frequency-domain signal, and then the FDE processing is performed in the frequency domain. In the
15 FDE processing, an equalization weight corresponding to each frequency is calculated, using a channel estimate value, and a linear operation to multiply a received signal of a frequency by the corresponding equalization weight is performed, so that interference components can be reduced.
20 SCBT is a transmission scheme that enables equalization by such a simple operation. Of the control signals and the data signals contained in the received signals of the remaining SCBT symbols from which the received signals corresponding to the SCBT pilot symbols have been extracted
25 in the pilot separator 204, the control signal FDE unit 206 performs the FDE processing only on the control signals, and outputs equalized control signals, which are FDE-processed control signals. The control signal FDE unit 206 outputs the data signals without performing the FDE
30 processing.
[0030] An inverse fast fourier transform (IFFT) unit 207 performs IFFT processing on an SCBT symbol containing the equalized control signals and the data signals not

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subjected to the FDE processing to generate an SCBT symbol transformed from a frequency-domain signal into a time-domain signal. The data signals not subjected to the FDE processing may be stored in a memory without performing 5 IFFT for a reduction in the amount of computation, and used in a data FDE unit 215 at a later stage.
[0031] A separator 208 separates the SCBT symbol, which is a time-domain signal input from the IFFT unit 207, into the equalized control signals and the data signals. The
10 separator 208 outputs the equalized control signals
separated from the SCBT symbol, which is a time-domain signal, to a control signal demodulator 209. The separator 208 outputs the data signals separated from the SCBT symbol, which is a time-domain signal, to an FFT unit 214.
15 [0032] The control signal demodulator 209 performs, on the equalized control signals separated by the separator 208, decoding processing, which is inverse processing corresponding to the encoding processing on a control bit sequence performed in the control signal encoder 105 of the
20 transmitting apparatus 100, specifically, the encoding processing unit 112. Further, the control signal demodulator 209 demodulates the equalized control signals by hard decision, and generates and outputs the demodulated equalized control signals, i.e., a control bit sequence
25 based on the equalized control signals. The detailed
operation of the control signal demodulator 209 will be described below.
[0033] A controller 210 instructs each component to perform a demodulation operation and others in reception
30 processing performed by the receiving apparatus 200, on the basis of the control bit sequence generated in the control signal demodulator 209. When MCS information is assigned to the control bit sequence, for example, the controller

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210 obtains parameters of multilevel modulation, the code rate, and the code word length to be used from a table of correspondence between control bit sequences and the MCS that the controller 210 has, to specify them for a log-5 likelihood ratio (hereinafter, referred to as LLR) calculator 217, a deinterleaver 218, and an error-correction decoder 219. The controller 210, the LLR calculator 217, the deinterleaver 218, and the error-correction decoder 219 are configured the same as
10 conventional ones, and thus the MCS will be described as an example below.
[0034] A control signal encoder 211 performs, on the equalized control signals demodulated in the control signal demodulator 209, the same encoding processing as the
15 encoding processing performed on the control bit sequence by the control signal encoder 105 of the transmitting apparatus 100, specifically, the encoding processing unit 112, and outputs the encoded equalized control signals. Here, the output result of the control signal demodulator
20 209 is a hard decision value sequence. Alternatively, a soft decision value sequence may be output so that the control signal encoder 211 performs encoding processing using the soft decision value sequence on the basis of the soft decision value sequence.
25 [0035] An FFT unit 212 is a replica generator that
performs FFT processing on the equalized control signals encoded in the control signal encoder 211 to generate control signal replicas, which are replica signals of the control signals.
30 [0036] A data channel estimator 213 is a second channel estimator that obtains a channel estimate value corresponding to the control signals using the control signal replicas generated in the FFT unit 212, and then

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performs, in order to demodulate the data signals, channel estimation for the data signals by performing linear interpolation or the like with the use of the channel estimate value corresponding to the control signals and the 5 channel estimate value that corresponds to the pilot
symbols and is the first channel estimate value input from the control signal channel estimator 205 to the data channel estimator 213. The data channel estimator 213 generates a second channel estimate value, which is the
10 channel estimation result of execution of the channel
estimation, and outputs it to the data FDE unit 215. The channel estimate value corresponding to the control signals using the control signal replicas can be obtained by dividing received signals of the control signals by the
15 control signal replicas, as in the control signal channel estimator 205.
[0037] The FFT unit 214 performs FFT processing on the data signals separated in the separator 208 to transform them from a time-domain signal into a frequency-domain
20 signal.
[0038] The data FDE unit 215 is a second frequency domain equalizer that performs FDE processing on the data signals, using the second channel estimate value acquired from the data channel estimator 213, and outputs equalized
25 data signals, which are FDE-processed data signals. The
FDE processing in the data FDE unit 215 is the same as the FDE processing in the control signal FDE unit 206. [0039] An IFFT unit 216 performs IFFT processing on the equalized data signals to generate equalized data signals
30 transformed from a frequency-domain signal into a time-domain signal.
[0040] The LLR calculator 217 calculates the LLR of the equalized data signals, on the basis of the multilevel

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modulation specified in the MCS by the controller 210. The deinterleaver 218 performs deinterleaving on the LLR calculated in the LLR calculator 217, on the basis of the code word length specified in the MCS by the controller 210. 5 The error-correction decoder 219 performs error-correction decoding on the signals deinterleaved in the deinterleaver 218, on the basis of the code rate and the code word length specified by the controller 210, to generate and output an information bit sequence.
10 [0041] FIG. 4 is a block diagram illustrating an example configuration of the control signal demodulator 209 according to the first embodiment. In the control signal demodulator 209, an LLR calculator 221 calculates the LLR of equalized control signals in accordance with the
15 modulation scheme adopted. A decoding processing unit 222 performs, on the LLR calculated in the LLR calculator 221, decoding processing, which is inverse processing corresponding to the encoding processing performed in the encoding processing unit 112 of the transmitting apparatus
20 100. When the encoding processing performed by the
encoding processing unit 112 of the transmitting apparatus 100 is repetition, the decoding processing unit 222 typically performs LLR combining decoding processing. When the encoding processing performed by the encoding
25 processing unit 112 of the transmitting apparatus 100 is spread processing, the decoding processing unit 222 performs inverse spread decoding processing on the LLR sequence. A hard decision unit 223 performs hard decision on the signals decoded in the decoding processing unit 222
30 to demodulate the equalized control signals, and generates
and outputs the demodulated equalized control signals, i.e., a control bit sequence based on the equalized control signals. The configuration of the control signal

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demodulator 209 illustrated in FIG. 4 is an example. When the encoding processing at the transmitting apparatus 100 is error-correction encoding, for example, the control signal demodulator 209 performs error-correction decoding 5 to obtain a control bit sequence.
[0042] In the present embodiment, the receiving apparatus 200 first estimates a channel with respect to control signals that have been subjected to redundancy processing at the transmitting apparatus 100 to increase
10 the reception performance compared to data signals, and performs decoding and re-encoding. Next, the receiving apparatus 200 performs channel estimation for the data signals using the control signal replicas generated after re-encoding and the channel estimate value of the control
15 signals. When the receiving apparatus 200 performs channel estimation for data signals, it uses a channel estimate value of control signals, thereby increasing the number of samples used in linear interpolation or the like to improve the channel estimation accuracy and improve the data signal
20 reception performance. The transmitting apparatus 100
enables control signals to be efficiently re-encoded easily and with a low delay, and orthogonalizes control signals and data signals or control signals and pilot signals in the frequency domain for transmission.
25 [0043] Here, a difference in operation between a
conventional case where channel estimation is performed using pilot signals and FDE processing is performed on control signals and data signals at the same time, and a case as in the present embodiment where, first, channel
30 estimation for control signals is performed and FDE
processing on the control signals is performed, and then channel estimation for data signals is performed and FDE processing on the data signals is performed will be

Docket No. PMDA-17017-PCT
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10
15

described.
[0044] When data signals and control signals are mixed in an SCBT symbol at a transmitting-side apparatus, the data signals and the control signals are typically superimposed at each frequency in the frequency domain. Consequently, when a receiving-side apparatus performs channel estimation using the control signals, it is necessary to not only generate replica signals of the control signals but also to generate replica signals including the data signals concomitantly. That is, the receiving-side apparatus needs to generate replica signals for a frequency component in which the data signals and the control signals are superimposed. A replica D(f)(hat) at the f-th frequency component is expressed by the following formula (2). d(t)(hat) represents a data signal replica, and c(t)(hat) represents a control signal replica. [0045] [Formula 2]

D(f)

1
Nr

£ d(t) exp
t = 0

f

j2nf

t
N

FFT J

+ Z <5(t) exp
t = Nrl

f

j2nf

t
N

Y|
FFT J
(2

20 [0046] When the receiving-side apparatus generates
replica signals containing the control signals and the data signals, there is a disadvantage in that the amount of processing computation and the amount of delay increase in processing including error-correction decoding. On the
25 other hand, when error-correction decoding is not included, the receiving-side apparatus does not use error correction, and thus data signal replicas tend to be lower in generation accuracy and have a larger error than control signal replicas. The expression of the replica signal
30 D(f)(hat) containing the control signal and the data signal is expressed by the following formula (3) using the data

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signal replica d(t)(hat) and its error ed(t), and the control signal replica c(t) (hat) and its error ec(t) . When error-correction decoding is not included, the tendency for E[|ec(t) I2] < E[|ed(t) |2] is expected.

5 [0047]

[Formula 3]

D(f)

1
N„

\Nd-l ,.
2 d(t) exp
t = 0

(
V

j2nf

N

FFT J

2 cit) exp

j2nf

N

FFT J

N„
D(f)

2 {d(t) + ed(t)}exp
t = 0
A
1
Nd-1
Nc
Z ed(t) exp
V
t = 0

f
j2nf
j27l^

N

t
FFT J FFT J

Z |c(t) + ec(t)} exp J2TI^
A
j2nf
AT
V
£ ec(t) exp
FFT /

N

FFT J

:3:
[0048] When the data signal replica has a large error, the channel estimation accuracy may be degraded due to the effect of the error in the data signal replica even though the receiving-side apparatus performs channel estimation in the frequency domain using the replica signal D(f)(hat) containing the control signal and the data signal.
[0049] In order for the receiving-side apparatus to improve the channel estimation accuracy easily and with a low delay, the transmitting-side apparatus requires a transmission method that maintains orthogonalization between control signals and signals excluding the control signals, specifically, control signals and data signals or pilot signals in the time domain or the frequency domain. Here, for orthogonalization in the time domain at the transmitting-side apparatus, orthogonality can be achieved by forming control signals with one SCBT symbol and time-multiplexing the control signals with SCBT data symbols. However, it is necessary to insert a plurality of SCBT control symbols for adaptation to a high-speed mobile environment, and there is a disadvantage in that transmission efficiency is degraded.

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[0050] Thus, in the present embodiment, the transmitting apparatus 100 orthogonalizes data signals and control signals in the frequency domain, i.e., orthogonalizes and multiplexes them in the frequency domain. The receiving 5 apparatus 200 performs channel estimation for the control signals and the data signals, separately. Compared to the case where channel estimation is performed collectively for signals containing data signals and control signals, the receiving apparatus 200 can reduce the amount of
10 computation in individual channel estimation in the channel estimation for control signals and the channel estimation for data signals. The receiving apparatus 200 can reduce the amount of computation and processing delay in the generation of replicas required in channel estimation using
15 control signals. Further, when the receiving apparatus 200 is a mobile terminal, the transmitting apparatus 100 can arrange control signals in a dispersed manner so as to adapt to a high-speed mobile environment, and can reduce the degradation in transmission efficiency. The dispersed
20 arrangement of control signals will be described below.
[0051] When a transmitting-side apparatus orthogonalizes data signals and control signals, it typically applies FFT processing to each of the data signals and the control signals, separately, arranges the obtained frequency
25 components in a dispersed manner, and performs IFFT to be able to orthogonalize the data signals and the control signals in the frequency domain. However, there is a disadvantage in that a peak occurs in a time waveform because different spectra are superimposed.
30 [0052] Thus, the transmitting apparatus 100 generates a frequency spectrum in which data signals and control signals are orthogonalized on the frequency axis. FIG. 5 is a diagram illustrating an example of a dispersed

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arrangement in which data signals and control signals are orthogonalized in the frequency domain in the first embodiment. The upper diagram in FIG. 5 illustrates data signals, control signals, and a combined frequency spectrum. 5 The lower diagram in FIG. 5 is a diagram illustrating an example of an arrangement of SCBT symbols. In the lower diagram in FIG. 5, the horizontal axis represents time, the vertical axis frequency, and a portion indicated by a dotted-line range 504 constitutes one SCBT symbol.
10 [0053] The transmitting apparatus 100 generates a
repeated waveform in which the data signal and the control signal alternately occur at the frequency with a cycle in which the number of repetitions is n in the frequency direction of each SCBT symbol. The number of repetitions n
15 is two in the example in FIG. 5. The number of repetitions n is a value representing the frequency of occurrence of each signal in the frequency direction. The case where the number of repetitions n = 2 in FIG. 5 is a state where a signal occurs once every two times, i.e., alternately in
20 the region in the frequency direction. For example, the transmitting apparatus 100 forms, for the data signals, a frequency spectrum of a comb-shaped spectrum 501 of the data signals in a repeated waveform in which a signal occurs alternately in the region in the frequency direction
25 of an SCBT symbol. The transmitting apparatus 100 forms, for the control signals, a frequency spectrum of a comb-shaped spectrum 502 of the control signals in a repeated waveform in which a signal occurs alternately in the region in the frequency direction of an SCBT symbol and a
30 frequency offset is provided in order to prevent
overlapping with the comb-shaped spectrum 501 of the data signals in the frequency domain. The transmitting apparatus 100 multiplexes the comb-shaped spectrum 501 of

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the data signals and the comb-shaped spectrum 502 of the control signals so as to be able to obtain a frequency spectrum 503 in which components of the data signals and the control signals are orthogonalized on the frequency 5 axis. The case where the number of repetitions n = 3 is a state where a signal occurs once every three times, i.e., every third time in the region in the frequency direction. In this case, pilot signals can be further combined in addition to data signals and control signals. For example,
10 a comb-shaped spectrum of control signals that occur every third time in the region in the frequency direction is provided with a frequency offset so as not to overlap with a comb-shaped spectrum of data signals that occur every third time in the region in the frequency direction.
15 Further, a comb-shaped spectrum of pilot signals that occur every third time in the region in the frequency direction is provided with a frequency offset so as not to overlap with the comb-shaped spectrum of the data signals and the comb-shaped spectrum of the control signals in the region
20 in the frequency direction. Then, the transmitting
apparatus 100 multiplexes the comb-shaped spectrum of the data signals, the comb-shaped spectrum of the control signals, and the comb-shaped spectrum of the pilot signals. The transmitting apparatus 100 may collectively perform the
25 formation of the comb-shaped spectra of the signals on the frequency axis.
[0054] Patent Literature 2 described above discloses a multiplexing processing technique for performing orthogonalization using comb-shaped spectra that are a
30 combination of only data signals and pilot signals. The
transmitting apparatus 100 performs multiplexing processing with data signals and control signals in the same method as the multiplex combining processing with data signals and

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pilot signals disclosed in Patent Literature 2, thereby being able to obtain a waveform with a suppressed peak. [0055] Operations of the transmitting apparatus 100 and the receiving apparatus 200 will be described with 5 reference to flowcharts.
[0056] FIG. 6 is a flowchart illustrating an example of processing of generating an SCBT symbol at the transmitting apparatus 100 according to the first embodiment. The controller 106 instructs the multiplexer 107 to arrange in
10 a dispersed manner data signals and control signals in an SCBT symbol into which the data signals and the control signals are multiplexed (step SI). The controller 106 specifies, for the multiplexer 107, the value of the number of repetitions n in a repeated waveform as described above.
15 The controller 106 causes the multiplexer 107 to transform the control signals and the data signals into waveforms that occur periodically on the frequency axis and to multiplex the control signals and the data signals in a non-overlapping arrangement in the frequency domain.
20 [0057] Then, on the basis of an instruction from the controller 106, the multiplexer 107 transforms the data signals input from the mapping unit 103 into the waveform shown in the comb-shaped spectrum 501 of the data signals in FIG. 5, transforms the control signals input from the
25 control signal encoder 105 into the waveform shown in the comb-shaped spectrum 502 of the control signals in FIG. 5, and multiplexes the comb-shaped spectrum 501 of the data signals and the comb-shaped spectrum 502 of the control signals (step S2). The multiplexer 107 performs
30 multiplexing processing on an SCBT symbol determined from the position of an SCBT pilot symbol containing pilot signals on the basis of the SCBT frame format. The positional relationship between the SCBT symbol into which

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the control signals and the data signals are multiplexed and the SCBT pilot symbol containing the pilot signals will be described below.
[0058] In place of orthogonalizing and multiplexing 5 control signals and data signals in the frequency domain, the transmitting apparatus 100 can orthogonalize and multiplex control signals and pilot signals in the frequency domain. The transmitting apparatus 100 can cope with this case with the same processing by replacing the
10 data signals in FIG. 5 with pilot signals. In step SI in the flowchart illustrated in FIG. 6 described above, the controller 106 instructs the multiplexer 107 to arrange pilot signals and control signals in a dispersed manner in an SCBT symbol into which the pilot signals and the control
15 signals are multiplexed. The controller 106 causes the multiplexer 107 to transform the control signals and the pilot signals into waveforms that occur periodically on the frequency axis, and to multiplex the control signals and the pilot signals in a non-overlapping arrangement in the
2 0 frequency domain.
[0059] At the transmitting apparatus 100, the controller 106 instructs the multiplexer 107 to perform the transformation and multiplexing of signals in the multiplexer 107, but is not limited to this. As described
25 above, in a typical operation, the controller 106 controls the error-correction encoder 101, the interleaver 102, the mapping unit 103, the pilot generator 104, and the control signal encoder 105. [0060] Thus, the controller 106 may specify the number
30 of repetitions n for the mapping unit 103, and when
outputting data signals to the multiplexer 107, instruct the mapping unit 103 to output them in the form of the comb-shaped spectrum 501 of the data signals in FIG. 5.

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The controller 106 instructs the mapping unit 103 to output data signals that occur periodically on the frequency axis without overlapping with control signals in the frequency domain. Likewise, the controller 106 may specify the 5 number of repetitions n for the control signal encoder 105, and when outputting control signals to the multiplexer 107, instruct the control signal encoder 105 to output them in the form of the comb-shaped spectrum 502 of the control signals in FIG. 5. The controller 106 instructs the
10 control signal encoder 105 to output control signals that occur periodically on the frequency axis without overlapping with data signals in the frequency domain. The controller 106 also instructs the multiplexer 107 to multiplex the control signals and the data signals in a
15 non-overlapping arrangement in the frequency domain. Thus, the multiplexer 107 only needs to multiplex signals input from the mapping unit 103 and the control signal encoder 105, and the load of signal transformation in the multiplexer 107 can be reduced.
20 [0061] When control signals and pilot signals are
multiplexed, the controller 106 specifies the number of repetitions n for the pilot generator 104 in place of the mapping unit 103, and when outputting data signals to the multiplexer 107, instructs the pilot generator 104 to
25 output them in the form of the comb-shaped spectrum 501 of the data signals in FIG. 5. In this case, the controller 106 instructs the pilot generator 104 to output pilot signals that occur periodically on the frequency axis without overlapping with control signals in the frequency
30 domain. Likewise, the controller 106 instructs the control signal encoder 105 to output control signals that occur periodically on the frequency axis without overlapping with the pilot signals in the frequency domain. The controller

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106 also instructs the multiplexer 107 to multiplex the control signals and the pilot signals in a non-overlapping arrangement in the frequency domain.
[0062] When the controller 106 issues an instruction to 5 the control signal encoder 105, there are no limitations on the control signals, which may be a symbol sequence of PSK, quadrature amplitude modulation (QAM), or the like, or may be a phase rotation sequence such as a Zadoff-Chu sequence. Further, the modulation scheme may be changed in a symbol
10 sequence, or each symbol may be provided with a
predetermined phase or a frequency deviation. For example, the modulation scheme may be in a form of mixing QPSK and n/4QPSK in one symbol sequence or a symbol sequence form in which a phase or frequency offset is provided to a symbol
15 sequence.
[0063] FIG. 7 is a flowchart illustrating an example of processing of receiving an SCBT symbol at the receiving apparatus 200 according to the first embodiment. The control signal channel estimator 205 performs, in order to
20 demodulate the control signals, channel estimation for
control signals by performing linear interpolation or the like with the use of SCBT pilot symbols (step Sll). [0064] The control signal FDE unit 206 performs, on the control signals transformed into a frequency-domain signal
25 by FFT processing, FDE processing by a linear operation for reducing interference components in the frequency domain, using a first channel estimate value acquired from the control signal channel estimator 205. Thereafter, through the IFFT unit 207 and the separator 208, the control signal
30 demodulator 209 demodulates the equalized control signals (step S12) .
[0065] The control signal encoder 211 performs encoding processing on a control bit sequence obtained by the

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demodulation. Then, the FFT unit 212 performs FFT processing to generate control signal replicas (step S13). [0066] The data channel estimator 213 performs, in order to demodulate the data signals, channel estimation for data 5 signals by performing linear interpolation or the like with the use of the control signal replicas and the first channel estimate value (step S14).
[0067] The data FDE unit 215 performs, on the data signals transformed into a frequency-domain signal by the
10 FFT processing, FDE processing by a linear operation for reducing interference components in the frequency domain, using a second channel estimate value acquired from the data channel estimator 213. Then, the LLR calculator 217, the deinterleaver 218, and the error-correction decoder 219
15 demodulate the data signals (step S15).
[0068] As described above, the receiving apparatus 200 first performs channel estimation for control signals with high detection performance using only pilot signals, and performs the FDE processing and the demodulation processing
20 on the control signals using the obtained channel
estimation result. The receiving apparatus 200 can perform channel estimation for data signals using the pilot signals and the control signals, i.e., with an increased number of samples; therefore, it is possible to obtain a highly
25 accurate channel estimation result. The receiving
apparatus 200 can perform the FDE processing and the demodulation processing on the data signals using the highly accurate channel estimation result; therefore, the reception performance of the data signals can be improved.
30 [0069] Further, the receiving apparatus 200 can perform the FDE processing and the demodulation processing on control signals independently, irrespective of the FDE processing and the demodulation processing on data signals;

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therefore, the FDE processing and the demodulation processing on each of the signals can be implemented with low computation and low processing delay. [0070] Furthermore, the transmitting apparatus 100 5 arranges control signals in a dispersed manner and
generates an SCBT symbol for transmission; therefore, the receiving apparatus 200 can avoid an effect of a drop in received signal strength due to fading and also can obtain an effect of stably detecting control signals.
10 [0071] Description has been given of a method of multiplexing data signals and control signals at the transmitting apparatus 100. Next, the positional relationship between an SCBT symbol into which data signals and control signals are multiplexed and an SCBT symbol
15 containing pilot signals will be described.
[0072] FIG. 8 is a diagram illustrating an example of an SCBT symbol arrangement at the transmitting apparatus 100 according to the first embodiment and an SCBT symbol arrangement in a comparative example. FIG. 8(a)
20 illustrates an SCBT symbol arrangement in the comparative example, and FIG. 8(b) illustrates an SCBT symbol arrangement in the present embodiment. In FIGS. 8(a) and 8(b), the upper diagrams illustrate an example of an SCBT symbol arrangement, and the lower diagrams illustrate
25 estimation error by channel estimation.
[0073] As illustrated in FIG. 8(a), when a transmitting-side apparatus disposes an SCBT symbol 801 made up of only control signals near an SCBT symbol made up of only pilot signals in the time axis direction, a receiving-side
30 apparatus performs linear interpolation on data signals using a channel estimate value 803 obtained from the control signals and a channel estimate value 804 obtained from subsequent pilot signals. In this case, the