RECTIFIER CIRCUIT DEVICE TECHNICAL FIELD

[0001] The present invention relates to a rectifier circuit apparatus and a control circuit for the rectifier circuit apparatus. In particular, the present invention relates to a circuit apparatus that drives a direct current load by rectifying a household single-phase alternating current power supply, for example, to obtain substantially direct current. The rectifier circuit apparatus of the present invention is an apparatus that again converts the obtained direct current into an alternating current of an arbitrary frequency by an inverter circuit to variable-speed drive an electric motor. For example, the rectifier circuit apparatus of the present invention is applied to an apparatus that compresses coolant by a compressor to structure a heat pump, to cool or heat the air, or freeze food or the like. The present invention relates to a rectifier circuit apparatus executing highly efficient drive control of the technique for reducing the burden on the transmission system by reducing harmonic component contained in the power supply current to such an aforementioned apparatus and by improving power factor, and to a control circuit for the rectifier circuit apparatus.

BACKGROUND ART

[0002] Fig. 20 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a prior art disclosed in Patent Document 1, and Fig. 21 is a block diagram showing a detailed configuration of a control unit 13 shown in Fig. 20.

[0003] Conventionally, as shown in Fig. 20, the rectifier circuit apparatus is structured as follows: the opposite output terminals of an alternating current power supply 1 is short-circuited by a semiconductor switch 3c via a rectifier bridge 2 and a reactor 3a; the reactor 3a is charged with current; and when the semiconductor switch 3c enters OFF state, a diode 3b allows current to flow through a load 4. Thus, what is achieved is the configuration in which, even for a period where the instantaneous voltage of the alternating current power supply 1 is low, the power supply current flows. Thus, the harmonic component of the power supply current is reduced and the power factor improves. However, by finely turning ON/OFF the semiconductor switch 3c at a frequency fully higher than the frequency of the alternating current power supply 1, current flows through the semiconductor switch 3c when the alternating current voltage of the alternating current power supply 1 is chopped (hereinafter, referred to as "to allow the semiconductor switch to perform the chopping operation" or "chopping performed by the semiconductor switch") and therefore, loss of circuit occurs.

[0004] In order to solve the problem, what is proposed is a method in which, instead of allowing the semiconductor switch 3c to constantly perform the chopping operation, the semiconductor switch 3c is allowed to perform the chopping operation for a particular period of the alternating current phase, and the semiconductor switch 3c is stopped for the other periods (for example, see Patent Document 1).

[0005] Referring to Fig. 20, the rectifier bridge 2 rectifies the alternating current voltage from the alternating current power supply 1 to convert the voltage into direct current voltage containing ripple, and thereafter the electric power is supplied to the smoothing capacitor 3d and the load 4 via the reactor 3a and the diode 3b. Further, by structuring such that the output voltage from the rectifier bridge 2 can be short-circuited by the semiconductor switch 3c via the reactor 3a, the rectifier circuit apparatus with the power factor improving function realized by a known boosting chopper circuit 3 is structured. In this case, the boosting chopper circuit 3 detects input current by an input current detector 6 and an input current detecting unit 10. The boosting chopper circuit 3 allows the semiconductor switch 3c to perform the chopping operation such that the input current assumes the same shape as the input voltage waveform (power supply voltage waveform) detected by the input voltage detecting unit 11. Further, the boosting chopper circuit 3 adjusts the magnitude of the input current such that the output voltage becomes the desired voltage.

[0006] In particular, Patent Document 1 proposes an idea of reducing loss of circuit by allowing the semiconductor switch to perform the chopping operation for minimum required sections for reducing harmonics. Fig. 21 shows a control method therefor. Referring to Fig. 21, power supply zero crossing detecting means 5 detects the phase of the power supply voltage; a pulse counter 13a allows the semiconductor switch 3c shown in Fig. 20 to perform the chopping operation just for a certain period, and the pulse counter 13a maintains the semiconductor switch 3c in OFF state for the other periods. Through this method, a rectifier circuit apparatus with small loss can be implemented, while the power supply harmonics increase very little.

[0007] In addition, though the scheme of Patent Document 1 requires the waveform of the power supply voltage, another proposed method is a method of realizing the similar operation with a predetermined waveform, without using the waveform of the power supply voltage (for example, see Patent Document 2). Further, still another proposed method is a simple method of achieving the similar effect without having a target current waveform (for example, see Patent Document 3).

[0008] Further, in the case of Fig. 20, the input current is substituted by current once rectified. In such a case, the magnitude of the absolute value is adjusted by obtaining the information of the absolute value of the input current. This is equivalent to adjusting the amplitude of the input current, as is widely known.

PRIOR ART DOCUMENT

PATENT DOCUMENT

[0009] [Patent Document 1] Japanese Patent Laid-open Publication No. JP 2005-253284 A
[Patent Document 2] Japanese Patent Laid-open Publication No. JP 2007-129849 A
[Patent Document 3] Japanese Patent Laid-open Publication No. JP 2000-224858 A
[Patent Document 4] Japanese Patent Laid-open Publication No. JP 2001-045763 A

SUMMARY OF THE INVENTION

PROBLEMS TO BE SOLVED BY THE INVENTION

[0010] However, with the structure of the rectifier circuit apparatus according to the prior art, under the condition where the load is determined, control is executed such that the output voltage becomes constant, and in addition, the period where the semiconductor switch performs the chopping operation is also fixed. Therefore, when the detected output voltage contains any error, the current waveform varies. For example, in the case where alternating current of the effective value 200 V is rectified to obtain direct current of approximately 280 V, the current waveform greatly varies just by the direct current voltage varying by 1 V. The precision of 1 V to the direct current voltage of 280 V corresponds to 0.3 %. Therefore, when voltage is divided by a resistor to obtain low voltage, a resistor of very high precision becomes necessary. Accordingly, there exist a problem that the loss of circuit must slightly be increased by setting the period where chopping is performed to be longer, so that the harmonics are reduced even with the varied current waveform, taking into consideration of the detection precision of the output voltage.

[0011] In addition, while such a control method is generally realized by using a digital computer, when high-precision control of direct current voltage is to be realized, an analog-to-digital conversion (hereinafter, referred to as an "AD conversion") apparatus with high resolution to direct current voltage, i.e., involving high bit numbers, becomes necessary. Hence, a great burden is put on the circuit. Such a case also involves the problem that the loss of circuit must slightly be increased by setting the period where chopping is performed to be longer, so that the harmonics are reduced even with the varied current waveform, taking into consideration of the precision at which the control circuit can actually achieve detection.

[0012] Further, with such a rectifier circuit apparatus, loss is smaller as the output voltage is lower. However, in the case where the output voltage is to be set to a voltage lower than the instantaneous value of the power supply voltage, a phenomenon occurs that the output voltage is boosted by the boosting operation for a period where the semiconductor switch performs the chopping operation, even when the alternating current voltage is lower than the output voltage for a period where the semiconductor switch performs the chopping operation. Accordingly, it also involves a problem of the difficulty of setting to a low output voltage with which loss is smaller.

[0013] In addition, with such a rectifier circuit apparatus, the power supply harmonic greatly differs, the power supply harmonic occurring whether the input current has ripple or not depending on the electrical characteristic of the connected load. Therefore, it also involves a problem that, when control is executed for the preset period where the semiconductor switch performs the chopping operation, switching is performed even in the low electric power region where the current amplitude is relatively small and harmonic current is also very small and does not disadvantageously affect peripheral equipment or the power supply system, and hence loss as the integration value increases.

[0014] An object of the present invention is to provide a rectifier circuit apparatus and a control circuit for the rectifier circuit apparatus, the rectifier circuit apparatus that is capable of solving the problems described above, reducing the power supply harmonic current in accordance with the characteristic of the connected load independently of the detection precision of the output voltage, and reducing the loss also.

[0015] According to the first aspect of the present invention, there is provided a rectifier circuit apparatus, allowing a semiconductor switch to perform a chopping operation to short-circuit or open an output terminal of a single-phase alternating current power supply via a reactor, the rectifier circuit apparatus rectifying an alternating current voltage supplied from the single-phase alternating current power supply via the reactor to a direct current voltage and supplying to a load, the rectifier circuit apparatus comprising: waveform forming means configured to form a target current waveform of a frequency identical to a waveform of the alternating current voltage; current detecting means configured to detect an alternating current flowing from the single-phase alternating current power supply; voltage detecting means configured to detect the direct current voltage; first control means configured to control the chopping operation of the semiconductor switch such that a waveform of the detected alternating current becomes substantially the target current waveform; second control means configured to control an amplitude of the target current waveform such that the detected direct current voltage becomes substantially a predetermined target direct current voltage; and third control means configured to control the predetermined target direct current voltage such that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping stop phase width in which the semiconductor switch is in a chopping stop state becomes substantially a predetermined phase width.

[0016] In the above-mentioned rectifier circuit apparatus, the predetermined phase width is set by being changed depending on an electrical characteristic of the load. In this case, the electrical characteristic of the load is a variation width of the alternating current, or a rotation speed command to a compressor motor when the load is a compressor.

[0017] In addition, in the above-mentioned rectifier circuit apparatus, when the plurality of chopping operation phase widths or the plurality of chopping stop phase widths exist for a period where a polarity of the alternating current voltage is fixed, the third control means controls the predetermined target direct current voltage such that any of the phase widths for the period or a total of the phase widths becomes substantially the predetermined phase width.

[0018] Further, in the above-mentioned rectifier circuit apparatus, the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period over time, from a start point of the period until a predetermined intermediate point; and

(b) the instantaneous absolute value is at least reduced or substantially monotonously reduced while being at least reduced and constant for a partial period over time, from the intermediate point until an end point, and thereafter becomes zero.

[0019] Still further, in the above-mentioned rectifier circuit apparatus, the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value has a period for which the instantaneous absolute value is zero from a start point of the period to a predetermined first intermediate point;

(b) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period from the first intermediate point until a predetermined second intermediate point; and

(c) the instantaneous absolute value is at least monotonously reduced while being at least reduced and is a constant for a partial period over time, from the second intermediate point until an end point, and thereafter becomes zero.

[0020] In addition, the above-mentioned rectifier circuit apparatus further comprises phase detecting means for generating a binary signal by comparing the alternating current voltage against a predetermined threshold voltage, wherein the waveform forming means detects cycle and phase of the alternating current voltage based on the binary signal, and forms the target current waveform of a frequency identical to the waveform of the alternating current voltage, based on the detected cycle and phase of the alternating current voltage, and wherein the third control means detects, based on the binary signal, the chopping operation phase width in which the semiconductor switch is in the chopping operation state or the chopping stop phase width in which the semiconductor switch is in the chopping stop state.

[0021] Further, the above-mentioned rectifier circuit apparatus further comprises: AD converting means provided between the voltage detecting means and the second control means, the AD converting means performing an AD conversion of the detected direct current voltage to be a digital voltage; and
calculating means provided between the AD converting means and the second control means, the calculating means performing a low-pass filtering calculation of the digital voltage, and thereafter outputting a voltage that is a calculated result to the second control means as a detected direct current voltage.

[0022] In addition, in the above-mentioned rectifier circuit apparatus, a sampling frequency of the AD converting means is set to be fully higher than a frequency of the single-phase alternating current power supply.

[0023] Further, in the above-mentioned rectifier circuit apparatus, the low-pass filtering calculation is performed by multiplying an immediately preceding calculated result by a coefficient of "(2n - l)/(2n)" (where n is an integer), thereafter adding an input digital voltage to a multiplied value, and using a value of an addition result as a next calculated result.

[0024] According to the second aspect of the present invention, there is provided a control circuit for a rectifier circuit apparatus, the rectifier circuit apparatus allowing a semiconductor switch to perform a chopping operation to short-circuit or open an output terminal of a single-phase alternating current power supply via a reactor, the rectifier circuit apparatus rectifying an alternating current voltage supplied from the single-phase alternating current power supply via the reactor to a direct current voltage and supplying to a load, the control circuit comprising: waveform forming means for forming a target current waveform of a frequency identical to a waveform of the alternating current voltage; first control means for controlling the chopping operation of the semiconductor switch such that a waveform of the alternating current flowing from the single-phase alternating current power supply becomes substantially the target current waveform; second control means for controlling an amplitude of the target current waveform such that the direct current voltage becomes substantially a predetermined target direct current voltage; and third control means for controlling the predetermined target direct current voltage such that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping stop phase width in which the semiconductor switch is in a chopping stop state becomes substantially a predetermined phase width.

[0025] In the above-mentioned control circuit, the predetermined phase width is set by being changed depending on an electrical characteristic of the load. In this case, the electrical characteristic of the load is a variation width of the alternating current, or a rotation speed command to a compressor motor when the load is a compressor.

[0026] In addition, in the above-mentioned control circuit, when the plurality of chopping operation phase widths or the plurality of chopping stop phase widths exist for a period where a polarity of the alternating current voltage is fixed, the third control means controls the predetermined target direct current voltage such that any of the phase widths for the period or a total of the phase widths becomes substantially the predetermined phase width.

[0027] Further, in the above-mentioned control circuit, the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period over time, from a start point of the period until a predetermined intermediate point; and

(b) the instantaneous absolute value is at least reduced or is substantially monotonously reduced while being at least reduced and is a constant for a partial period over time, from the intermediate point until an end point, and thereafter becomes zero.

[0028] Still further, in the above-mentioned control circuit, the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value has a period for which the instantaneous absolute value is zero from a start point of the period to a predetermined first intermediate point;

(b) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period from the first intermediate point until a predetermined second intermediate point; and
(c) the instantaneous absolute value is at least monotonously reduced while being at least reduced and is a constant for a partial period over time, from the second intermediate point until an end point, and thereafter becomes zero.

[0029] In addition, in the above-mentioned control circuit, the rectifier circuit apparatus further comprises: phase detecting means for generating a binary signal by comparing the alternating current voltage against a predetermined threshold voltage, wherein the waveform forming means detects cycle and phase of the alternating current voltage based on the binary signal, and forms the target current waveform of a frequency identical to the waveform of the alternating current voltage, based on the detected cycle and phase of the alternating current voltage, and wherein the third control means detects, based on the binary signal, the chopping operation phase width in which the semiconductor switch is in the chopping operation state or the chopping stop phase width in which the semiconductor switch is in the chopping stop state.

[0030] Further, the above-mentioned control circuit further comprises: AD converting means provided between the voltage detecting means and the second control means, the AD converting means performing an AD conversion of the direct current voltage to be a digital voltage; and calculating means provided between the AD converting means and the second control means, the calculating means performing a low-pass filtering calculation of the digital voltage, and thereafter outputting a voltage that is a calculated result to the second control means as a direct current voltage.

[0031] In addition, in the above-mentioned control circuit, a sampling frequency of the AD converting means is set to be fully higher than a frequency of the single-phase alternating current power supply.

[0032] Further, in the above-mentioned control circuit, the low-pass filtering calculation is performed by multiplying an immediately preceding calculated result by a coefficient of "(2n - l)/(2n)" (where n is an integer), thereafter adding an input digital voltage to an multiplied value, and using a value of an addition result as a next calculated result.

EFFECT OF THE INVENTION

[0033] Therefore, according to the present invention, even when the detection precision of the direct current voltage contains an error, the direct current voltage is adjusted to a relatively appropriate value, to assume the similar current waveform. Further, by switching over the desired phase width depending on the characteristic of the load, a rectifying operation which always involves small loss and small harmonic current is realized.

[0034] In addition, the AD converting means converts a direct current voltage into a digital signal and detects the same at a sampling frequency fully higher than the frequency of the alternating current power supply. The obtained digital signal is subjected to LPF calculation for every cycle. Minute information that is smaller than the resolution is added to the digital signal so as to interpolate. Using the digital signal interpolated with the minute information as direct current voltage information, the digital signal interpolated with the minute information is adjusted such that the phase width with which chopping is actually performed becomes the desired value. Even when the power supply frequency component contained in the smooth voltage of the direct current voltage fluctuates and the resolution of the digital information is coarse, the fluctuation disperses the digital signal. Accordingly, a digital signal that is equivalent to a high resolution signal on average can be obtained. Thus, even with the AD converting means of coarse resolution, the average value of the direct current voltage can be adjusted at high precision, and the rectifying operation which always involves small loss and small harmonic current is realized. Therefore, the rectifier circuit apparatus according to the present invention can realize the rectifying operation which always involves small loss and small harmonic current, even in the case where the input current ripples because of the characteristic of the connected load.

BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Fig. 1 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a first embodiment of the present invention.

Fig. 2 is a block diagram showing a detailed configuration of a control circuit 100 shown in Fig. 1.

Fig. 3A is a diagram for describing a control operation according to a first operation example of the control circuit 100 shown in Fig. 1, and is a signal waveform diagram showing a relationship between the alternating current voltage (hereinafter, referred to as an AC voltage) and the rectified direct current voltage (hereinafter, referred to as a DC voltage), and the target current waveform to be controlled and the AC current actually controlled (hereinafter, referred to as an AC current).

Fig. 3B is a diagram for describing the control operation according to a second operation example of the control circuit 100 shown in Fig. 1, and is a signal I waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 4A is a diagram for describing the control operation according to a third operation example of a control circuit 100 of a rectifier circuit apparatus according to a second embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 4B is a diagram for describing the control operation according to a fourth operation example of the control circuit 100 of the rectifier circuit apparatus according to the second embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 5A is a diagram for describing the control operation according to a fifth operation example of a control circuit 100 of a rectifier circuit apparatus according to a third embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 5B is a diagram for describing the control operation according to a sixth operation example of the control circuit 100 of the rectifier circuit apparatus according to the third embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 6A is a diagram for describing the control operation according to a seventh operation example of a control circuit 100 of a rectifier circuit apparatus according to a fourth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. ;

Fig. 6B is a diagram for describing the control operation according to an eighth operation example of the control circuit 100 of the rectifier circuit apparatus according to the fourth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 7 A is a diagram for describing the control operation according to a ninth operation example of a control circuit 100 of the rectifier circuit apparatus according to a fifth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled/and the AC current actually controlled.

Fig. 7B is a diagram for describing the control operation according to a tenth operation example of the control circuit 100 of the rectifier circuit apparatus according to the fifth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 8 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a sixth embodiment of the present invention.

Fig. 9 is a block diagram showing a detailed configuration of a control circuit 111 shown in Fig. 8.

Fig. 10 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a seventh embodiment of the present invention.

Fig. 11 is a block diagram showing a detailed configuration of a control circuit 112 shown in Fig. 8.

Fig. 12A is a diagram for describing the control operation according to an eleventh operation example of a control circuit 100 of a rectifier circuit apparatus according to an eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 12B is a diagram for describing the control operation according to a twelfth operation example of the control circuit 100 of the rectifier circuit apparatus according to the eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.
Fig. 13A is a diagram for describing the control operation according to a thirteenth operation example of the control circuit 100 of the rectifier circuit apparatus according to the eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 13B is a diagram for describing the control operation according to a fourteenth operation example of the control circuit 100 of the rectifier circuit apparatus according to the eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 13C is a diagram for describing the control operation according to a fifteenth operation example of the control circuit 100 of the rectifier circuit apparatus according to the eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 13D is a diagram for describing the control operation according to a sixteenth operation example of the control circuit 100 of the rectifier circuit apparatus according to the eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

Fig. 14 is a circuit diagram for describing the configuration of a rectifier circuit apparatus according to a ninth embodiment of the present invention.

Fig. 15 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a tenth embodiment of the present invention.

Fig. 16A is a diagram for describing a first operation example of the binarization process of a voltage level comparator 109 of the rectifier circuit apparatus according to the first to tenth embodiments of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the threshold voltage Vth, and a binary signal from the voltage level comparator 109.

Fig. 16B is a diagram for describing a second operation example of the binarization process of the voltage level comparator 109 of the rectifier circuit apparatus according to the first to tenth embodiments of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the threshold voltage Vth, and a binary signal from the voltage level comparator 109.

Fig. 17 is a block diagram showing a detailed configuration of a control circuit 100 of a rectifier circuit apparatus according to an eleventh embodiment of the present invention.

Fig. 18 is a block diagram showing a detailed configuration of a low-pass filter calculator (hereinafter, referred to as an "LPF calculator") 231 shown in Fig. 17.

Fig. 19 is a diagram showing an operation of the rectifier circuit apparatus shown in Fig. 17, and is a signal waveform diagram showing AC current lac from the AC power supply 1, DC voltage Vdc, and AD converted value Vad (the DC voltage Vdc is represented by a dashed line) of the AD converter 230.

Fig. 20 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to the prior art.

Fig. 21 is a block diagram showing a detailed configuration of the control unit 13 shown in Fig. 20.

MODES FOR CARRYING OUT THE INVENTION

[0036] In the following, with reference to the drawings, a description will be given of embodiments of the present invention. It is to be noted that, in the following embodiments, identical reference characters are allotted to the similar constituents.

[0037] According to one embodiment of the present invention, there is provided a rectifier circuit apparatus, allowing a semiconductor switch to perform a chopping operation to short-circuit or open an output terminal of a single-phase alternating current power supply via a reactor, the rectifier circuit apparatus rectifying an alternating current voltage supplied from the single-phase alternating current power supply via the reactor to a direct current voltage and supplying to a load, the rectifier circuit apparatus comprising: waveform forming means configured to form a target current waveform of a frequency identical to a waveform of the alternating current voltage; current detecting means configured to detect an alternating current flowing from the single-phase alternating current power supply; voltage detecting means configured to detect the direct current voltage; first control means configured to control the chopping operation of the semiconductor switch such that a waveform of the detected alternating current becomes substantially the target current waveform; second control means configured to control an amplitude of the target current waveform such that the detected direct current voltage becomes substantially a predetermined target direct current voltage; and third control means configured to control the predetermined target direct current voltage such that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping stop phase width in which the semiconductor switch is in a chopping stop state becomes substantially a predetermined phase width.

[0038] In the above-mentioned rectifier circuit apparatus, the predetermined phase width is set by being changed depending on an electrical characteristic of the load. In this case, the electrical characteristic of the load is a variation width of the alternating current, or a rotation speed command to a compressor motor when the load is a compressor.

[0039] In addition, in the above-mentioned rectifier circuit apparatus, when the plurality of chopping operation phase widths or the plurality of chopping stop phase widths exist for a period where a polarity of the alternating current voltage is fixed, the third control means controls the predetermined target direct current voltage such that any of the phase widths for the period or a total of the phase widths becomes substantially the predetermined phase width.

[0040] Further, in the above-mentioned rectifier circuit apparatus, the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period over time, from a start point of the period until a predetermined intermediate point; and

(b) the instantaneous absolute value is at least reduced or substantially monotonously reduced while being at least reduced and constant for a partial period over time, from the intermediate point until an end point, and thereafter becomes zero.

[0041] Still further, in the above-mentioned rectifier circuit apparatus, the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value has a period for which the instantaneous absolute value is zero from a start point of the period to a predetermined first intermediate point;

(b) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period from the first intermediate point until a predetermined second intermediate point; and

(c) the instantaneous absolute value is at least monotonously reduced while being at least reduced and is a constant for a partial period over time, from the second intermediate point until an end point, and thereafter becomes zero.

[0042] In addition, the above-mentioned rectifier circuit apparatus further comprises phase detecting means for generating a binary signal by comparing the alternating current voltage against a predetermined threshold voltage,

wherein the waveform forming means detects cycle and phase of the alternating current voltage based on the binary signal, and forms the target current waveform of a frequency identical to the waveform of the alternating current voltage, based on the detected cycle and phase of the alternating current voltage, and
wherein the third control means detects, based on the binary signal, the chopping operation phase width in which the semiconductor switch is in the chopping operation state or the chopping stop phase width in which the semiconductor switch is in the chopping stop state.

[0043] Further, the above-mentioned rectifier circuit apparatus further comprises: AD converting means provided between the voltage detecting means and the second control means, the AD converting means performing an AD conversion of the detected direct current voltage to be a digital voltage; and calculating means provided between the AD converting means and the second control means, the calculating means performing a low-pass filtering calculation of the digital voltage, and thereafter outputting a voltage that is a calculated result to the second control means as a detected direct current voltage.

[0044] In addition, in the above-mentioned rectifier circuit apparatus, a sampling frequency of the AD converting means is set to be fully higher than a frequency of the single-phase alternating current power supply.

[0045] Further, in the above-mentioned rectifier circuit apparatus, the low-pass filtering calculation is performed by multiplying an immediately preceding calculated result by a coefficient of "(2n - l)/(2n)" (where n is an integer), thereafter adding an input digital voltage to a multiplied value, and using a value of an addition result as a next calculated result.

[0046] According to another embodiment of the present invention, there is provided a control circuit for a rectifier circuit apparatus, the rectifier circuit apparatus allowing a semiconductor switch to perform a chopping operation to short-circuit or open an output terminal of a single-phase alternating current power supply via a reactor, the rectifier circuit apparatus rectifying an alternating current voltage supplied from the single-phase alternating current power supply via the reactor to a direct current voltage and supplying to a load, the control circuit comprising: waveform forming means for forming a target current waveform of a frequency identical to a waveform of the alternating current voltage; first control means for controlling the chopping operation of the semiconductor switch such that a waveform of the alternating current flowing from the single-phase alternating current power supply becomes substantially the target current waveform; second control means for controlling an amplitude of the target current waveform such that the direct current voltage becomes substantially a predetermined target direct current voltage; and third control means for controlling the predetermined target direct current voltage such that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping stop phase width in which the semiconductor switch is in a chopping stop state becomes substantially a predetermined phase width.

[0047] In the above-mentioned control circuit, the predetermined phase width is set by being changed depending on an electrical characteristic of the load. In this case, the electrical characteristic of the load is a variation width of the alternating current, or a rotation speed command to a compressor motor when the load is a compressor.

[0048] In addition, in the above-mentioned control circuit, when the plurality of chopping operation phase widths or the plurality of chopping stop phase widths exist for a period where a polarity of the alternating current voltage is fixed, the third control means controls the predetermined target direct current voltage such that any of the phase widths for the period or a total of the phase widths becomes substantially the predetermined phase width.

[0049] Further, in the above-mentioned control circuit, the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period over time, from a start point of the period until a predetermined intermediate point; and

(b) the instantaneous absolute value is at least reduced or is substantially monotonously reduced while being at least reduced and is a constant for a partial period over time, from the intermediate point until an end point, and thereafter becomes zero.

[0050] Still further, in the above-mentioned control circuit, the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value has a period for which the instantaneous absolute value is zero from a start point of the period to a predetermined first intermediate point;

(b) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period from the first intermediate point until a predetermined second intermediate point; and

(c) the instantaneous absolute value is at least monotonously reduced while being at least reduced and is a constant for a partial period over time, from the second intermediate point until an end point, and thereafter becomes zero.

[0051] In addition, in the above-mentioned control circuit, the rectifier circuit apparatus further comprises: phase detecting means for generating a binary signal by comparing the alternating current voltage against a predetermined threshold voltage, wherein the waveform forming means detects cycle and phase of the alternating current voltage based on the binary signal, and forms the target current waveform of a frequency identical to the waveform of the alternating current voltage, based on the detected cycle and phase of the alternating current voltage, and wherein the third control means detects, based on the binary signal, the chopping operation phase width in which the semiconductor switch is in the chopping operation state or the chopping stop phase width in which the semiconductor switch is in the chopping stop state.

[0052] Further, the above-mentioned control circuit further comprises: AD converting means provided between the voltage detecting means and the second control means, the AD converting means performing an AD conversion of the direct current voltage to be a digital voltage; and calculating means provided between the AD converting means and the second control means, the calculating means performing a low-pass filtering calculation of the digital voltage, and thereafter outputting a voltage that is a calculated result to the second control means as a direct current voltage.

[0053] In addition, in the above-mentioned control circuit, a sampling frequency of the AD converting means is set to be fully higher than a frequency of the single-phase alternating current power supply. [0054]
Further, in the above-mentioned control circuit, the low-pass filtering calculation is performed by multiplying an immediately preceding calculated result by a coefficient of "(2n - l)/(2n)" (where n is an integer), thereafter adding an input digital voltage to an multiplied value, and using a value of an addition result as a next calculated result.

[0055] Therefore, according to the present invention, even when the detection precision of the direct current voltage contains an error, the direct current voltage is adjusted to a relatively appropriate value, to assume the similar current waveform. Further, by switching over the desired phase width depending on the characteristic of the load, a rectifying operation which always involves small loss and small harmonic current is realized.

[0056] In addition, the AD converting means converts a direct current voltage into a digital signal and detects the same at a sampling frequency fully higher than the frequency of the alternating current power supply. The obtained digital signal is subjected to LPF calculation for every cycle. Minute information that is smaller than the resolution is added to the digital signal so as to interpolate. Using the digital signal interpolated with the minute information as direct current voltage information, the digital signal interpolated with the minute information is adjusted such that the phase width with which chopping is actually performed becomes the desired value. Even when the power supply frequency component contained in the smooth voltage of the direct current voltage fluctuates and the resolution of the digital information is coarse, the fluctuation disperses the digital signal. Accordingly, a digital signal that is equivalent to a high resolution signal on average can be obtained. Thus, even with the AD converting means of coarse resolution, the average value of the direct current voltage can be adjusted at high precision, and the rectifying operation which always involves small loss and small harmonic current is realized. Therefore, the rectifier circuit apparatus according to the present invention can realize the rectifying operation which always involves small loss and small harmonic current, even in the case where the input current ripples because of the characteristic of the connected load.

[0057] In the following, with reference to the drawings, a description will be given of the embodiments of the present invention. It is to be noted that the present invention is not limited by the embodiments.

[0058] FIRST EMBODIMENT Fig. 1 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a first embodiment of the present invention.

[0059] Referring to Fig. 1, the opposite output terminals of a single-phase AC power supply 1 are short-circuited by a semiconductor switch 104 via a reactor 102, to structure one loop. The current detector 103 detects the current of the loop, and outputs a signal indicative of the detected current value lac to a control circuit 100. When the semiconductor switch 104 is turned ON, the current of the reactor 102 increases; on the other hand, when the semiconductor switch 104 is turned OFF, the current flowing through the reactor 102 is rectified by the diode bridge 105, and the rectified current flows into a smoothing capacitor 106 and a load 4, to drive a load 4. The DC voltage Vdc across the opposite ends of the smoothing capacitor 106 applied to the load 4 is detected by a DC voltage detector 110, and the DC voltage detector 110 outputs a signal indicative of the detected DC voltage Vdc to the control circuit 100.

[0060] In addition, the voltage level comparator 109 compares the AC voltage level of the alternating current power supply 1 against a predetermined threshold voltage, to generate a binary signal Scorn indicative of whether or not the AC voltage level is equal to or greater than the threshold voltage and outputs the binary signal Scorn to the control circuit 100. The control circuit 100 detects the phase of the AC voltage output from the alternating current power supply 1 based on the cycle and phase of the binary signal Scorn, and generates a target current waveform that is of a frequency substantially identical to the AC voltage and that has the similar figure as the AC voltage, based on the phase of the detected AC voltage. The control circuit 100 controls the semiconductor switch 104 to perform the chopping operation such that lac detected by the current detector 103 approximates the generated similar figure of the target current waveform.

[0061] Further, the control circuit 100 adjusts the similarity ratio of the target current waveform to be generated, in accordance with the deviation, such that the DC voltage Vdc detected by the DC voltage detector 110 becomes the desired voltage set in the control circuit 100. In this case, the control circuit 100 executes control to increase the similarity ratio of the target current command to obtain great current when the actual DC voltage is lower than the desired voltage, and to obtain small current when the actual DC voltage is higher than the desired DC voltage. In addition, based on the chopping state of the semiconductor switch 104, the control circuit 100 detects the phase width in which the semiconductor switch 104 is subjected to pulse width modulation (hereinafter, referred to as a "PWM") drive, and detects the deviation of the phase width from the desired value, to adjust the predetermined DC voltage value in accordance with the deviation.

[0062] Fig. 2 is a block diagram showing a detailed configuration of the control circuit 100 shown in Fig. 1. In the control circuit 100 shown in Fig. 2, an ultimate control object of the control system is to execute control such that the chopping operation phase width 0WON in which the chopping drive is performed becomes a desired phase width 0WON*. Firstly, based on a binary signal Scom binarized by comparing the voltage level of the AC power supply 1 against a predetermined threshold voltage Vth, a AC voltage phase detector 201 detects an AC phase, and outputs a signal indicative of the detected AC phase to a target current waveform shaper 202 and a chopping phase width detector 212. It is to be noted that, a detailed description of the AC voltage phase detector 201 will be given later. Subsequently, based on the signal indicative of the AC phase, the target current waveform shaper 202 generates a predetermined target current waveform, which will be detailed later, and outputs the same to a multiplier 208.

[0063] The chopping phase width detector 212 detects, based on a chopping drive signal Sch output from an lac compensation calculator 210 to a PWM modulator 211 for the semiconductor switch 104 and with reference to the phase of the AC voltage indicated by the signal from the AC voltage phase detector 201, a phase width that is the chopping state (hereinafter, referred to as a "chopping operation phase width" or simply referred to as a "chopping phase width") 9WON, and outputs a signal indicative of the chopping phase width GWON to a subtractor 204. On the other hand, a target phase width setter 203 outputs a signal indicative of a preset and stored desired chopping phase width 0WON* to the subtractor 204. The subtractor 204 is a so-called phase comparator, and the subtractor 204 calculates deviation of the phase width by subtracting the desired chopping phase width 0WON* from the actual chopping phase width 0WON, and outputs a signal indicative of the deviation to the phase width compensation calculator 205. The phase width compensation calculator 205 generates, by performing a predetermined compensation calculation for stably maintaining the phase width of the PWM-drive state, a command voltage Vdc* of a DC voltage to be output by the rectifier circuit apparatus, and outputs a signal indicative of the command voltage Vdc* to the subtracter 206. On the other hand, a signal indicative of the actual output DC voltage Vdc detected by the DC voltage detector 110 is input to the subtracter 206.

[0064] The subtracter 206 calculates the voltage deviation by subtracting the actual output DC voltage Vdc from the command voltage Vdc* of the DC voltage, and generates a signal indicative of the voltage deviation and outputs the signal to the Vdc compensation calculator 207. The compensation calculator 207 performs compensation calculation for allowing the actual DC voltage Vdc to be substantially identical to the command voltage Vdc* and to be stable, and outputs a signal indicative of the voltage deviation after the compensation calculation to the multiplier 208. The multiplier 208 multiplies the target current waveform from the target current waveform shaper 202 by the voltage deviation after the compensation calculation. The multiplier 208 generates an instantaneous current command value lac* that is the multiplication result, and outputs to a subtracter 209. In connection with the operation of the multiplier 208, when the actual voltage Vdc is lower than the command voltage Vdc*, the amplitude of the target current waveform is allowed to increase. On the other hand, when the actual voltage Vdc is higher than the command voltage Vdc*, the amplitude of the target current waveform is allowed to be reduced.

[0065] The subtracter 209 subtracts the actual current value lac detected by the current detector 103 from the instantaneous current command value lac*, to output a signal indicative of the current deviation that is the subtraction result to the lac compensation calculator 210. The lac compensation calculator 210 performs a predetermined compensation calculation for allowing the current input from the AC power supply 1 to become substantially identical to the current command value lac* stably and quickly, and outputs a signal indicative of current deviation after the compensation calculation to the PWM modulator 211 and the chopping phase width detector 212. The PWM modulator 211 performs PWM modulation to the current deviation having been subjected to the compensation calculation which is indicated by the input signal, to generate a chopping drive signal Sch for turning ON and OFF the semiconductor switch 104 and outputs the signal to the semiconductor switch 104. On the other hand, as described above, the chopping phase width detector 212 detects the chopping phase width 0WON, based on the chopping drive signal Sch output from the lac compensation calculator 210 to the PWM modulator 211 for the semiconductor switch 104 and with reference to the phase of the AC voltage indicative of the signal from the AC voltage phase detector 201. Then, the chopping phase width detector 212 outputs a signal indicative of the chopping phase width 0WON to the subtractor 204. Thus, the control loop of the chopping phase width is structured.

[0066] In the control circuit 100 that is structured as described above and that execute chopping drive control over the semiconductor switch 104, DC voltage Vdc is controlled such that the chopping phase width detected by the chopping phase width detector 212 becomes substantially identical to the target phase width set by the target phase width setter 203 in the right loop (i.e., the loop starting from 204, passing through 205, 206, 207, 208, 209, 210, and 212 and returning to 204) with reference to the subtractor 204 shown in Fig. 2. In addition, in the right loop (i.e., the loop starting from 206, passing through 207, 208, 209, 210, 211, 104, and 110 and returning to 206) with reference to the subtractor 206 shown in Fig. 2, the chopping drive control is executed over the amplitude of the target current such that the DC voltage Vdc detected by the DC voltage detector 110 becomes substantially identical to the desired DC voltage Vdc* indicated by the phase width compensation calculator 205. Further, in the right loop (i.e., the loop starting from 209, passing through 210, 211, 104, and 103, and returning to 209) with reference to the subtractor 209 shown in Fig. 2, the chopping drive control is executed such that the current lac detected by the current detector 103 becomes substantially identical to the target current lac* generated based on the target current waveform formed by the target current waveform shaper 202.

[0067] Fig. 3A is a diagram for describing the control operation according to the first operation example of the control circuit 100 shown in Fig. 1, that is a signal waveform diagram showing a relationship of the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. In addition, Fig. 3B is a diagram for describing the control operation according to the second operation example of the control circuit 100 shown in Fig. 1, that is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

[0068] The first operation example shown in Fig. 3A is the case where the DC voltage that is output is relatively low, and the chopping phase width (for example, minimum phase width) GWON for the semiconductor switch 104 is smaller than the desired phase width GWON*. Here, since the phase period for which the AC voltage is higher than the DC voltage increases, the current flowing from the AC power supply 1 toward the DC side via the reactor 102 and the diode bridge 105 increases. Accordingly, the waveform of the AC current becomes sharp, and the harmonic component of the AC current increases.

[0069] On the other hand, the second operation example shown in Fig. 3B is the case where the DC voltage is relatively high, and the chopping phase width (for example, maximum phase width) 6WON for the semiconductor switch 104 is greater than the desired phase width GWON*. Here, since the phase period for which the AC voltage is higher than the DC voltage is reduced as compared to the first operation example, the current flowing from the AC power supply 1 toward the DC side via the reactor 102 and the diode bridge 105 is also reduced. Accordingly, the harmonic component of the AC current reduces. However, since the period where the chopping for the semiconductor switch 104 is performed increases as compared to the waveform in the first operation example in Fig. 3A, the loss of circuit disadvantageously increases.

[0070] In this case, when the AC voltage from the AC power supply 1 contains distortion, a section in which chopping is performed may appear a plurality of times during the half cycle of the AC voltage. In such a case, the chopping phase width detector 212 may select the chopping phase width closer to 0 degrees or 180 degrees of the phase of the AC voltage as the control-purpose chopping phase width, and may perform the chopping control. In addition, the chopping phase width detector 212 may select the phase width which is closer to the reference phase with which the polarity of the AC current or the AC voltage is determined, in place of 0 degrees or 180 degrees of the phase of the AC voltage, as the control-purpose chopping phase width, to perform the chopping control. Further, the chopping phase width detector 212 may sum the obtained plurality of chopping phase widths, and may perform the chopping control employing the phase width of the sum result as the control-purpose chopping phase width. With such a structure also, the similar action and effect can be achieved.

[0071] SECOND EMBODIMENT In the first embodiment, the phase width QWON in which chopping is performed is detected, and the DC voltage command Vdc* is adjusted. On the other hand, a second embodiment is characterized in that, the phase width (hereinafter, referred to as a "chopping stop phase width") 8WOFF in which chopping is in the stop state is detected, and the DC voltage command Vdc is adjusted, to achieve the similar action and effect.

[0072] Fig. 4A is a diagram for describing the control operation according to a third operation example of a control circuit 100 of a rectifier circuit apparatus according to the second embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. In addition, Fig. 4B is a diagram for describing the control operation according to a fourth operation example of the control circuit 100 of the rectifier circuit apparatus according to the second embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

[0073] The third operation example shown in Fig. 4A is the case where the DC voltage that is output is relatively low, and the chopping stop phase width (for example, maximum phase width) GWOFF in which the semiconductor switch 104 is not subjected to the chopping operation is great. On the other hand, the fourth operation example shown in Fig. 4B is the case where the DC voltage that is output is relatively high as compared to the third operation example, and the chopping stop phase width (for example, minimum phase width) 6WOFF in which the semiconductor switch 104 is not subjected to chopping is small as compared to the third operation example. Since the chopping stop phase width GWOFF is complementary to the chopping operation phase width 8WON, the similar action and effect can be achieved.

[0074] In addition, when the AC voltage from the AC power supply 1 contains distortion, a section in which chopping is performed may appear a plurality of times during the half cycle of the AC voltage. In such a case, the chopping phase width detector 212 may select the chopping stop phase width GWOFF, which is of the OFF period closer to 90 degrees or 180 degrees, as the control-purpose chopping phase width, and may execute the chopping control.

[0075] It is to be noted that, though the waveform for solely the half cycle of the AC voltage is shown in Figs. 4A and 4B, as can also be seen from Figs. 3A and 3B or the prior art, the similar waveform appears in the other half cycle as the absolute value (instantaneous absolute value), and hence the description thereof is not repeated. In addition, in Figs. 4A and 4B, though the waveform for only the half cycle of the AC voltage is shown, as can clearly be seen from Figs. 3A and 3B or the conventional example, the similar waveform appears in the other half cycle as the absolute value, and hence the description thereof is not repeated.

[0076] THIRD EMBODIMENT A third embodiment is characterized in simplification of the control method according to the first embodiment. A chopping phase width detector 212 detects a first half phase width 91 WON in a section (a positive section or a negative section) in which polarity (sign) of the AC voltage does not vary and is fixed from 0 degrees or 180 degrees until chopping enters the stop state, to execute the chopping control.

[0077] Fig. 5A is a diagram for describing the control operation according to a fifth operation example of a control circuit 100 of a rectifier circuit apparatus according to the third embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. In addition, Fig. 5B is a diagram for describing the control operation according to a sixth operation example of the control circuit 100 of the rectifier circuit apparatus according to the third embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

[0078] The fifth operation example shown in Fig. 5A is the case where the DC voltage that is output is relatively low, and the phase width in which a semiconductor switch 104 is subjected to chopping is relatively small. The sixth operation example shown in Fig. 5B is the case where the output DC voltage is relatively high as compared to the fifth operation example, and the phase width in which the semiconductor switch 104 is subjected to chopping is great as compared to the fifth operation example. In the half cycle section of the AC voltage, the first half phase width 9 IWON in which chopping is performed has the similar tendency and, therefore, the action and effect similar to the first embodiment can be achieved.

[0079] FOURTH EMBODIMENT In a manner similar to that of the third embodiment, a fourth embodiment is characterized in simplification of the control method according to the first embodiment. A chopping phase width detector 212 detects a second half phase width 9W2ON in a section (a positive section or a negative section) in which polarity of the AC voltage does not vary and is fixed from 0 degrees or 180 degrees until chopping enters the stop state, to execute chopping control.

[0080] Fig. 6A is a diagram for describing the control operation according to a seventh operation example of a control circuit 100 of a rectifier circuit apparatus according to the fourth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. In addition, Fig. 6B is a diagram for describing the control operation according to an eighth operation example of the control circuit 100 of the rectifier circuit apparatus according to the fourth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

[0081] The seventh operation example shown in Fig. 6A is the case where the DC voltage that is output is relatively low, and the chopping phase width 0W2ON in which a semiconductor switch 104 is subjected to chopping is relatively small. The eighth operation example shown in Fig. 6B is the case where the output DC voltage is relatively high as compared to the seventh operation example, and the chopping phase width 0W2ON in which the semiconductor switch 104 is subjected to chopping is great as compared to the seventh operation example. In the half cycle section of the AC power supply 1, the second half chopping operation phase width 9W2ON has the similar tendency and, therefore, the action and effect similar to the first embodiment can be achieved.

[0082] FIFTH EMBODIMENT A fifth embodiment is characterized in that a chopping phase width detector 212 detects a total phase width (9W1ON + 9W2ON) of the chopping phase width 9W1ON according to the third embodiment and the chopping phase width 9W2ON according to the fourth embodiment, and to control the DC voltage such that the total phase width (9W1ON + 9W2ON) becomes a desired phase width.

[0083] Fig. 7A is a diagram for describing the control operation according to a ninth operation example of a control circuit 100 of a rectifier circuit apparatus according to the fifth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. In addition, Fig. 7B is a diagram for describing the control operation according to a tenth operation example of the control circuit 100 of the rectifier circuit apparatus according to the fifth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. The fifth embodiment can also achieve the action and effect similar to the first to fourth embodiments.

[0084] SIXTH EMBODIMENT Fig. 8 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a sixth embodiment of the present invention. In addition, Fig. 9 is a block diagram showing a detailed configuration of a control circuit 111 shown in Fig. 8. Referring to Fig. 8, the rectifier circuit apparatus according to the sixth embodiment is characterized in including a control circuit 111 in place of the control circuit 100 shown in Fig. 1. As shown in Fig. 9, as compared to the control circuit 100 shown in Fig. 1, the control circuit 111 is characterized in further including an input situation determiner 213 having an input current variation determining value setter 213a, a target phase width selector 214 (which is provided in place of the target phase width setter 203 shown in Fig. 1), and the chopping phase width extractor 216.

[0085] With the apparatus according to the prior art, when the input current ripples because of the electrical load characteristic of the connected load 4, identical chopping phase width cannot be obtained based on the cycle of the power supply voltage. Accordingly, the present embodiment is characterized in that: a desired chopping phase width in a region where ripple occurs is provided separately from a desired chopping phase width in a region where ripple does not occur; and in the region where ripple occurs, a maximum or averaged chopping phase width at a preset certain time or certain periodicity is extracted, to execute the chopping control.

[0086] In the structure according to the present embodiment shown in Figs. 8 and 9, by the control circuit 111 executing chopping control over the semiconductor switch 104, a reduction in harmonics in the power supply voltage and control over the DC voltage are achieved. In the control circuit 111 in Fig. 9, the ultimate control object of the control system is to execute control such that the chopping phase width 9WON subjected to chopping drive becomes identical to the desired phase width GWON* from the target phase width selector 214. In the following, a description will be given of the structure and operation of the control circuit 111 shown in Fig. 9 focusing on the difference from the control circuit 100 shown in Fig. 2, and a description as to the structure and operation which are similar to those of the control circuit 100 shown in Fig. 2 will not be repeated.

[0087] The current detector 103 outputs a signal indicative of the detected AC current lac to the input situation determiner 213. The input situation determining means 213 calculates the variation width of the input current from the peak values of a plurality of power supply voltage cycles, subtracts the input current variation determining value which is previously set by the input current variation determining value setter 213a from the calculated variation width, and outputs a signal indicative of a variation width deviation that is the subtraction result to the target phase width selector 214 and the chopping phase width extractor 216. The target phase width selector 214 previously stores a desired chopping phase width 0WON* which is to be set corresponding to the various numerical value range of the variation width deviation as a chopping phase width table in a built-in table memory 214m. The target phase width selector 214 refers to the chopping phase width table based on a signal indicative of the variation width deviation (i.e., the extent of the variation of the input current) from the input situation determiner 213, determines corresponding chopping phase width 8WON*, and outputs a signal indicative of the chopping phase width 9WON* to the subtractor 204.

[0088] When the chopping phase width extractor 216 determines that a ripple that is equal to or greater than a predetermined value does not occur in the phase width based on the phase width in the chopping state from the chopping phase width detector 212 and the variation width deviation from the input situation determiner 213, the chopping phase width extractor 216 outputs a signal indicative of the chopping phase width GWON in the chopping state from the chopping phase width detector 212 to the subtractor 204 as it is. On the other hand, when the chopping phase width extractor 216 determines that a ripple that is equal to or greater than a predetermined value occurs in the chopping phase width 0WON, the chopping phase width extractor 216 extracts a maximum or averaged chopping state phase width at a preset certain time or certain periodicity, and outputs a signal indicative of the phase width to the subtractor 204.

[0089] With the rectifier circuit apparatus provided with the control circuit 111 shown in Fig. 9 and structured as described above, even in the case where a ripple-like load which involves a ripple that is equal to or greater than a predetermined value exists, the chopping state phase width 0WON greatly influencing the harmonics of the power supply voltage can be extracted. Thus, both a reduction in harmonics of the power supply voltage and a reduction in the circuit loss are achieved.

[0090] SEVENTH EMBODIMENT Fig. 10 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a seventh embodiment of the present invention. In addition, Fig. 11 is a block diagram showing a detailed configuration of a control circuit 112 shown in Fig. 8. The rectifier circuit apparatus shown in Fig. 10 is characterized in that the motor of a compressor 301 connected to a compressor driver unit 300 is driven as a load, and a compressor control circuit 302 executes control over such an operation. As shown in Fig. 10, the compressor control circuit 302 outputs a rotation speed command Slot to the compressor driver unit 300 and the control circuit 112, in order to allow the motor of the compressor 301 to rotate at a desired rotation speed.

[0091] In a manner similar to that of the sixth embodiment, the rectifier circuit apparatus according to the seventh embodiment shown in Figs. 10 and 11 is characterized by the following. A desired chopping phase width in the region where a ripple occurs is provided separately from the desired chopping phase width in the region where a ripple does not occur. In the phase width region where a ripple occurs, a maximum or averaged chopping phase width at a preset certain time or certain periodicity is selected, to execute the chopping control.

[0092] As compared to the control circuit 111 shown in Fig. 9, the control circuit 112 shown in Fig. 11 is characterized in including:

(a) in place of the input situation determiner 213, a drive situation determiner 215 that determines drive situation based on a rotation speed command Srot from the compressor control circuit 302;

(b) in place of the target phase width selector 214, a target phase width selector 214A having a built-in table memory 214Am; and

(c) in place of the chopping phase width extractor 216, a chopping phase width extractor 216A.

[0093] Referring to Fig. 11, the rotation speed command Srot of the motor is input from the compressor control circuit 302 to the drive situation determiner 215. The drive situation determiner 215 subtracts a preset rotation speed from the rotation speed command Srot of the motor to obtain a rotation speed deviation, and outputs a signal indicative of the rotation speed deviation to the target phase width selector 214A and the chopping phase width extractor 216A. The target phase width selector 214A previously stores a desired chopping phase width 0WON* which is to be set corresponding to the various numerical value range of the rotation speed deviation as a chopping phase width table in the built-in table memory 214Am. The target phase width selector 214A refers to the chopping phase width table based on a signal indicative of the rotation speed deviation from the drive situation determiner 215, determines corresponding chopping phase width GWON*, and outputs a signal indicative of the chopping phase width GWON* to the subtracter 204.

[0094] The chopping phase width extractor 216A outputs a signal indicative of chopping state phase width GWON from the chopping phase width detector 212 to the subtracter 204 as it is when the rotation speed driving the compressor 301 exceeds a preset rotation speed, based on the chopping state phase width from the chopping phase width detector 212 and the rotation speed deviation from the drive situation determiner 215. On the other hand, when the rotation speed driving the compressor 301 is equal to or less than a preset rotation speed, the chopping phase width extractor 216A extracts a maximum or average chopping state phase width at a preset certain time or certain periodicity and outputs a signal indicative of the phase width to the subtractor 204.

[0095] In this case, firstly a description will be given of the relationship between the compressor 301 and the load in the present embodiment. Generally, the compressor 301 of reciprocating type or rolling piston type used for, for example, small-size household refrigeration and air conditioning equipment, has a characteristic in that required power for each of the intake stroke, the compression stroke, and the discharge stroke greatly differ from one another. Unless the required power for each stroke is appropriately supplied, the compressor 301 will vibrate and invite brake of piping or the like. Accordingly, control is executed to maintain the speed of every moment of the driving-purpose electric motor in each stroke, to suppress the vibration. As a result, the load of the rectifier circuit apparatus according to the present invention involves a ripple in a transition cycle among the strokes. In addition, the occurrence of vibration also relates to the transition cycle among the strokes. When the cycle is shorter, the vibration attenuates due to the inertial effect by the moment of inertia. When the cycle is short, that is, when the rotation speed of the motor is high, the necessity of executing the control for suppressing vibration is eliminated, and the state with small vibration can be maintained solely by average speed control. When solely the average speed control is executed, the load on the DC side involves little ripple.

[0096] For example, in the rotation speed region where the rotation speed of the compressor 301 exceeds a certain value, in the case where the vibration of the compressor 301 is small even when it is driven under solely the average speed control, the instantaneous speed control is not particularly necessary in the rotation speed region. Then, since the power supply current flowing into the smoothing capacitor 106 will not be influenced by the ripple, the chopping phase width extractor 216A according to the present embodiment switches over to output the chopping state phase width to the subtracter 204 as it is or to extract a maximum or average chopping state phase width at a preset certain time or certain periodicity so as to output the phase width to the subtracter 204, depending on at which rotation speed the compressor 301 is driven, i.e., at the value exceeding the predetermined rotation speed value or less than that.

[0097] Next, a description will be given of a modified embodiment of the seventh embodiment.

[0098] When the rotation speed of the compressor 301 increases according to the control method in a manner similar to that of the seventh embodiment, the rotation speed variation among every moment is reduced by the inertial effect, and a ripple in the electric power supplied to the compressor 301 due to speed control executed every moment is gradually reduced. Accordingly, even in the case where the instantaneous speed control is constantly in operation, in the region where the rotation speed is high, the ripple of the load little influences as seen from the AC power supply 1 side. In this case also, the chopping phase width extractor 216A switches over to output the chopping state phase width information to the subtracter 204 as it is in the region where the rotation speed of the compressor 301 is high, or to extract a maximum or average chopping state phase width at a preset certain time or certain periodicity in the region where the rotation speed of the compressor 301 is low so as to output the phase width to the subtracter 204. Thus, both a reduction in power supply harmonics and the circuit loss can be achieved. It is to be noted that, the threshold value of the rotation speed of the switchover is a variable value depending on the specification such as the compression ratio of the compressor 301 or the moment of inertia. For example, determination should be made depending on whether or not the chopping phase width GWON or the phase width GWOFF where chopping is in the stop state changes every power supply cycle.

[0099] It is to be noted that, though various specific methods of instantaneous speed control executed when it is necessary to suppress occurrence of vibration attributed to the rotation speed in driving the compressor 301 have been proposed, the difference among the methods does not directly relate to the present invention and, therefore, a detailed description thereof will not be given.

[0100] In this manner, even in the case where a ripple-like load attributed to the compressor 301 exists, through the use of the rotation speed command Srot of the motor of the compressor 301, the situation of the ripple load can be estimated. Accordingly, the chopping state phase width can be extracted without directly detecting the ripple situation, and a reduction in both the harmonics of the power supply voltage and the circuit loss can be achieved.

[0101] It is to be noted that, in the present embodiment, the drive rotation speed command Scot of the compressor 301 is employed as an input to the drive situation determiner 215. However, similar chopping control can be executed by employing whether or not there is instantaneous speed control, which is executed when it is necessary to suppress occurrence of vibration attributed to the rotation speed in driving the compressor 301, as an input from the compressor control circuit 302, and outputting a target phase width selecting signal to the target phase width selector 214 and the chopping phase width extractor 216A in accordance with whether or not there is the instantaneous speed control.

[0102] EIGHTH EMBODIMENT Fig. 12A is a diagram for describing the control operation according to an eleventh operation example of a control circuit 100 of a rectifier circuit apparatus according to an eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. In addition, Fig. 12B is a diagram for describing the control operation according to a twelfth operation example of the control circuit 100 of the rectifier circuit apparatus according to the eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

[0103] The control circuit 100 according to the eighth embodiment is characterized in being capable of further reducing the circuit loss, by shaping the target current waveform into a waveform, for example, a triangular wave other than sine wave. In particular, in the case where the load is light, even when the waveform distortion increases, the harmonic current itself is small. Therefore, it is possible to further reduce the loss.

[0104] The eleventh operation example shown in Fig. 12A is the case where the DC voltage that is output is relatively low, and the phase width GWON in which the semiconductor switch 104 is subjected to chopping is smaller than the desired phase width 6WON*. In this case also, since the phase period for which the AC voltage is higher than the DC voltage increases, the current flowing from the AC power supply 1 to the DC side via the reactor 102 and the diode bridge 105 increases. Accordingly, the waveform of the AC current becomes sharp, and the harmonic component of the AC current increases.

[0105] On the other hand, the twelfth operation example shown in Fig. 12B is the case where the DC voltage that is output is relatively high as compared to the eleventh operation example, and the phase width 0WON in which the semiconductor switch 104 is subjected to chopping is higher than the desired phase width GWON*. Here, since the phase period for which the AC voltage is higher than the DC voltage is reduced, the AC current flowing from the AC power supply 1 into the DC side via the reactor 102 and the diode bridge 105 is also reduced, and the harmonic component of the AC current is reduced. However, in the twelfth operation example shown in Fig. 12B, in a manner similar to that of Figs. 3A and 3B, since the period (phase width) for which the semiconductor switch 104 is subjected to chopping increases as compared to the waveform shown in Fig. 12A and, therefore, the loss of circuit disadvantageously increases.

[0106] In the eighth embodiment, preferably, as shown in Figs. 12A and 12B, the instantaneous absolute value of the target current waveform is a triangular waveform having a section monotonously increasing at a certain gradient over time, monotonously reducing at a certain gradient from a predetermined intermediate point (the degree smaller than 90 degrees), and becoming zero until the end point, in the first half period for the period from 0 degrees (start point) to 180 degrees (end point) of the AC voltage.

[0107] It is to be noted that, in Figs. 12A and 12B, since one chopping phase width 0WON is illustrated in the half cycle of the AC voltage, two chopping stop phase widths are illustrated in the half cycle of the AC voltage. Accordingly, as described above, chopping control may be executed based on one of the two chopping stop phase widths, or the total of the phase widths.

[0108] Subsequently, with reference to Figs. 13A to 13D, a description will be given of a target current waveform according to a modified embodiment of the eighth embodiment, the target current waveform having the shape different from those shown in Figs. 12A and 12B.

[0109] Fig. 13A is a diagram for describing the control operation according to a thirteenth operation example of the control circuit 100 of the rectifier circuit apparatus according to an eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. In addition, Fig. 13B is a diagram for describing the control operation according to a fourteenth operation example of the control circuit 100 of the rectifier circuit apparatus according to the eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, the AC current actually controlled. Further, Fig. 13C is a diagram for describing the control operation according to a fifteenth operation example of the control circuit 100 of the rectifier circuit apparatus according to the eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled. In addition, Fig. 13D is a diagram for describing the control operation according to a sixteenth operation example of the control circuit 100 of the rectifier circuit apparatus according to the eighth embodiment of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the rectified DC voltage, the target current waveform to be controlled, and the AC current actually controlled.

[0110] As compared to the target current waveform shown in Fig. 12A, the target current waveform according to the thirteenth operation example shown in Fig. 13A is a triangular waveform having a section (where the section is constantly zero), in place of the section that is monotonously reduced, in which zero is instantaneously achieved at a predetermined angle (for example, 110 degrees) exceeding 90 degrees in the second half period.

[0111] In addition, as compared to the target current waveform shown in Fig. 13A, the target current waveform of the fourteenth operation example shown in Fig. 13B is a waveform having a section (where the section is constantly zero) in which the monotonously increasing section sinusoidally increases over time, and zero is instantaneously achieved at a predetermined angle (for example, 110 degrees) exceeding 90 degrees in the second half period.

[0112] Further, the target current waveform of the fifteenth operation example shown in Fig. 13C is a waveform corresponding to the target current waveform shown in Fig. 13B under a constraint condition, so that zero is instantaneously achieved at an angle of intermediate point earlier than 90 degrees in the first half sine wave waveform (for example, 70 degrees).

[0113] Furthermore, the target current waveform of the sixteenth operation example shown in Fig. 13D is a waveform corresponding to the target current waveform shown in Fig. 13C staying zero for a predetermined period (where the section is constantly zero) from zero degrees to a first intermediate point, and thereafter monotonously increasing until a second intermediate point over time.

[0114] In the operation examples shown in Figs. 13C and 13D, the target current achieves zero earlier than 90 degrees. However, it should be used with the load with which the chopping operation of the semiconductor switch 104 transits to the chopping stop period earlier than the phase where zero is achieved. Even more, in the present operation example, since the DC voltage is lower than the maximum instantaneous voltage of the AC voltage, the current flows from the AC power supply 1 via the reactor 102 and the diode bridge 105 nearby 90 degrees. Accordingly, even when the target current becomes zero, the AC current continues to flow for a certain period. Thus, the current with small harmonic component can highly efficiently be realized.

[0115] In the foregoing embodiments, the monotonous increase or the monotonous decrease of the target current waveform may include a constant period, that is, the target current waveform may substantially increase or be substantially reduced. In this case, "a substantially monotonous increase" refers to a monotonous increase in the broad sense of the term in which the relationship of f (61) < f (92) is established where the phase of the target current waveform is 01 < 62. In other words, "a substantially monotonous increase" refers to a substantial monotonous increase in such a manner that it at least increases or at least increases and is a constant for a partial period over time. In addition, "a substantially monotonous reduce" refers to a monotonous reduce in the broad sense of the term in which the relationship of f (91) > f (62) is established where the phase of the target current waveform is 91 < 92. In other words, "a substantially monotonous reduce" refers to a monotonous reduce in such a manner that it is at least reduced or is at least reduced and is a constant for a partial period over time.

[0116] NINTH EMBODIMENT Fig. 14 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a ninth embodiment of the present invention. The rectifier circuit apparatus according to the ninth embodiment is characterized in rectifying the AC voltage from an AC power supply 1 by a bridge circuit structured by semiconductor switches 604a and 604b and diodes 605a, 605b, 605c, and 605d via a reactor 602, to drive a load 4 via a smoothing capacitor 106. The chopping control method according to the present embodiment is similar to the control circuit 100 shown in Fig. 1 according to the first embodiment, and two semiconductor switches 604b and 604d are simultaneously driven using the chopping drive signal Sch.

TENTH EMBODIMENT

Fig. 15 is a circuit diagram showing a configuration of a rectifier circuit apparatus according to a tenth embodiment of the present invention. The rectifier circuit apparatus according to the tenth embodiment is characterized in rectifying the AC voltage from an AC power supply 1 by a bridge circuit structured by semiconductor switches 704a and 704b and diodes 705a, 705b, 705c, and 705d via a reactor 702, to drive a load 4 via a smoothing capacitor 106. The chopping control method according to the present embodiment uses two chopping drive signals Schl and Sch2 in accordance with the polarity of the AC voltage from the AC power supply 1, and allows only one of the semiconductor switches 705a and 705b to perform the chopping operation. For example, when it is the period where the polarity of the AC voltage is higher on the side to which the reactor 702 is connected, the semiconductor switch 704b is subjected to chopping using the chopping drive signal Sch2. When it is the period where the polarity of the AC voltage is lower on the side to which the reactor 702 is connected, the semiconductor switch 704a is subjected to chopping using the chopping drive signal Sch 1.

[0117] It is to be noted that, in the present embodiment, when both the semiconductor switches 704a and 704b are simultaneously turned ON, short-circuit of the DC output voltage to the load 4 is invited. Therefore, at the point about which the polarity of the AC voltage is inverted, it is necessary to set so as not for the semiconductor switches 704a and 704b to turn ON. In such a case, in Figs. 3A and 3B, the phase in which chopping changes to the stop state can occur nearby 0 degrees and 180 degrees. However, in this case, since chopping is intentionally stopped for preventing the DC output voltage from short-circuiting, the foregoing can be easily realized by not regarding the phase as a phase in which chopping according to the present invention is stopped.

[0118] Subsequently, with reference to Figs. 16A and 16B, a description will be given of the binarization process of the voltage level comparator 109 used for the rectifier circuit apparatus according to the first to tenth embodiments.

[0119] Fig. 16A is a diagram for describing a first operation example of the binarization process of a voltage level comparator 109 of the rectifier circuit apparatus according to the first to tenth embodiments of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the threshold voltage Vth, and a binary signal from the voltage level comparator 109. In addition, Fig. 16B is a diagram for describing a second operation example of the binarization process of the voltage level comparator 109 of the rectifier circuit apparatus according to the first to tenth embodiments of the present invention, and is a signal waveform diagram showing a relationship between the AC voltage and the threshold voltage Vth, and a binary signal from the voltage level comparator 109.

[0120] That is, Figs. 16A and 16B show the method of detecting the voltage phase from the information as to whether the AC voltage is equal to or greater than a certain level. The information obtains whether or not the instantaneous voltage of the AC voltage exceeds a threshold value as a binary signal. That is, the voltage level comparator 109 compares the AC voltage against the threshold voltage Vth, and outputs a high level signal when the AC voltage is equal to or greater than the threshold voltage Vth. On the other hand, the voltage level comparator 109 outputs a low level signal when the AC voltage is less than the threshold voltage Vth.

[0121] In this case, even when the threshold voltage Vth varies, the cycle of the binary signal is identical to the power supply frequency. Accordingly, obtaining the midpoint on the high level side or low level side of the binary signal, the time of 90 degrees or 270 degrees of the AC voltage phase can be obtained. In addition, the midpoint of 90 degrees and 270 degrees of the AC voltage phase corresponds to the phase of 180 degrees and 0 degrees. Multiplying the information obtained in this manner using PLL or the like, the phase at every moment can accurately be obtained.

[0122] For example, when it is multiplied by 360, one pulse corresponds to 1 degree. Counting the pulse, the phase information in which unit is degrees can be obtained. Then, with the obtained phase information, the target current waveform of every moment should be called. The method of detecting the phase using the binary information obtained by other level comparison is also proposed in, for example, Patent Document 4 which is disclosed by the inventors of the present invention, and the method is not particularly limited.

[0123] Employing the present embodiment, even when the detection precision of the DC voltage contains an error, since the DC voltage is relatively adjusted such that the phase width in which the chopping operation is performed becomes the desired phase width, similar current waveform is achieved, and the rectifying operation which always involves small loss and small harmonic current is realized.

[0124] ELEVENTH EMBODIMENT Fig. 17 is a block diagram showing a detailed configuration of a control circuit 100 of a rectifier circuit apparatus according to an eleventh embodiment of the present invention. The control circuit 100 of the rectifier circuit apparatus according to the eleventh embodiment is characterized in that, as compared to the control circuit 100 according to the first embodiment shown in Fig. 2, an AD converter 230 and an LPF calculator 231 are inserted between a DC voltage detector 110 and a subtracter 206, to provide a particularly effective embodiment when practiced in digital computing. In the following, a description will be given of the difference from the control circuit 100 shown in Fig. 2.

[0125] Referring to Fig. 17, an analog signal indicative of the DC voltage detected by the DC voltage detector 110 is converted into a digital signal indicative of an AD converted value Vad by the AD converter 230 that performs AD conversion at a sampling frequency fully higher than the frequency of the AC power supply 1. Thereafter, the obtained digital signal is subjected to LPF calculation by an LPF calculator 231 that performs calculation having low-pass filter characteristic (which will be detailed later), and the signal (LPF calculated value Vdca) indicative of the calculated result is output to the subtracter 206. In this case, for example, the frequency of the AC power supply 1 is 60 Hz, and the sampling frequency is 600 kHz.

[0126] Fig. 18 is a block diagram showing a detailed configuration of the LPF calculator 231 shown in Fig. 17. Referring to Fig. 18, a signal indicative of the AD converted value from the AD converter 230 is input to an adder 253. The adder 253 adds a signal indicative of the input AD converted value and a signal from a constant multiplier 251, and outputs a signal indicative of the LPF calculated value Vdca that is an addition result to the subtracter 206 while outputting to a constant multiplier 251 via a delay circuit 252 that delays the signal by one clock time. The constant multiplier 251 multiplies the input signal by a predetermined constant (2n - l)/(2n) and outputs a signal indicative of the multiplication result to the adder 253. The calculation performed by the LPF calculator 231 shown in Fig. 18 is represented by the following Equation (1), which is a time-series recurrence formula where X (j) is an input and Y (j) is an output:

[0127] Mathematical Expression 1]

Y (j + 1) *- [(2»- l)/(2n)] xY (j) +X (j) (1)

[0128] The LPF calculation process is a first-order low-pass filter having a time constant which is "2n"-times as great as the calculation cycle, and the amplitude is "2n"-times greater. Accordingly, by performing this calculation, the n-bit information in the number of digits after the decimal point is added to the AD converted value Vad.

[0129] Fig. 19 is a diagram showing a operation of the rectifier circuit apparatus shown in Fig. 17, and is a signal waveform diagram showing AC current lac from the AC power supply 1, DC voltage Vdc, and AD converted value Vad (the DC voltage Vdc is represented by a dashed line) of the AD converter 230. That is, Fig. 19 shows the operation principle that the voltage detection precision is improved by the single-phase AC rectifier circuit performing the low-pass filtering process.

[0130] The AC voltage from the single-phase AC power supply 1 has a section where the voltage is zero. Since the electric power every moment is not constant, variations having a frequency twice as great as the power supply frequency remain in the DC voltage even when the smoothing capacitor 106 is used. In order to reduce the variations, the capacitance of the smoothing capacitor 106 must infinitely be increased, and practically is impossible.

[0131] Fig. 19 (c) shows the AD converted value Vad, which is obtained by subjecting the DC voltage Vdc (represented by a dashed line) to AD conversion at a sampling frequency fully higher than the frequency of the AC power supply 1. In accordance with the DC voltage Vdc at every moment, the obtained AD converted value Vad (digital value) assumes the values of K, K + l,K+2,K+3, ... . In this case, when the AD converted value Vad is subjected to the low-pass filtering calculation, the value converges to a value between (K + 1) and (K + 2) in the case shown in Fig. 19. Further, as shown in Fig. 18, since the function of multiplying by 2n is included as the low-pass filtering calculation, a value between {(K + 1) * 2n} and {(K + 2) * 2n} is obtained (integer value). That is, the n-bit information in the number of digits after the decimal point is added to the resolution of the AD converter 230, and the resolution improves. It is to be noted that, in the case where DC voltage Vdc does not vary at the frequency twice as great as the power supply frequency, and the average value of Fig. 19 (c) is shown, the AD converted value Vad constantly assumes (K + 1), and the resolution cannot be improved even when the LPF calculation is performed. That is, the present scheme can exhibit its effect by the single-phase AC rectifier circuit apparatus.

MODIFIED EMBODIMENTS AND SUPPLEMENTAL DESCRIPTION

[0132] With the subtractor 206 shown in Fig. 2 according to the first embodiment, the command voltage Vdc* must have the resolution equivalent to the AD converter 230. However, since the command voltage Vdc* is solely the information, the resolution can easily be enhanced in the similar manner as described above.

[0133] In addition, while the LPF calculation has been described with the example using the second power of 2, by setting the constant of the constant multiplier 251 to the value between 0 and 1, the LPF calculation can similarly be realized. In addition, as can be seen from the operation principle of Fig. 19, the similar effect can be achieved by the method other than method by the LPF calculation shown in Fig. 18.

[0134] Even in the case where the resolution of the AD converter 230 according to the eleventh embodiment is coarse, fine voltage information can be obtained. Accordingly, the DC voltage Vdc can be adjusted highly precisely, and the rectifying operation which always involves small loss and small harmonic current is realized. In addition, the scheme according to the eleventh embodiment can be practiced in combination with the first to tenth embodiments described in the foregoing.

[0135] It is to be noted that, throughout the embodiments, in some cases, when chopping transits from the stop state to the chopping state, the state just momentarily changes again to the stop state because of fluctuation or noises in the circuit. By not regarding such a state as the phase which changes to the chopping stop state according to the present invention, the present invention can easily be realized.

[0136] Further, in the embodiment of the present invention, though the AC voltage phase detector 201 detects the phase of the AC voltage and detects the chopping phase width with reference to the detected AC voltage, the present invention is not limited thereto. In the case where the frequency of the AC power supply 1 is fixed, the chopping phase width may be detected based on the information such as zero crossing of the AC power supply 1. In addition, in detecting the chopping phase width, the time of the chopping phase width may be measured by counting the number of pulses of the carrier signal realizing PWM modulation, which is one example of chopping method.

INDUSTRIAL APPLICABILITY

[0137] As detailed in the foregoing, the rectifier circuit apparatus of the present invention makes it possible to realize both suppression of the harmonic current and a reduction in circuit loss. Accordingly, by compressing coolant by the compressor to structure a heat pump, the rectifier circuit apparatus of the present invention is also applicable to cooling or heating air, or freezing food or the like.

DESCRIPTION OF REFERENCE CHARACTERS

[0138] 1: ALTERNATING CURRENT POWER SUPPLY
4: LOAD
100, 111, 112: CONTROL CIRCUIT
102, 602, 702: REACTOR
103: CURRENT DETECTOR
104, 604a, 604b, 704a, 704b: SEMICONDUCTOR SWITCH
105: DIODE BRIDGE CIRCUIT
106: SMOOTHING CAPACITOR
109: VOLTAGE LEVEL COMPARATOR
110: DC VOLTAGE DETECTOR
201: AC VOLTAGE PHASE DETECTOR
202: TARGET CURRENT WAVEFORM SHAPER
203: TARGET PHASE WIDTH SETTER
204, 206, 209: SUBTRACTOR
205: PHASE WIDTH COMPENSATION CALCULATOR
207: Vdc COMPENSATION CALCULATOR
208: MULTIPLIER
210: lac COMPENSATION CALCULATOR
211: PULSE WIDTH MODULATOR
212: CHOPPING PHASE WIDTH DETECTOR
213: INPUT SITUATION DETERMINER
213a: INPUT CURRENT VARIATION DETERMINING VALUE SETTER
214, 214A: TARGET PHASE WIDTH SELECTOR
214m, 214Am: BUILT-IN TABLE MEMORY
215: DRIVE SITUATION DETERMINER
216, 216A: CHOPPING PHASE WIDTH EXTRACTOR
230: AD CONVERTER
231: LOW-PASS FILTERING CALCULATOR
251: CONSTANT MULTIPLIER
252: DELAY CIRCUIT
253: ADDER
300: COMPRESSOR DRIVER UNIT
301: COMPRESSOR
302: COMPRESSOR CONTROL CIRCUIT
605a to 605d, 705a to 705d: DIODE

CLAIMS

1. A rectifier circuit apparatus, allowing a semiconductor switch to perform a chopping operation to short-circuit or open an output terminal of a single-phase alternating current power supply via a reactor, the rectifier circuit apparatus rectifying an alternating current voltage supplied from the single-phase alternating current power supply via the reactor to a direct current voltage and supplying to a load, the rectifier circuit apparatus comprising:

waveform forming means configured to form a target current waveform of a frequency identical to a waveform of the alternating current voltage;

current detecting means configured to detect an alternating current flowing from the single-phase alternating current power supply;

voltage detecting means configured to detect the direct current voltage;

first control means configured to control the chopping operation of the semiconductor switch such that a waveform of the detected alternating current becomes substantially the target current waveform;

second control means configured to control an amplitude of the target current waveform such that the detected direct current voltage becomes substantially a predetermined target direct current voltage; and

third control means configured to control the predetermined target direct current voltage such that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping stop phase width in which the semiconductor switch is in a chopping stop state becomes substantially a predetermined phase width.

2. The rectifier circuit apparatus as claimed in claim 1,
wherein the predetermined phase width is set by being changed depending on an electrical characteristic of the load.

3. The rectifier circuit apparatus as claimed in claim 2,

wherein the electrical characteristic of the load is a variation width of the alternating current, or a rotation speed command to a compressor motor when the load is a compressor.

4. The rectifier circuit apparatus as claimed in any one of claims 1 to 3,

wherein, when the plurality of chopping operation phase widths or the Plurality of chopping stop phase widths exist for a period where a polarity of the alternating current voltage is fixed, the third control means controls the jredetermined target direct current voltage such that any of the phase widths for he period or a total of the phase widths becomes substantially the predetermined jhase width.

5. The rectifier circuit apparatus as claimed in any one of claims 1 to 4,
wherein the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value )f the target current waveform is set to have the following periods:

(a) the instantaneous absolute value at least increases or substantially nonotonously increases while at least increasing and is a constant for a partial jeriod over time, from a start point of the period until a predetermined intermediate joint; and

(b) the instantaneous absolute value is at least reduced or substantially nonotonously reduced while being at least reduced and constant for a partial jeriod over time, from the intermediate point until an end point, and thereafter becomes zero.

6. The rectifier circuit apparatus as claimed in any one of claims 1 to 4,

wherein the target current waveform is set such that, for a period where the Polarity of the alternating current voltage is fixed, an instantaneous absolute value )f the target current waveform is set to have the following periods:

(a) the instantaneous absolute value has a period for which the nstantaneous absolute value is zero from a start point of the period to a jredetermined first intermediate point;

(b) the instantaneous absolute value at least increases or substantially nonotonously increases while at least increasing and is a constant for a partial jeriod from the first intermediate point until a predetermined second intermediate joint; and

(c) the instantaneous absolute value is at least monotonously reduced while being at least reduced and is a constant for a partial period over time, from the second intermediate point until an end point, and thereafter becomes zero.

7. The rectifier circuit apparatus as claimed in any one of claims 1 to 5, further comprising:

phase detecting means for generating a binary signal by comparing the alternating current voltage against a predetermined threshold voltage,

wherein the waveform forming means detects cycle and phase of the alternating current voltage based on the binary signal, and forms the target current waveform of a frequency identical to the waveform of the alternating current voltage, based on the detected cycle and phase of the alternating current voltage, and

wherein the third control means detects, based on the binary signal, the chopping operation phase width in which the semiconductor switch is in the chopping operation state or the chopping stop phase width in which the semiconductor switch is in the chopping stop state.

8. The rectifier circuit apparatus as claimed in any one of claims 1 to 7, further comprising:

AD converting means provided between the voltage detecting means and the second control means, the AD converting means performing an AD conversion of the detected direct current voltage to be a digital voltage; and

calculating means provided between the AD converting means and the second control means, the calculating means performing a low-pass filtering calculation of the digital voltage, and thereafter outputting a voltage that is a calculated result to the second control means as a detected direct current voltage.

9. The rectifier circuit apparatus as claimed in claim 8,
wherein a sampling frequency of the AD converting means is set to be fully higher than a frequency of the single-phase alternating current power supply.

10. The rectifier circuit apparatus as claimed in claim 8 or 9,

wherein the low-pass filtering calculation is performed by multiplying an immediately preceding calculated result by a coefficient of "(2n - l)/(2n)" (where n is an integer), thereafter adding an input digital voltage to a multiplied value, and using a value of an addition result as a next calculated result.

11. A control circuit for a rectifier circuit apparatus, the rectifier circuit apparatus allowing a semiconductor switch to perform a chopping operation to short-circuit or open an output terminal of a single-phase alternating current power supply via a reactor, the rectifier circuit apparatus rectifying an alternating current voltage supplied from the single-phase alternating current power supply via the reactor to a direct current voltage and supplying to a load, the control circuit comprising:

Waveform forming means for forming a target current waveform of a frequency identical to a waveform of the alternating current voltage;

First control means for controlling the chopping operation of the semiconductor switch such that a waveform of the alternating current flowing from the single-phase alternating current power supply becomes substantially the target current waveform;

second control means for controlling an amplitude of the target current waveform such that the direct current voltage becomes substantially a predetermined target direct current voltage; and

third control means for controlling the predetermined target direct current voltage such that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping stop phase width in which the semiconductor switch is in a chopping stop state becomes substantially a predetermined phase width.

12. The control circuit as claimed in claim 11,

wherein the predetermined phase width is set by being changed depending on an electrical characteristic of the load.

13. The control circuit as claimed in claim 12,

wherein the electrical characteristic of the load is a variation width of the alternating current, or a rotation speed command to a compressor motor when the load is a compressor.

14. The control circuit as claimed in any one of claims 11 to 13,

wherein, when the plurality of chopping operation phase widths or the plurality of chopping stop phase widths exist for a period where a polarity of the alternating current voltage is fixed, the third control means controls the predetermined target direct current voltage such that any of the phase widths for the period or a total of the phase widths becomes substantially the predetermined phase width.

15. The control circuit as claimed in any one of claims 11 to 14,

wherein the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period over time, from a start point of the period until a predetermined intermediate point; and

(b) the instantaneous absolute value is at least reduced or is substantially monotonously reduced while being at least reduced and is a constant for a partial period over time, from the intermediate point until an end point, and thereafter becomes zero.

16. The control circuit as claimed in any one of claim 11 to 14,

wherein the target current waveform is set such that, for a period where the polarity of the alternating current voltage is fixed, an instantaneous absolute value of the target current waveform is set to have the following periods:

(a) the instantaneous absolute value has a period for which the instantaneous absolute value is zero from a start point of the period to a predetermined first intermediate point;

(b) the instantaneous absolute value at least increases or substantially monotonously increases while at least increasing and is a constant for a partial period from the first intermediate point until a predetermined second intermediate point; and

(c) the instantaneous absolute value is at least monotonously reduced while being at least reduced and is a constant for a partial period over time, from the second intermediate point until an end point, and thereafter becomes zero.

17. The control circuit as claimed in any one of claims 11 to 15,

wherein the rectifier circuit apparatus further comprises:
phase detecting means for generating a binary signal by comparing the alternating current voltage against a predetermined threshold voltage,

wherein the waveform forming means detects cycle and phase of the alternating current voltage based on the binary signal, and forms the target current waveform of a frequency identical to the waveform of the alternating current voltage, based on the detected cycle and phase of the alternating current voltage, and

wherein the third control means detects, based on the binary signal, the chopping operation phase width in which the semiconductor switch is in the chopping operation state or the chopping stop phase width in which the semiconductor switch is in the chopping stop state.

18. The control circuit as claimed in any one of claims 11 to 17, further comprises:

AD converting means provided between the voltage detecting means and the second control means, the AD converting means performing an AD conversion of the direct current voltage to be a digital voltage; and
calculating means provided between the AD converting means and the second control means, the calculating means performing a low-pass filtering calculation of the digital voltage, and thereafter outputting a voltage that is a calculated result to the second control means as a direct current voltage.

19. The control circuit as claimed in claim 18,

wherein a sampling frequency of the AD converting means is set to be fully higher than a frequency of the single-phase alternating current power supply.

20. The control circuit as claimed in claim 18 or 19,

wherein the low-pass filtering calculation is performed by multiplying an immediately preceding calculated result by a coefficient of "(2n - l)/(2n)" (where n is an integer), thereafter adding an input digital voltage to an multiplied value, and using a value of an addition result as a next calculated result.