Claims:1. A single pole double throw (SPDT) switch (100) comprising:
a common input port (102) adapted to be switched between a first output port (104-1) in a first circuit arm (106-1) and a second output port (104-2) in a second circuit arm (106-2), RF signal applied to the common input port (102) switched between the first output port (104-1) and the second output port (104-2);
a plurality of FETs (108-1 to 108-16) coupled to the common input port, the first output port and the second output port, the plurality of FETs comprising:
one or more series FETs (108-13 to 108-15) configured in the first circuit arm and the second circuit arm, wherein said one or more series FETs located adjacent to the common input port, first output port and the second output port, said one or more series FETs adapted for selection of a path of RF signal; and
one or more shunt FETs (108-1 to 108-12) configured in the first circuit arm and the second circuit arm, wherein said one or more shunt FETs interconnected by transmission lines and located between the one or more series FETs to increase isolation between the ports.

2. The SPDT switch as claimed in claim 1, wherein the switch (100) is fabricated using 0.25 µm enhancement/depletion (E/D) mode high performance Gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) process with die size smaller than 2.0 mm X 1.1 mm X 0.1 mm in X, Y and Z respectively.

3. The SPDT switch as claimed in claim 1, wherein the one or more shunt FETs (108-1 to 108-12) inductively matched using the transmission lines in each first circuit arm and the second circuit arm to obtain a return loss better than 11dB over the band of operation, where the band of operation is very high frequency (VHF) to Ka band.

4. The SPDT switch as claimed in claim 1, wherein the one or more shunt FETs (108-1 to 108-12) comprises six shunt sections in each first circuit arm and the second circuit arm to obtain typical isolation better than 40dB upto Ku band and better than 35dB upto Ka band.

5. The SPDT switch as claimed in claim 1, wherein peripheries of the one or more series FETs (108-13 to 108-15) are optimized to less than 250 sq mm in each first circuit arm and the second circuit arm for a typical insertion loss lesser than 2dB up to Ka band, typical 1dB compression point (P1dB) of 24dBm and third order input intercept point (IIP3) of 40dBm.

6. The SPDT switch as claimed in claim 1, wherein the peripheries of the plurality of FETs (108-1 to 108-15) optimized to 250um sq to obtain multi-octave performance and to ensure wider bandwidth and low loss across the band of operation.

7. The SPDT switch as claimed in claim 1, wherein the plurality of FETs (108-1 to 108-15) coupled to resistors of predetermined value at the gate of each FET to obtain switching speed and prevent RF signal leakage without degradation in insertion loss.

8. The SPDT switch as claimed in claim 1, wherein the switch comprises series resistors (202-1, 202-2) of predetermined resistance value coupled to RF–DC crossover areas (200) on control lines to avoid RF signal coupling to DC lines.

9. The SPDT switch as claimed in claim 1, wherein the switch comprises ESD protection circuitry (300) that comprises ESD diodes coupled to control lines to avoid damage caused due to electrostatic discharge.

10. The SPDT switch as claimed in claim 9, wherein the ESD diodes comprises less than nine forward biased diodes from the control line to ground and less than nine reverse biased diodes from the control line to ground.
, Description:TECHNICAL FIELD
[0001] The present disclosure relates, in general, to a switching device, and more specifically, relates to a multi-octave fast switching, better isolation gallium arsenide (GaAs) based monolithic microwave integrated circuits (MMIC) reflective single pole double throw switch.

BACKGROUND
[0002] Modern miniaturized systems require compact, light-weight and low-cost components with a high yield rate. Excellent ultra wideband electronic warfare (EW) receiver like radar warning receiver (RWR) system requires compact, lightweight and faster single pole double through (SPDT) switch, which can be used to switch between Built-In Test (BITE) and radio frequency (RF) ports.
[0003] GaAs based monolithic microwave integrated circuits (MMIC) are vastly used in radar and EW communication systems because of their high yield and reliable performance. Monolithic microwave integrated circuit switches target a broad range of applications including those in electronic warfare, radars, instrumentation (test and measurement) and microwave communications. SPDT is used in time division duplexing (TDD), T/R switch plays an important role to direct the RF signal flow either to the transmitter or receiver. The p-i-n diode has been widely used as a fundamental device for switching RF signals. However, p-i-n diodes require high bias current and complex bias circuitry. Therefore, pseudomorphic high electron mobility transistor (pHEMT) (or FET) switches have become very popular because pHEMT switches have the advantage over diode switches for power dissipation and monolithic realization.
[0004] Single pole double throw switches are essential components of the phased array system that provide the necessary switching between transmitter and receiver paths to each element in the antenna array. Many switches with smaller sizes and low power consumption are required to realize a single-phase array system. An existing approach includes an SPDT switch with metal–oxide–silicon (MOS) transistor, gate resistor and a variable gate resistor circuit increasing the resistance value of the gate resistor when the MOS transistor is changed from a turn-off state to a turn-on state. However, this approach leads to slow switching speed, switching time mentioned is 4.8uS and lack of information on switch isolation. Another existing approach relates to an antenna transmit-receive switch. It uses a variable inductor is a digitally tunable inductor (DTL) and/or the variable capacitor is a digitally tunable capacitor (DTC). However, it is fabricated using Silicon on Insulator (SOI), not in GaAs technology. Further, insertion loss and isolation are not achieved. Another existing approach encompasses two input ends of the single-pole double-throw switch circuit that are designed into absorption-type so that the matching problem of two output ports of a power divider is solved. However, PIN diode switches are slow in switching and consume more current.
[0005] Another existing technology encompasses an improved positive logic FET switch stack that does not require a negative bias voltage, exhibits high isolation and low insertion loss and miss-match loss characteristics, requires fewer integrated circuits. However, this technology demands additional DC block capacitors to prevent DC leakage to RF ports. Yet another existing method achieves fast turning of the stacked FETs using auxiliary shorting switches that use local bias networks without degrading insertion loss and fast switching. PFET switches are locally shorting the gate bias resistors. However, this method suffers from limitations of the requirement of additional FETs, due to which die size is increased.
[0006] Therefore, it is desired to develop a compact and cost-effective means to address and solve the above-mentioned limitations.

OBJECTS OF THE PRESENT DISCLOSURE
[0007] An object of the present disclosure relates, in general, to a switching device, and more specifically, relates to a multi-octave fast switching, better isolation gallium arsenide (GaAs) based monolithic microwave integrated circuits (MMIC) reflective single pole double throw switch.
[0008] Another object of the present disclosure is to provide a device that achieves smaller size, low weight and power at a lower cost.
[0009] Another object of the present disclosure is to provide a device that achieves high isolation, good return loss with low insertion loss in the band of operation.
[0010] Another object of the present disclosure is to provide a device that operates with a dual power supply.
[0011] Another object of the present disclosure is to provide a device that achieves multioctave performance.
[0012] Another object of the present disclosure is to provide a device that is protected from electrostatic discharge surges.
[0013] Another object of the present disclosure is to provide a device that achieves miniaturization of the die.
[0014] Yet another object of the present disclosure is to provide a device that achieves faster switching and low power consumption.

SUMMARY
[0015] The present disclosure relates, in general, to a switching device, and more specifically, relates to a multi-octave fast switching, better isolation gallium arsenide (GaAs) based monolithic microwave integrated circuits (MMIC) reflective single pole double throw switch.
[0016] In an aspect, the present disclosure relates to a single pole double throw (SPDT) switch comprising a common input port adapted to be switched between a first output port in a first circuit arm and a second output port in a second circuit arm, RF signal applied to the common input port switched between the first output port and the second output port, a plurality of FETs coupled to the common input port, the first output port and the second output port, the plurality of FETs comprising one or more series FETs configured in the first circuit arm and the second circuit arm, wherein the one or more series FETs located adjacent to the common input port, first output port and the second output port, the one or more series FETs adapted for selection of a path of RF signal and one or more shunt FETs configured in the first circuit arm and the second circuit arm, wherein the one or more shunt FETs interconnected by transmission lines and located between the one or more series FETs to increase isolation between the ports.
[0017] According to an embodiment, the switch is fabricated using 0.25 µm enhancement/depletion (E/D) mode high performance Gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) process with die size smaller than 2.0 mm X 1.1 mm X 0.1 mm in X, Y and Z respectively.
[0018] According to an embodiment, the one or more shunt FETs can be inductively matched using the transmission lines in each first circuit arm and the second circuit arm to obtain a return loss better than 11dB over the band of operation, where the band of operation is very high frequency (VHF) to Ka band.
[0019] According to an embodiment, the one or more shunt FETs comprises six shunt sections in each first circuit arm and the second circuit arm to obtain typical isolation better than 40dB upto Ku band and better than 35dB upto Ka band.
[0020] According to an embodiment, peripheries of the one or more series FETs are optimized to less than 250 sq mm in each first circuit arm and the second circuit arm for a typical insertion loss lesser than 2dB up to Ka band, typical 1dB compression point (P1dB) of 24dBm and third order input intercept point (IIP3) of 40dBm.
[0021] According to an embodiment, the peripheries of the plurality of FETs optimized to 250um sq to obtain multi-octave performance and to ensure wider bandwidth and low loss across the band of operation.
[0022] According to an embodiment, the plurality of FETs coupled to resistors of predetermined value at the gate of each FET to obtain switching speed and prevent RF signal leakage without degradation in insertion loss.
[0023] According to an embodiment, the switch comprises series resistors (202-1, 202-2) of predetermined resistance values coupled to RF–DC crossover areas (200) on control lines to avoid RF signal coupling to DC lines.
[0024] According to an embodiment, the switch comprises ESD protection circuitry that comprises ESD diodes coupled to control lines to avoid damage caused due to electrostatic discharge.
[0025] According to an embodiment, the ESD diodes comprises less than nine forward biased diodes from the control line to ground and less than nine reverse biased diodes from the control line to ground.
[0026] Various objects, features, aspects, and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.

BRIEF DESCRIPTION OF THE DRAWINGS
[0027] The following drawings form part of the present specification and are included to further illustrate aspects of the present disclosure. The disclosure may be better understood by reference to the drawings in combination with the detailed description of the specific embodiments presented herein.
[0028] FIG. 1 illustrates an exemplary architecture of wideband reflective single pole double throw switch, in accordance with an embodiment of the present disclosure.
[0029] FIG. 2 illustrates an exemplary RF-DC crossover areas, in accordance with an embodiment of the present disclosure.
[0030] FIG. 3 illustrates a schematic view of ESD protection circuit, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0031] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
[0032] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0033] The present disclosure relates, in general, to a switching device, and more specifically, relates to a multi-octave fast switching, better isolation gallium arsenide (GaAs) based monolithic microwave integrated circuits (MMIC) reflective single pole double throw switch. The proposed single pole double throw switch, as disclosed herein, is a single chip having a suitable die size and operates from VHF to Ka band. The single pole double throw switch of the present disclosure enables to overcome the limitations of the prior art by offering less power consumption, better linearity in a smaller size. The proposed switch can be fabricated using GaAs pHEMT process with reflective topologies. The switch provides more shunt sections to achieve a high isolation switch over a wideband.
[0034] The single pole double throw switch of the present disclosure enables to overcome the limitations of the prior art by providing series resistors that can be coupled to the RF–DC crossover areas to avoid RF signal coupling to DC lines and aid in miniaturization of the die. The control voltage decides the selection of RF path to be connected to a common RF port (RFC), where the switch can include two paths, based on the control voltage one RF path can be connected to the common RF port. The single pole double throw switch of the present disclosure can avoid the risk of damage due to electrostatic discharge (ESD) by proving ESD protection circuit on control lines. The description of terms and features related to the present disclosure shall be clear from the embodiments that are illustrated and described; however, the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents of the embodiments are possible within the scope of the present disclosure. Additionally, the invention can include other embodiments that are within the scope of the claims but are not described in detail with respect to the following description.
[0035] FIG. 1 illustrates an exemplary architecture of wideband reflective single pole double throw switch, in accordance with an embodiment of the present disclosure.
[0036] Referring to FIG. 1, single pole double throw switch 100 (also referred to as device 100, herein) is configured for switching radio signals over a wide bandwidth range used in electronic warfare applications. In an exemplary embodiment, single pole double throw switch 100, as presented in the example, can be a reflective single pole double throw switch implemented as gallium arsenide (GaAs) monolithic microwave integrated circuit (MMIC) and intended to operate in the operating frequency band from very high frequency (VHF) to Ka band. As can be appreciated, the present disclosure may not be limited to this configuration but may be extended to other configurations. The reflective single pole double throw switch 100 is intended for use in electronic warfare (EW) modules to achieve lower size, weight, power at a lower cost.
[0037] The single pole double throw switch 100, as disclosed herein, is a single chip with a suitable die size. In an exemplary embodiment, the die size is smaller than 2.0 mm X 1.1 mm X 0.1 mm in X, Y and Z respectively. The single pole double throw switch 100 operates in continuous wave mode over a wide bandwidth, fabricated using 0.25 µm enhancement/depletion (E/D) mode high-performance GaAs pseudomorphic high electron mobility transistor (pHEMT) process in 0.01-26 GHz. The single pole double throw switch 100 can include common input port 102, two output ports (104-1, 104-2) and multiple transistors (108-1 to 108-16) of different peripheries. The single pole double throw switch 100 can be employed in test instrumentation, military radar, radio, EW, electronic countermeasure (ECM) applications and general-purpose microwave applications.
[0038] The common input port 102 is adapted to be switched between two output ports (104-1, 104-2), where the two output ports (104-1, 104-2) can be a first output port 104-1 RF1 in a first circuit arm 106-1 and a second output port 104-2 RF2 in a second circuit arm 106-2. The common input port 102, the first output port 104-1 and the second output port 104-2 can be RF ports. In an exemplary embodiment, the RF ports internally matched to 50Ohm in ON condition with a typical band of operation from VHF to Ka band. The RF signal, applied to the common input port 102, can be switched between the first output port 104-1 and the second output port 104-2.
[0039] In an exemplary embodiment, the common input port 102 is matched to 50Ohm in both ON and OFF conditions. The two output ports (104-1, 104-2) are 50ohm matched in ON condition individually. The size of the RF pad can be smaller than 200um x100um to accommodate a minimum of two bond wires at the RF input port 102 and output ports (104-1, 104-2). The dimension of the direct current (DC) pad can be smaller than 100um x100um used for the external control voltage interface.
[0040] In an exemplary embodiment, the multiple transistors (108-1 to 108-16) of different peripheries, as presented in the example, include sixteen transistors (108-1 to 108-16), where multiple transistors can be field-effect transistors (FETs) (also referred to as FETs, herein) or other types of a suitable transistor in accordance with the described embodiments arranged in a variety of network configurations.
[0041] The multiple FETs (108-1 to 108-16) can include one or more series FETs (108-13, 108-14, 108-15, 108-16) (also referred to as series FETs) and one or more shunt FETs (108-1 to 108-12) (also referred to as shunt FETs). The series FETs (108-13, 108-14, 108-15, 108-16) configured in the first circuit arm 106-1 and the second circuit arm 106-2, where the series FETs located adjacent to the common input port 102, first output port 104-1 and the second output port 104-2, the series FETs adapted for selection of a path of the RF signal. The shunt FETs (108-1 to 108-12) configured in the first circuit arm 106-1 and the second circuit arm 106-2, where the shunt FETs interconnected by transmission lines and located between the series FETs (108-13, 108-14, 108-15, 108-16) to increase isolation between the ports (102, 104-1, 104-2).
[0042] The switch 100 can be controlled using a gate voltage of -5V/0V. The switch 100 consumes essentially zero current and can be operated using negative control voltage logic of –5 V and 0 V respectively, to switch to either first output port 104-1 or the second output port 104-2, for example, RF1 or RF2 shown in FIG. 1.
[0043] Optimised periphery switch i.e., FETs configured to get better input third-order intercept point and good insertion loss, which limits the frequency of operation. In an exemplary embodiment, to achieve multioctave performance, FET peripheries used in the design are smaller than 250um sq to ensure wider bandwidth and low loss across the band of operation.
[0044] In an exemplary embodiment, all sections interconnected with matching networks designed using microstrip transmission lines with a relative dielectric constant of 12.9. The series FETs (108-13, 108-14, 108-15, 108-16) can be coupled to the shunt FETs (108-1 to 108-2) by microstrip transmission lines that can be extended between the common input port 102 and the two output ports (104-1, 104-2), where intermediate matching between FETs aids to improve return loss. The transmission line matching is used for cascading shunt sections in each RF branch to get the return loss better than 11dB over the band of operation.
[0045] The series FET peripheries (108-13, 108-14, 108-15, 108-16) can be configured near the RF ports at four locations, where the series FET peripheries (108-13, 108-14, 108-15, 108-16) located adjacent to common input port 102, first output port 104-1 and second output port 104-2 for selection of RF paths and impedance matching. In an exemplary embodiment, the FET peripheries (108-13, 108-14, 108-15, 108-16) of 123 um can be used near RF ports at four locations. The series FETs peripheries can be optimized to less than 250 sq mm in each arm (106-1, 106-2) for a typical insertion loss lesser than 2dB up to Ka Band, typical 1dB compression point (P1dB) of 24dBm and third order input intercept point (IIP3) of 40dBm.
[0046] The shunt FET peripheries (108-1 to 108-12) can be configured in the first circuit arm 106-1 and the second circuit arm 106-2. In an exemplary embodiment, six shunt FETs can be configured in each RF path to achieve typical isolation better than 40dB up to Ku band and better than 35dB up to Ka band. The shunt FET peripheries (108-1 to 108-12) can be inductively matched using transmission lines in each first circuit arm 106-1 and the second circuit arm 106-2 to obtain the return loss better than 11dB over the band of operation. In an exemplary embodiment, the shunt FET peripheries of 123 um are used for wideband isolation and help in impedance matching. The multiple shunt FETs (108-1 to 108-12) are used to improve isolation without degrading the insertion loss over the band.
[0047] In an embodiment, resistors can be coupled to the gate of the FETs (108-1 to 108-16), the resistors include any suitable resistors in accordance with the described embodiments. The resistors of predetermined resistance value are coupled to the gate of each FET to obtain better switching speed and prevent RF signal leakage to the digital circuit without too much degradation in insertion loss. In an exemplary embodiment, the resistor of the predetermined resistance value coupled to the gate of each FET to achieve a typical switching speed lesser than 25ns and rise and fall time less than 10nS. The predetermined resistance values can be less than 4 KiloOhm or any suitable value.
[0048] The gate resistors are used for better isolation between RF to DC circuitry. In an exemplary embodiment, MESA resistor of around 4.5KΩ+/-10% coupled to the gate of each switch FET (108-1 to 108-16). This resistor prevents RF leakage to DC control circuitry and improves switching speed with a slight degradation in insertion loss compared to 20KΩ.
[0049] In an embodiment, the RF lines can be realized using thick metal transmission lines except for DC–RF crossover junctions/areas 200, where DC–RF crossover junctions 200 can be realized with metal 2 used for routing. In an embodiment, series resistors (202-1, 202-2) of predetermined resistance values coupled to RF–DC crossover areas 200 is shown in FIG. 2 to reduce leakage and avoid RF signal coupling to DC lines.
[0050] In another embodiment, single pole double throw switch 100 can be protected from electrostatic discharge (ESD) surge using ESD protection circuit 300 shown in FIG. 3, where the ESD protection circuit 300 can be coupled to the control lines of the single pole double throw switch 100.
[0051] The embodiments of the present disclosure described above provide several advantages. The present disclosure provides the device 100 that achieves small size, low weight and power at a lower cost. The proposed device 100 achieves high isolation, good return loss with low insertion loss in the band of operation. The device 100 operates with a dual power supply, achieves multioctave performance, protects from electrostatic discharge surge, achieves miniaturization of die, enables faster switching and low power consumption.
[0052] FIG. 2 illustrates an exemplary RF-DC crossover areas 200, in accordance with an embodiment of the present disclosure. As shown in FIG. 2, the series resistors (202-1, 202-2) of predetermined value can be coupled to the RF to DC crossover areas 200 on control lines to avoid RF signal coupling to DC lines and aid in miniaturisation of the die. In an exemplary embodiment, thin-film resistors can be used for the design of RF-DC crossover areas 200. In another exemplary embodiment, the series resistors less than 250Ohm used in RF–DC crossover areas 200 to avoid RF signal coupling to DC lines.
[0053] FIG. 3 illustrates a schematic view of ESD protection circuit 300, in accordance with an embodiment of the present disclosure.
[0054] Referring to FIG. 3, the ESD protection circuit 300 comprising ESD diodes can be coupled to the control lines to protect the single pole double throw switch 100 from electrostatic discharge surges. In an exemplary embodiment, the ESD protection circuit 300 can include less than nine forward-biased diodes from control line to ground and less than nine reverse biased diodes from control line to ground. In an exemplary embodiment, the switch 100 can withstand ESD voltages upto 500V human-body model (HBM).
[0055] It will be apparent to those skilled in the art that the device 100 of the disclosure may be provided using some or all of the mentioned features and components without departing from the scope of the present disclosure. While various embodiments of the present disclosure have been illustrated and described herein, it will be clear that the disclosure is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the disclosure, as described in the claims.

ADVANTAGES OF THE PRESENT DISCLOSURE
[0056] The present disclosure provides a device that achieves a small size, low weight and power at a lower cost.
[0057] The present disclosure provides a device that achieves high isolation, good return loss with low insertion loss in the band of operation.
[0058] The present disclosure provides a device that operates with a dual power supply.
[0059] The present disclosure provides a device that achieves multioctave performance.
[0060] The present disclosure provides a device that is protected from electrostatic discharge surges.
[0061] The present disclosure provides a device that achieves miniaturization of the die.
[0062] The present disclosure provides a device that has faster switching and low power consumption.