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Self Recovery Mechanism In An Electronic Controlled Device

Abstract: The present disclosure relates generally to a self-recovery mechanism from a malfunction state in an electronic controlled device. In an aspect, the present disclosure relates to an electronic controlled device having a controller that is operatively coupled with a driver, wherein the controller can be configured to detect status of the driver such that the controller resets the driver if the status indicates that the driver is not in desired condition. In an exemplary aspect, the controller is a display controller and driver is a display driver.

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
28 March 2015
Publication Number
41/2016
Publication Type
INA
Invention Field
MECHANICAL ENGINEERING
Status
Email
docket@khuranaandkhurana.com
Parent Application
Patent Number
Legal Status
Grant Date
2020-10-19
Renewal Date

Applicants

Larsen & Toubro Limited
L & T House, Ballard Estate, P.O. Box No. 278, Mumbai – 400 001, Maharashtra, India

Inventors

1. CHINTALA, Dhananjai
Larsen and Toubro Ltd, Business Park, Gate No.-5, TC II, 4th Floor, Saki Vihar Road, Powai, Mumbai- 400 072, Maharashtra, India
2. TANDON, Garima
Larsen and Toubro Ltd, Business Park, Gate No.-5, TC II, 4th Floor, Saki Vihar Road, Powai, Mumbai- 400 072, Maharashtra, India
3. VEJLANI, Zainab
Larsen and Toubro Ltd, Business Park, Gate No.-5, TC II, 4th Floor, Saki Vihar Road, Powai, Mumbai- 400 072, Maharashtra, India

Specification

CLIAMS:1. An electronic controlled device comprising:
a controller operatively coupled with a driver, wherein the controller is configured to detect status of the driver, and wherein the controller resets the driver if the status indicates that the driver is not in desired condition.

2. The device of claim 1, wherein the controller is a display controller and driver is a display driver.

3. The device of claim 1, wherein the controller is operatively coupled with a main controller that issues a trip command to the circuit breaker.

4. The device of claim 3, wherein integrity of data received by communication between the controller and the main controller is checked, and wherein if the integrity is not maintained, communication registers are refreshed and/or communication variables are re-initialized to recover from communication failure.

5. The device of claim 1, wherein the controller detects the status of the driver using a “get status” signal/command.

6. The device of claim 1, wherein the controller detects the status of the driver using a communication bus.

7. The device of claim 4, wherein the communication bus is enabled when the controller is to send data to the driver for display.

8. The device of claim 1, wherein the controller and the driver communicate using a serial communication protocol.

9. The device of claim 1, wherein the device comprises a detection circuitry to monitor the power supply line such that sooner the supply line voltage is detected to be below a defined threshold, the detection circuitry communicates the same to the display controller, which then resets the driver.

10. The device of claim 1, wherein post reset, initialization instructions are sent by the controller to the driver after a pre-defined time interval.

11. The device of claim 1, wherein the reset is a software reset performed by the controller
.
12. The device of claim 1, wherein after sending data to the driver, the controller disables communication bus to avoid a latch up condition.
,TagSPECI:TECHNICAL FIELD
[0001] The present disclosure relates in general to a self-recovery mechanism from a malfunction state in an electronic controlled device.

BACKGROUND
[0002] Background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
[0003] Electrostatic Discharge (ESD) involves transfer of electrostatic charge between objects at different electrical potentials and occurs with direct contact or when induced by an electrostatic field. Electrostatic discharge (ESD) includes localized transfer at the discharge point, inductive coupling between a higher voltage or “charged” object and the discharge object, and electromagnetic radiation from the charged object.
[0004] Modern day semiconductor devices are very sensitive to ESD, and when subjected to an ESD event, the devices may suffer direct, indirect, and latent damage, wherein direct damage results from physical destruction or degradation of an electronic part in the device, which makes it unusable. This failure is classified as a hard failure since it is irreversible. An indirect damage is the result of when, for instance, a device changes its state due to conducted or radiated electromagnetic interference (EMI) sourced by the discharge. This failure is classified as soft failure. A latent damage is when a discharge affects the device, which does not show any apparent damage but with time causes a hard failure to occur. Because of the increase in use of semiconductor devices in every aspect of life, it has become an important issue to protect electronic devices as much as possible from damage or malfunction due to ESD.
[0005] One common way of minimizing the effects of an ESD event on an electronic device is to either add protective circuitry, apply shielding to ESD sensitive circuitry in the device, or to construct an elaborate ground system, which can dissipate the high transient currents generated during an ESD event. Although these precautions may protect the device from suffering hard failures, soft failures resulting in erroneous behavior or hang-ups of the device may still occur due to the EMI generated by discharges.
[0006] Latch-up may be defined as creation of a low-impedance path between power supply rails as a result of triggering a parasitic device. Latch-up occurs in CMOS devices, wherein intrinsic parasitic devices form a PNPN SCR structure when one of the two parasitic base-emitter junctions is momentarily forward biased. The SCR turns on, causing a continuing short between the supplies. This condition is self-sustaining, i.e., it does not require subsequent ESD events to continue the latch-up condition. The only way to halt this condition is to remove power from the device. Events need not last long to trigger latch-up. Short-lived transients, spikes, or ESD events may be enough to cause a device to enter a latch-up state. Such a latch-up condition is clearly undesirable, particularly if the liquid crystal display device is used to display critical safety warning signals, for which there may be potentially damaging or dangerous consequences if ignored.
[0007] Usually, ‘soft failure’ by system level ESD test for the compact LCD module can be classified as non-display, dot/line/block display defects and temporary malfunction of the device, such as a hang-up or a freeze, which disappears after a restart (power off power on) of the device. These kinds of display failure phenomena are widely well known to be due to the contamination of the logic or memory bit data stored at the normal display status before ESD stimulus. However, in many cases a complete restart of the device is unnecessary since the soft failure often only affects a specific electronic part in the device, which in many cases can be restarted separately without restarting the entire device.
[0008] FIG. 2 shows a sample soft failure case of compact LCD module, which occurred during ESD testing as per IEC61000–4-2 [1]. It was analyzed that this abnormal display screens are caused by the data contamination of the graphic memory (embedded in driver IC).
[0009] Traditional protection methods such as adding ESD diodes or low pass filters or common mode chokes on the LCD lines will not be effective and suitable for compact modules. It requires special transient disturbance detection methods using either software or by both software and hardware logic.
[0010] US 2007/0127052 A1 discloses an electronic system capable of automatically recovering from an abnormal condition. The electronic system comprises a target device, a memory module, a driving device and a processor. The memory module stores a plurality of, settings for the target device. The driving device directs operations of the target device according to the settings stored in the memory module. The processor, coupled to the driving device, checks the settings in the memory module to determine whether the settings have been abnormally changed and corrects the settings in the memory module when the settings have been abnormally changed.
[0011] US 7,644,309 B2 discloses recovery of a hardware module of an electronic device from a malfunction state. The hardware module is connected via a signal line to a recovery component of the device, a state of the signal line being controlled by the hardware module. The recovery component monitors a state of the signal line. Whenever the signal line is not detected during a predetermined period of time, the recovery component causes hardware reset of the hardware module.
[0012] External influences may change for example one bit or several bits in control registers of the display module. Further, they may corrupt images that are currently transferred via an internal bus in the display module. Moreover, external influences may stop for example a powering circuit or a timing circuit in the display module. Such disturbances may result in a blank display, in a presentation of corrupted data on the screen, or in a change of mode of the display.
[0013] So far, it is only possible to detect a malfunction of a display by means of a visual check. In order to ensure a correct presentation nevertheless, software run by the host typically sends a refresh sequence to the display driver at regular intervals, for example every three seconds. The refresh sequence is used to rewrite all registers of the display module and the image data currently stored in the frame memory. A software refresh, however, is not suited to recover a display from all possible malfunctions which may be caused by external influences. For example, if the powering circuit is affected such that it entered an abnormal state, a register refresh by software does not fix the error. Such malfunctions in a display module can usually only be removed by rebooting the electronic device or by means of a separate hardware reset of the display driver.
[0014] In contrast to a software refresh, however, a hardware reset is not suited to be performed automatically on a regular basis, because a hardware reset causes visual effects on the screen. If a hardware reset was performed every three seconds, for example, this would result in a blank display every three seconds, which would be annoying to a user.
[0015] US7,821,751B2 discloses a method for detecting an electrostatic discharge event by using antenna as ESD detector in an electronic device, such as a mobile communication device, and to help the electronic device to recover from any adverse effects induced by the electrostatic discharge event.
[0016] US7,650,552B2 discloses a method and apparatus for detecting an error compares a hardwired reference value to a corresponding predetermined value and generates an error indication in response to a change in the predetermined value.
[0017] In some systems, the system may also automatically update critical registers every few seconds with a stored backup of the information to provide an automatic recovery mechanism even though no error occurred. However, this can utilize unnecessary amounts of power when the device is battery powered. Another solution may be to have the host processor monitor external signals on a bus, for example, as opposed to looking at registers in the coprocessor and then generating a coprocessor reset when the CPU detects unexpected information on the external signals on the bus or other pin. However, such systems will not detect all corruption cases since only a few of them would result in external pin state changes.
[0018] WO2014/057301A1 discloses a method and system for testing a semiconductor device against electrostatic discharge monitors the functional performance of the semiconductor device. The monitoring comprises monitoring one or more signal waveforms of respective one or more signals on respective one or more pins of the semiconductor device and monitoring one or more register values as function of time. The method can further comprise identifying a root cause of the functional change of the monitored signals and register values as function of time.
[0019] US 7,042,428 B2 discloses an apparatus and method for preventing lock-up of an LCD in a mobile terminal that is capable of detecting whether an ESD has been applied to an LCD by monitoring a single predetermined pin of the LCD that exhibits a voltage level change that is greater than a voltage level change exhibited by all other individual pins of the LCD. The software method for periodically resetting the LCD in order to prevent lock-up of the LCD causes inconvenience for users, as the LCD is periodically reset and thus blinks periodically.
[0020] US 7,142,400 B1 discloses a method for recovery from overstress conditions, comprising the steps of (A) detecting an overstress event, (B) storing an occurrence of the overstress event and (C) taking appropriate action in response to the stored occurrence of the overstress event.
[0021] US 2010/0201899 A1 discloses a discharge detection circuit has an electrostatic discharge detector that has at least one of a first detector detecting a positive voltage surge and outputting a first detection signal and a second detector detecting a negative voltage surge and outputting a second detection signal, and outputs a detection signal indicating whether the surge is generated, based on at least one of the first detection signal and the second detection signal, and an external output terminal that outputs the detection signal.
[0022] US 7,911,753 B2 discloses that in Low Voltage Low signal (LVLS) master/slave system, where the power supply is about +2.6V, and the normal clock and/or data signals are about 80 mV with DC offset about 850 mV. In these systems during transient disturbances the voltage levels of clock and/or data signals are either at power supply potential or at ground potential. By comparing these signals with a reference voltage, an error signal can be generated and which in turn used for resetting the system.
[0023] It is advantageous to recover from ESD events, but it would be advantageous to also detect and recover from non ESD event, e. g., power droops, and/ or logic blips that do not rise to an ESD-type failure or failures due to some other external factors.
[0024] US 6,441,675 B1 discloses a method comprising: Sensing voltages that are determinative of overstress conditions occurring within an electronic system, the overstress conditions determined by electrical characteristics of circuit elements having different overstress thresholds to detect different overstress conditions.
[0025] There is therefore a need in the art for an efficient self-recovery mechanism in an electronic controlled device that employs both hardware and firmware designs.
[0026] All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition of that term provided herein applies and the definition of that term in the reference does not apply.
[0027] In some embodiments, the numbers expressing quantities of ingredients, properties such as concentration, reaction conditions, and so forth, used to describe and claim certain embodiments of the invention are to be understood as being modified in some instances by the term “about.” Accordingly, in some embodiments, the numerical parameters set forth in the written description and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by a particular embodiment. In some embodiments, the numerical parameters should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of some embodiments of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as practicable. The numerical values presented in some embodiments of the invention may contain certain errors necessarily resulting from the standard deviation found in their respective testing measurements.
[0028] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0029] The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[0030] Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all Markush groups used in the appended claims.

OBJECTS OF THE INVENTION
[0031] It is an object of the present disclosure to provide an efficient self-recovery mechanism in an electronic controlled device that employs both hardware and firmware designs.
[0032] It is an object of the present disclosure to provide a self-recovery mechanism that can be used for compact LCD modules where the number of I/O lines of the display driver is less.
[0033] It is an object of the present disclosure to provide a self-recovery mechanism that provides reliable solution.
[0034] It is an object of the present disclosure to provide a self-recovery mechanism that provides robust, compact, and cost effective solution.

SUMMARY
[0035] The present disclosure relates generally to a self-recovery mechanism from a malfunction state in an electronic controlled device.
[0036] According to one embodiment, the present disclosure relates to an electronic controlled device having a controller that is operatively coupled with a driver, wherein the controller can be configured to detect status of the driver such that the controller resets the driver if the status indicates that the driver is not in desired condition. In an exemplary aspect, the controller is a display controller and driver is a display driver.
[0037] In another aspect, the controller detects the status of the driver using a “get status” signal/command. According to one embodiment, the controller can detect the status of the driver using a communication bus, wherein the communication bus can be enabled only when the controller is to send data to the driver for display.
[0038] In an aspect, the controller and the driver communicate using a serial communication protocol. In another aspect, the device of the present disclosure can include a detection circuitry that monitors the power supply line such that sooner the supply line voltage is detected to be below a defined threshold, the detection circuitry communicates the same to the display controller, which then resets the driver. According to one embodiment, wherein post reset, initialization instructions can be sent by the controller to the driver after a pre-defined time interval. In another aspect, the reset can be a software reset that is performed by the controller.
[0039] In yet another aspect, after sending data to the driver, the controller can disable the communication bus to avoid a latch up condition. In an aspect, device of the present disclosure can further be configured to check the integrity of data received by communication between the controller and the driver is checked.
[0040] Various objects, features, aspects and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components

BRIEF DESCRIPTION OF THE DRAWINGS
[0041] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
[0042] FIG. 1 illustrates an exemplary block diagram of the integrated circuit in accordance with an aspect of the present disclosure.
[0043] FIG. 2 illustrates effect of soft failure in a compact LCD module during ESD test.
[0044] FIG. 3 illustrates signal pattern during Display Screen OFF after ESD pulse.
[0045] FIG. 4 illustrates signal pattern during display screen hang up or freeze after giving ESD pulse.
[0046] FIG. 5 illustrates an exemplary flow diagram illustrating self recovery mechanism in an electronic controlled device in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0047] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure as defined by the appended claims.
[0048] Each of the appended claims defines a separate invention, which for infringement purposes is recognized as including equivalents to the various elements or limitations specified in the claims. Depending on the context, all references below to the "invention" may in some cases refer to certain specific embodiments only. In other cases it will be recognized that references to the "invention" will refer to subject matter recited in one or more, but not necessarily all, of the claims.
[0049] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0050] All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[0051] Various terms as used herein are shown below. To the extent a term used in a claim is not defined below, it should be given the broadest definition persons in the pertinent art have given that term as reflected in printed publications and issued patents at the time of filing.
[0052] The present disclosure relates generally to a self-recovery mechanism from a malfunction state in an electronic controlled device.
[0053] According to one embodiment, the present disclosure relates to an electronic controlled device having a controller that is operatively coupled with a driver, wherein the controller can be configured to detect status of the driver such that the controller resets the driver if the status indicates that the driver is not in desired condition. In an exemplary aspect, the controller is a display controller and driver is a display driver.
[0054] In another aspect, the controller detects the status of the driver using a “get status” signal/command. According to one embodiment, the controller can detect the status of the driver using a communication bus, wherein the communication bus can be enabled only when the controller is to send data to the driver for display.
[0055] In an aspect, the controller and the driver communicate using a serial communication protocol. In another aspect, the device of the present disclosure can include a detection circuitry that monitors the power supply line such that sooner the supply line voltage is detected to be below a defined threshold, the detection circuitry communicates the same to the display controller, which then resets the driver. According to one embodiment, wherein post reset, initialization instructions can be sent by the controller to the driver after a pre-defined time interval. In another aspect, the reset can be a software reset that is performed by the controller.
[0056] In yet another aspect, after sending data to the driver, the controller can disable the communication bus to avoid a latch up condition. In an aspect, device of the present disclosure can further be configured to check the integrity of data received by communication between the controller and the driver is checked.
[0057] According to one embodiment, the present disclosure relates in general to a self recovery mechanism from a malfunction state in an electronic controlled device. Such an electronic controlled device can include a communication interface, one or more microcontroller and/or microprocessor based system(s) with a display module and inter-controller communication.
[0058] In accordance with the present disclosure, self-recovery mechanism in an electronic controlled device is provided, which employs both hardware and firmware designs. This configuration can be used for compact LCD modules where the number of I/O lines of the display driver are less.
[0059] In an aspect, the present disclosure provides a microcontroller/microprocessor unit (MCU), where the MCU receives an interrupt signal from a detection circuit upon detecting fall in LCD supply voltage, and generates software reset to recover the display driver from the latch up condition. The MCU can also read the driver settings in the internal registers at regular intervals and generate software reset upon reading the corrupted settings in the internal registers. The MCU can also disable the bus interface section after every data transmission to avoid latch up condition that cannot be detected by the detection circuitry. In this way, a robust recovery can be achieved in compact LCD modules from the ESD latch up condition.
[0060] In an aspect, information to be displayed can usually be prepared in a microcontroller through an interface (serial, like I2C or SPI, or parallel), wherein such information can, along with configuration settings, be transmitted to a LCD driver that can then generate the necessary analog signals to drive the LCD.
[0061] In an aspect, electromagnetic disturbances can couple in at almost any part of the circuit such as at the supply lines, through the bus interface, directly at the LCD and working its way back into the LCD driver, at the microcontroller, which may be affected and therefore will not transmit the correct information to the LCD driver. In an aspect, usually, ‘soft failure’ by system level ESD test for the compact LCD module can be classified as non-display, dot/line/block display defects and temporary malfunction of the device such as a hang-up or a freeze, which disappears after a restart (power off power on) of the device. These kinds of display failure phenomena are widely well known to be due to contamination of logic or memory bit data stored at normal display status before ESD stimulus. However, in many cases a complete restart of the device is unnecessary since the soft failure often only affects a specific electronic part in the device, which in many cases can be restarted separately without restarting the entire device.
[0062] In an aspect, the proposed method provides a reliable, robust, compact and cost effective solution that solves the aforementioned problems. System level ESD protection methodology for compact display driver IC is discussed at the viewpoint of hard and soft failure caused by injected ESD charge into I/O pins from LCD panel. A hardware/firmware system co-design has been proposed in the present disclosure to protect display electronic products against system-level electrostatic discharge (ESD) transient disturbance as per IEC61000–4-2 [1]. By including transient detection circuit, the firmware can execute system recovery procedure to recover all electrical functions under system-level ESD tests. The proposed modification has successfully improved the performance against external EMI.
[0063] In another aspect, the present disclosure provides a microcontroller/microprocessor unit (MCU), where the MCU receives an interrupt signal from the detection circuit upon detecting fall in LCD supply voltage, and generates a software reset to recover the display driver from the latch up condition. The MCU can also read the driver settings in the internal registers at regular intervals and generate the software reset upon reading the corrupted settings in the internal registers. The MCU can also disable the bus interface section after every data transmission to avoid the latch up condition, which cannot be detected by the detection circuitry. In this way a robust, reliable, cost effective soft recovery can be achieved in compact LCD modules from the ESD latch up condition.
[0064] FIG. 1 illustrates an exemplary block diagram 100 of the integrated circuit in accordance with an aspect of the present disclosure. FIG.1 is an exemplary block diagram 100 of the integrated circuits, more specifically MCCB Electronic trip unit (ETU) with a LCD display comprising a main controller 102, a display controller 106, a LCD display driver 104, and a bus interface, wherein the main controller 102 can be configured to compute and measure parameters such as voltage, current, power, energy, power factor and THD. It is also responsible for issuing a trip command upon detecting abnormal conditions. After computing the measuring parameters, the main controller 102 can send the data to the display controller 106 via the bus interface through say a serial communication protocol. Here, the display controller 106 can be configured to send trip settings received from the HMI (Human Machine Interface) to the main controller 102 via the bus interface by serial communication protocol, and also be responsible for sending the measuring parameters received from the main controller 102 to the display driver 104 via the bus interface by serial communication protocol.
[0065] FIG. 2, 3, and 4 illustrate the problems for which the proposed methods and systems have been provided with the recovery mechanism. In an aspect, the display driver 104 usually works at a particular supply voltage and requires a set of initialization settings at its power up. In case the power supply to the driver falls below the threshold momentarily because of say transient disturbance as shown in FIG. 3, the driver 104 turns off, thus turning OFF the display. Even after supply regains, the driver 104 will not turn ON since it requires initialization settings at its power up. In this case, the display will remain OFF once it is turned OFF due to fall in power supply, unless the entire system is reset.
[0066] In an aspect, the proposed disclosure provides a self-recovery mechanism for the above-stated condition by using a detection circuitry that detects the fall in power supply voltage. In case the condition of power supply falling below threshold is detected, the circuitry gives indication to the controller 106, which controls the display driver 104. The controller 106 in turn gives software reset to the 104 driver, and also sends the initialization instructions to turn it ON, thus recovering the display from the above mentioned state.
[0067] As shown in FIG. 2, display also sometimes displays garbage image due to corruption of settings in driver memory. Once the display enters such conditions, even continuous refresh of the driver registers don't solve the problem.
[0068] Aspects of the present disclosure therefore provide a mechanism for detection of health of the driver 104 and a method to recover from the latch up condition. Here the display controller 106 can run a health check algorithm at particular intervals to monitor the status of the driver health by using a “Get Status” command. Here, a single line can be used for sending command to get the status as well as to read the status of the driver 104 by using tri-state buffer. On getting the “Get Status” command, the driver 104 can send one byte of status data. In case the driver 104 is unhealthy, the status data will not be same as the status data expected, and the display controller 106 gives software reset to the driver 104. Also the bus interface section is enabled only during the time when the display controller 106 is sending data to the driver 104 for displaying; else the bus interface section is disabled. This helps in avoiding display screen hanging problem caused by latch up condition as shown in FIG. 4, which generally goes undetected by the detection mechanism.
[0069] For fast communication between controllers placed at short distances, generally serial communication protocols such as SPI or I2C are used. In this master slave type communication, handshaking signals are used to enable the data transmission from slave to master. In case the transients occur, communication data can be corrupted leading to loss of data or can momentarily corrupt the handshaking line. In both the cases the communication is effected leading to loss of critical data.
[0070] In an aspect, the present disclosure provides a recovery mechanism for such conditions in which communication lines are observed and after the reception of proper data frame, counter for timeout is restarted. In case there is no frame received for a timeout due to the above-mentioned condition, the communication registers are refreshed. All the communication variables are re-initialized and communication is reinitiated. Thus, the recovery mechanisms provided above give reliable and cost effective solutions for the aforementioned problems.
[0071] FIG. 5 illustrates an exemplary flow diagram 500 for a self-recovery mechanism in an electronic controlled device in accordance with an embodiment of the present disclosure. Firstly, the power supply line to the display can be continuously observed. In case, it falls below a predetermined threshold, display driver 104 can be reset and initialization instructions to the driver 104 can be sent again. Whenever the display controller 106 needs to give data to the driver 104, it enables the communication bus and then checks for the health of the display by giving “Get Status” command. the driver 104 or else the driver 104 can be reset by software reset from the display controller If the display is found healthy, data to be displayed can be transmitted to 106. After sending data to the driver 104, the display controller 106 disables the communication bus to avoid latch up conditions. Also the data integrity of the data received by communication between main controller 102 and display controller 106 is continuously checked. In case of wrong data received for more than timeout time, communication registers are refreshed and communication variables are re-initialized to recover from the condition of communication failure.
[0072] With reference to FIG. 5, at step 502, power supply line to the display is observed, and at 504, it is determined is the supply voltage is less than a defined threshold. In case the supply voltage is less than a defined threshold, at step 506, the display driver is reset, else the method goes back to step 502.
[0073] In another aspect, at step 508, it is checked by the display controller is any data is to be displayed, which if found affirmative, the display driver is enabled at step 510, and status of the driver is retrieved by the display controller at step 512. If not affirmative, it is continuously check if there is any data to be displayed. At step 514, the display status can be read by the display controller such that at step 516, it is determined by the display status is healthy. In case the status is healthy, data is sent to the display for presentation at step 518 and then the driver is disabled at 520 to take the method back to step 508, else at 506, the display driver is reset.
[0074] In yet another aspect, at step 522, it is determined at the display controller if any data frame from the main controller is received such that if no valid data is received it is checked at step 524 if the time has elapsed, which if affirmative, enables the display controller to refresh communication registers, initialize communication variables, and restart communication at step 526. If not affirmative, at 524, the method goes back to step 522. If at step 522, it is determined at the display controller has received a valid data frame, at step 528, the display controller processes and execute/configure the display driver based on the received data frame.
[0075] In an aspect, the present disclosure provides a self-recovery mechanism in an electronic controlled device, which employs both hardware and firmware designs. This configuration can be used for compact LCD modules where the number of I/O lines of the display driver is less. The proposed configuration also disables communication bus interface in idle mode to avoid latch up condition, and refreshes communication registers in case of communication failure detection. Furthermore, status of the device driver can be read, and initialization sequence on failure detection can be performed.
[0076] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.

ADVANTAGES OF THE INVENTION
[0077] The present disclosure provides an efficient self-recovery mechanism in an electronic controlled device that employs both hardware and firmware designs.
[0078] The present disclosure provides a self-recovery mechanism that can be used for compact LCD modules where the number of I/O lines of the display driver is less.
[0079] The present disclosure provides a self-recovery mechanism that provides reliable solution.
[0080] The present disclosure provides a self-recovery mechanism that provides robust, compact, and cost effective solution.

Documents

Application Documents

# Name Date
1 1134-MUM-2015-RELEVANT DOCUMENTS [27-09-2023(online)].pdf 2023-09-27
1 Form_5.pdf 2018-08-11
2 Form_3.pdf 2018-08-11
2 1134-MUM-2015-RELEVANT DOCUMENTS [30-09-2022(online)].pdf 2022-09-30
3 Drawings.pdf 2018-08-11
3 1134-MUM-2015-RELEVANT DOCUMENTS [24-09-2021(online)].pdf 2021-09-24
4 Complete Spec Form 2.pdf 2018-08-11
4 1134-MUM-2015-ASSIGNMENT WITH VERIFIED COPY [25-01-2021(online)].pdf 2021-01-25
5 1134-MUM-2015-Power of Attorney-300615.pdf 2018-08-11
5 1134-MUM-2015-FORM-16 [25-01-2021(online)].pdf 2021-01-25
6 1134-MUM-2015-POWER OF AUTHORITY [25-01-2021(online)].pdf 2021-01-25
6 1134-MUM-2015-Form 1-300615.pdf 2018-08-11
7 1134-MUM-2015-IntimationOfGrant19-10-2020.pdf 2020-10-19
7 1134-MUM-2015-Correspondence-300615.pdf 2018-08-11
8 1134-MUM-2015-PatentCertificate19-10-2020.pdf 2020-10-19
8 1134-MUM-2015-FER.pdf 2018-10-25
9 1134-MUM-2015-FER_SER_REPLY [26-02-2019(online)].pdf 2019-02-26
9 1134-MUM-2015-ABSTRACT [26-02-2019(online)].pdf 2019-02-26
10 1134-MUM-2015-CLAIMS [26-02-2019(online)].pdf 2019-02-26
10 1134-MUM-2015-DRAWING [26-02-2019(online)].pdf 2019-02-26
11 1134-MUM-2015-COMPLETE SPECIFICATION [26-02-2019(online)].pdf 2019-02-26
11 1134-MUM-2015-CORRESPONDENCE [26-02-2019(online)].pdf 2019-02-26
12 1134-MUM-2015-COMPLETE SPECIFICATION [26-02-2019(online)].pdf 2019-02-26
12 1134-MUM-2015-CORRESPONDENCE [26-02-2019(online)].pdf 2019-02-26
13 1134-MUM-2015-CLAIMS [26-02-2019(online)].pdf 2019-02-26
13 1134-MUM-2015-DRAWING [26-02-2019(online)].pdf 2019-02-26
14 1134-MUM-2015-ABSTRACT [26-02-2019(online)].pdf 2019-02-26
14 1134-MUM-2015-FER_SER_REPLY [26-02-2019(online)].pdf 2019-02-26
15 1134-MUM-2015-FER.pdf 2018-10-25
15 1134-MUM-2015-PatentCertificate19-10-2020.pdf 2020-10-19
16 1134-MUM-2015-Correspondence-300615.pdf 2018-08-11
16 1134-MUM-2015-IntimationOfGrant19-10-2020.pdf 2020-10-19
17 1134-MUM-2015-Form 1-300615.pdf 2018-08-11
17 1134-MUM-2015-POWER OF AUTHORITY [25-01-2021(online)].pdf 2021-01-25
18 1134-MUM-2015-FORM-16 [25-01-2021(online)].pdf 2021-01-25
18 1134-MUM-2015-Power of Attorney-300615.pdf 2018-08-11
19 Complete Spec Form 2.pdf 2018-08-11
19 1134-MUM-2015-ASSIGNMENT WITH VERIFIED COPY [25-01-2021(online)].pdf 2021-01-25
20 Drawings.pdf 2018-08-11
20 1134-MUM-2015-RELEVANT DOCUMENTS [24-09-2021(online)].pdf 2021-09-24
21 Form_3.pdf 2018-08-11
21 1134-MUM-2015-RELEVANT DOCUMENTS [30-09-2022(online)].pdf 2022-09-30
22 Form_5.pdf 2018-08-11
22 1134-MUM-2015-RELEVANT DOCUMENTS [27-09-2023(online)].pdf 2023-09-27

Search Strategy

1 SearchPattern1134MUM2015_17-10-2018.pdf

ERegister / Renewals

3rd: 13 Jan 2021

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4th: 13 Jan 2021

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5th: 13 Jan 2021

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6th: 13 Jan 2021

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