CROSS REFERENCE TO RELATED APPLICATIONS
[0001] The present application is a divisional application of the Indian Provisional Patent Application titled, "AN SFP MSA COMPLIANT MODULE" with serial number 1659/CHE/2014, filed on March 28, 2014.
A) TECHNICAL FIELD
[0002] The present disclosure relates to the field of Small Form Factor Pluggable Transceivers. Particularly, the present disclosure relates to a Small Form Factor Pluggable Transceiver having IEEE 1588v2 support.
B) BACKGROUND
[0003] Telecommunication networks nowadays are subject to tremendous loads in terms of data/information transfer from a source to a destination. In addition to carrying excessive amount of data packets, the network elements of a telecommunication network should also incorporate IEEE 1588v2 clock support for improving the accuracy of the recovered synchronization references at the PTP slave network elements. New networks are being set up and the existing networks are being expanded to handle the growing data transfer rates. As new networks get laid, there is a need for more and more PTP Grandmasters in the network to cater to the PTP synchronization requirements of the expanding network. Using stand-alone PTP Grandmasters is way too expensive. One low cost alternative is to use network elements capable of PTP-Master functionality.

[0004] The only possible way to provide 1588v2-Master support in the telecommunication network is by replacing the existing network elements with the new network elements, which incorporate the 1588v2 Clock support. However, discarding the non-complaint network elements and replacing them with network elements complaint with IEEE 1588v2 would be a costly procedure. However, since a telecommunication network typically comprises several hundreds of network elements, and replacing several hundreds of network elements is not only ineffective in terms of the cost, but also renders the telecommunication network ineffective, thereby resulting in prolonged network downtime.
[0005] Furthermore, the present day telecommunication networks require PTP Grandmasters with GPS receivers for packet based synchronization. However, PTP grandmasters with GPS receivers are expensive, and addition of PTP grandmaster(s) or the replacement of network elements with 1588v2 compatible network elements would bring about a shutdown of the telecommunication network.
[0006] Therefore, there was felt a need for a Small Form Factor Pluggable Transceiver (SFP) complaint module having inherent 1588v2 master clock support which would obviate the hitherto mentioned drawbacks.
[0007] The above mentioned shortcomings, disadvantages and problems are addressed herein and which will be understood by reading and studying the following specification.

C) OBJECTS
[0008] The primary object of the present invention is to provide a SFP compatible module.
[0009] Another object of the present invention is to provide a 1588v2 compatible SFP based module.
[0010] Another object of the present invention is to provide an SFP compatible module which can be plugged onto an SFP port of a network element, thereby rendering the network element, PTP Master compatible.
[0011] Yet another object of the present invention is to provide an SFP compatible module which obviates the need for replacing network elements that are not compatible with PTP-Master functionality.
[0012] One more object of the present disclosure is to provide an SFP compatible module which can be plugged onto an SFP port of a network element.
[0013] Yet another object of the present disclosure is to provide an SFP compatible module that provides for seamless transformation of a telecommunication network into being PTP-Master compatible.
[0014] Yet another object of the present disclosure is to provide an SFP compatible module which is cost effective.

[0015] These and other objects and advantages of the present invention will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings.
D) SUMMARY
[0016] The various embodiments of the present invention envisage SFP PTP module. The module comprises a Digital Phased Lock Loop (DPLL) module cooperating with at least one GPS receiver. The DPLL module is configured to receive synchronized information corresponding to at least frequency, phase and time of the day, from the GPS receiver. The PTP module further comprises an OC-M module cooperating with the DPLL module. The OC-M module is configured to receive the synchronized information from the DPLL module, and synchronize at least the downstream nodes. The SFP PTP module comprises SFP form factor and is configured to be coupled to an SFP slot of a network element. The module is further configured to be integrated with a network element. The SFP PTP module further renders the network element compatible with a PTP grandmaster.
[0017] According to an embodiment of the present invention, the SFP PTP module is configured to be controlled by an I2C interface.
[0018] According to an embodiment of the present invention, the SFP PTP module is configured to transform a network element into being compatible with the PTP grandmaster, subsequent to electronically coupling the SFP PTP module into the network element.

[0019] According to an embodiment of the present invention, the SFP PTP module is configured to be connected to the fabric of the network element via an SFP SERDES interface. The SFP PTP module draws an electric power via the SFP port located on the network element.
[0020] The various embodiments of the present invention is to provide a method for rendering a network element compatible with a PTP grandmaster, said method comprising the following steps:
creating a PTP SFP module having at least one DPLL module and an OC-M module; and
configuring said network element to be compatible with a PTP grandmaster, by electronically coupling the SFP module into the network element.
[0021] According to an embodiment of the present invention, the step of creating an SFP PTP module having at least one DPLL module and an OC-M module, includes the step of creating a DPLL module configured to retrieve the information corresponding to at least frequency, phase and time-of-day.
[0022] According to an embodiment of the present invention, the step of creating an SFP PTP module having at least one DPLL module and an OC-M module, includes the step of creating an OC-M module configured to receive the information retrieved by the DPLL module, and subsequently synchronize the nodes located downstream of the network element.

[0023] These and other aspects of the embodiments herein will be better appreciated and understood when considered in conjunction with the following description and the accompanying drawings. It should be understood, however, that the following descriptions, while indicating the preferred embodiments and numerous specific details thereof, are given by way of illustration and not of limitation. Many changes and modifications may be made within the scope of the embodiments herein without departing from the spirit thereof, and the embodiments herein include all such modifications.
E) BRIEF DESCRIPTION OF THE DRAWINGS
[0024] The other objects, features and advantages will occur to those skilled in the art from the following description of the preferred embodiment and the accompanying drawings in which:
[0025] FIG. 1 is a system level block diagram illustrating a packet network in a wireless backhaul scenario, in accordance with one embodiment of the present disclosure.
[0026] FIG.2 is a system level block diagram of the SFA MSA compliant module with PTP master clock synchronization functionality, in accordance with one embodiment of the present disclosure.
[0027] Although the specific features of the present invention are shown in some drawings and not in others, this is done only for convenience as each feature may be combined with any or all of the other features in accordance with the present invention.

F) DETAILED DESCRIPTION
[0028] In the following detailed description, reference is made to the accompanying drawings that form a part hereof, and in which the specific embodiments that may be practiced is shown by way of illustration. These embodiments are described in sufficient detail to enable those skilled in the art to practice the embodiments and it is to be understood that the logical, mechanical and other changes may be made without departing from the scope of the embodiments. The following detailed description is therefore not to be taken in a limiting sense.
[0029] The various embodiments of the present invention provide a Small Form factor Pluggable (SFP) Multi-Source Agreement (MSA) compliant module which is capable of rendering a network element compatible with IEEE 1588v2 protocol for master clock synchronization. Throughout the specification, the terms Precision Time Protocol (PTP) and IEEE 1588v2 are used interchangeably. The SFP MSA compliant module enhances an accuracy at a plurality of PTP network elements by providing a recovered synchronization reference for frequency, phase and time of day (TOD). The SFP MSA compatible module comprises SFP form factor, and is configured to be plugged onto an SFP slot/port via an SFP connector.
[0030] FIG. 1 is a system level block diagram illustrating a packet network in a wireless backhaul scenario, in accordance with one embodiment of the present disclosure. With respect to FIG. 1, the packet network comprises a plurality of Base Transceiver Stations (BTS) 102a-102c which facilitate a wireless

communication between a user equipment (UE) and the network. The BTS 102a-102c is a wireless equipment used in a telecommunication network which is any one of the following namely GSM, CDMA, WLL and the like networks. The network further comprises a Base Station controller (BSC) 101 which controls one or more BTS 102a-102c via a base station control function (BCF). The BSC 101 comprises a Global Positioning System (GPS)-receiver 103 is a source for producing a packet synchronization reference for frequency, phase and time of day (TOD). The synchronization reference is used for synchronizing the plurality of BTSs 102 connected to the controller. A network element (NE) 104 located at the BSC 101 is configured to aggregate a traffic received from the plurality of BTS 102a-102c and transfer the traffic to the core network. The NE 104 is not integrated with PTP functionality. The PTP-Master functionality is enabled in the NE 104 by plugging the SFP MSA compatible module 105 into the SFP slot/port of the NE 104. The synchronization references for frequency, phase and time of day (TOD) received from the GPS receiver 103 is recovered by the SFP MSA compatible module 105 of the NE 104. The NE 104 with the PTP-master functionality periodically communicates the synchronization reference for frequency, phase and time of day (TOD) in form of a plurality of PTP packets. The PTP packets pertaining to the synchronization references are further used by the SFP MSA compatible module 105 to synchronize the plurality of downstream NEs 104. A terminal NE 106 located at each of the BTS 102a-102c connecting to the BSC 101 is capable of recovering the packet synchronization references from the PTP packets by using an inbuilt PTP

functionality. The NE 104 with the PTP functionality is configured to maintain a PTP session with each of the NEs at the BTS locations. The terminal NE 106 is able to provide a higher accuracy synchronization reference to the BTS 102a as the NE 104 connecting the BSC 101 to the BTS 102a is PTP-Master clock synchronized.
[0031] FIG. 2 is a system level block diagram of the SFA MSA compliant module 105 with PTP-Master clock synchronization functionality, in accordance with one embodiment of the present disclosure. The SFA MSA compliant module 105 possess a small form factor and plugs into the SPF slot/port of the NE(s) using a SPF cage and a SPF connector. The SFP MSA compatible module 105 of the NE(s) receives the synchronization references from the GPS receiver 103. The SFP MSA module 105 is connected to the NE(s) through the switching fabric. The module 105 connects to a switch fabric of the NE(s) through a SFP SERDES interface 207. The SERDES interface 207 communicates traffic of PTP packets between the switching fabric and the SFP module 105. The module 105 operates on 3.3 volts which is supplied by a power source 206 to the SFP port through the SFP connector. A system controller of the NE(s) is configured to control the SFP MSA compatible module 105 through an I2C interface 208. The plurality of PTP packets that ingress and egress the SFP MSA compliant module 105 are time stamped at an Ethernet Physical layer 205 of the module 105. The SFP MSA compliant module 105 comprises an oscillator source (OSC) 201, preferably Stratum 3E, which provides a stable clock to a Digitally Phase Locked Loop (DPLL) 202. The clock becomes very important in terms of

frequency and phase accuracy whenever the GPS receiver 103 fails. The DPLL 202 controls the frequency and phase of the clock generated by the oscillator source 201 to accordingly synchronize the clock with the GPS frequency and phase reference. The synchronization references obtained from the GPS receiver 103 terminate at a host interface 209 of the SFP MSA module 105. The host interface 209 comprises an OC-M module 204 configured to retrieve information corresponding to frequency, phase and time-of-day from the synchronization references.. The DPLL 202 locks to the GPS inputs and generates a higher frequency clock and phase (1PPS) needed to keep the TOD counter in the host running and in Sync. The host interface 209 originates a PTP session towards the downstream NE(s), wherein the NE(s) act as a PTP-grandmaster. The host interface 209 comprises a TOD clock device 203 which is configured to upgrade the TOD of the NE using the TOD reference clock from the GPS receiver 103. The clock's 'seconds' roll off is aligned to a pulse per second (1PPS) generated from the DPLL. The host periodically checks whether the internally running TOD clock device 203 is in synchronization with the TOD reference provided by the external GPS receiver 103. The necessary correction is done in an event of asynchronous output produced by the TOD clock device 203. The host interface 209 with OC-M module 204 plays the role of PTP Grandmaster towards the downstream nodes by originating and maintaining the PTP session with the downstream nodes. The host interface 209 uses the TOD clock as the time reference to run the PTP session.

[0032] In accordance with the present disclosure, the SFP module is defined to have the integrated PTP functionality. SFP is one of the many hot pluggable modules (SFP, XFP, XENPAK, X2, QSFP, CFP and the like) that can get plugged into a network element's ports depending on the supported port type. The reference to the SFP module in the present disclosure is more out of convenience and is not restricted to it. The present disclosure is extended to any hot pluggable electrical or optical module which may come in any form factor, including but not limited to formats such as XFP (1.0 Gigabit Small Form Factor Pluggable), XENPAK, X2, QSFP, and CFP.
F) TECHNICAL ADVANTAGES
[0033] The technical advantages envisaged by the present disclosure include the realization of an SFP compatible PTP module. The present disclosure provides a 1588v2 compatible PTP module. The PTP module envisaged by the present disclosure can be plugged onto an SFP port of a network element, thereby rendering the network element, SFP compatible. The PTP module of the present disclosure obviates the need for replacing network elements that are not compatible with SFP. The PTP module envisaged by the present disclosure can be plugged onto an SFP port of a network element. The PTP module provides for seamless transformation of a telecommunication network into being SFP compatible. The SFP compatible module of the present disclosure can be plugged onto an SFP port of a network element, thereby seamlessly making the network element compatible with IEEE 1588v2 protocol for master clock functionality. The present disclosure envisages an SFP compatible module

which is cost effective. The SFP based module of the present disclosure can be seamlessly integrated into an existing telecommunication network, without requiring the telecommunication network to be shut down.

We Claim:
1. An SFP PTP module (105) comprising:
a Digital Phased Lock Loop (DPLL) (202) module cooperating with at least one GPS receiver (103), said DPLL module (202) configured to receive synchronized information corresponding to at least frequency, phase and time of the day, from the GPS receiver (103);
an OC-M module (204) cooperating with the DPLL module (202), said OC-M (204) module configured to received the synchronized information from the DPLL module (202), and synchronize at least the downstream nodes;
Wherein said SFP PTP module (105) comprises SFP form factor and is configured to be coupled to an SFP slot of a network element (104), said SFP PTP module (105) further configured to be integrated with said network element (104), said SFP PTP module further configured to render said network element (104) compatible with a PTP grandmaster.
2. The SFP PTP module (105) as claimed in claim 1, wherein said SFP PTP module (105) is configured to be controlled by an I2C interface (208).
3. The SFP PTP module (105) as claimed in claim 1, wherein said SFP PTP module (105) is configured to transform a network element (104) into being compatible with the PTP grandmaster, subsequent to electronically coupling the SFP PTP module (105) with the network element (104).

4. The SFP PTP module (105) as claimed in claim 1, wherein said SFP PTP module (105) is configured to be connected to fabric of the network element (104) via an SFP SERDES interface (207), the SFP PTP module (105) further configured to draw electric power via the SFP port located on the network element (104).
5. A method for rendering a network element compatible with a PTP grandmaster, said method comprising the following steps:
creating a SFP PTP module (105) having at least one DPLL module (202) and an OC-M module (204); and
configuring said network element (104) to be compatible with a PTP grandmaster, by electronically coupling the SFP PTP module (105) into the network element (104).
6. The method as claimed in claim 5, wherein the step of creating an SFP
PTP module (105) having at least one DPLL module (202) and an OC-M
module (204), includes the step of configuring the DPLL module (202)
to retrieve the information corresponding to at least frequency, phase and
time-of-day.

7. The method as claimed in claim 5, wherein the step of creating an SFP PTP module (105) having at least one DPLL module (202) and an OC-M module (204), includes the step of configuring the OC-M module (204) to receive the information retrieved by the DPLL module (202), and subsequently synchronize the nodes located downstream of the network grandmaster.