Claims:1. A skyrmion based 3-input majority logic gate, comprising:
a bilayer of heavy metal(101)/ferromagnetic metal(102), wherein the inputs are located in the magnetic layer;
a first input element in which the skyrmion is nucleated using magnetic tunnel junction (MTJ) (108) in a slanted upper rectangle (103), wherein the skyrmion generated represents the first logical input (104);
a second input element in the left upper portion of a lower rectangle (102) in which skyrmion is nucleated and represented as the second logical input (105);
a third input element in the left bottom portion of lower rectangle (102), wherein the skyrmion generated considered as third logical input (106);
an output element in which the skyrmion is detected using MTJ (108) in the right branch of the lower rectangle (102);
Two rectangular notches (111 and 112) are placed in the left and right sides of the lower rectangular part (102) to control the motion of skyrmion;
a current controlled non magnetic metallic gate (109) is implemented at the lower rectangle (102), wherein an Oersted field (110) is generated and controls the motion of the skyrmion in the nanostructure;
The logic information are carried by skyrmion, wherein the change in average magnetization depends upon the presence and absence of the skyrmion and represents as binary “1” and “0”;
The first logical input (104) in the majority logic architecture is inclined at an angle (θ) to the second logical input (105), and the second and third logical inputs are parallel to each other; and
The output of 3-input majority gate is determined by the majority of inputs in the device architecture.
2. The skyrmion based 3-input majority logic as claimed in claim 1, wherein the current controlled metallic gate (109) that locally generates the Oersted field (110) in the out-of-Plane (OOP) direction by flowing the current and depending on the interplay between driving current and Oersted field, the skyrmion moves towards the output (107) (stops, passes or deforms).
3. The skyrmion based 3-input majority logic as claimed in claim 1, wherein the metallic gate (109) is introduced at the middle portion of the lower rectangular part (102) in the nanostructure.
4. The skyrmion based 3-input majority logic as claimed in claim 1, wherein the inclination angle (θ) between upper slanted rectangle (103) and lower rectangular (102) parts is in the range of 30˚ to 60˚ for implementation of majority logic.
5. The skyrmion based 3-input majority logic as claimed in claim 1, wherein the width of the upper slanted rectangular (103) part (d) is in the range of 40 nm to 100 nm, the width of the lower rectangular (102) part where input B (105) is located is in the range of 30 nm to 200 nm and the width of the lower rectangular part where input C (106) is located is in the range of 70 nm to 200 nm for reliable operation.
6. The skyrmion based 3-input majority logic as claimed in claim 1, wherein the two notches with dimensions 90 × 4 nm2 (m × n) in the left side (111) and 160 × 4 nm2 (p × q) in the right side (112) of the 102 section are located to control the skyrmion motion.
7. The skyrmion based 3-input majority logic as claimed in claim 1, wherein the materials with non-centrosymmetric and high spin-orbit coupling that possess DMI, and perpendicular magnetic anisotropy host the skyrmion.
8. The skyrmion based 3-input majority logic as claimed in claim 1, wherein the skyrmion can be driven by spin orbit torque and spin-transfer torque phenomena in the device architecture.
9. The skyrmion based 3-input majority logic as claimed in claim 1, wherein depending on the interplay between anisotropy energy and driving current, a voltage-controlled magnetic anisotropy gate can be used to control the path of the skyrmion.
, Description:[0001] The present disclosure is related to the computing based on spintronics in which the magnetization direction of an entity is in general represented as binary bits “1” and “0”. In this invention, a swirling spin texture known as skyrmion is used to carry the binary information representing “1” and “0”, where the presence and absence of the skyrmion affect the average magnetization in the majority logic device.

BACKGROUND OF THE INVENTION

[0002] Owing to the nanoscale size, low driving current density and high speed, magnetic skyrmion acts as a potential candidate for the realization of logic devices, high-density spintronic-based information storage and neuromorphic computing. Magnetic skyrmions are whirling spin structures induced by Dzyaloshinskii-Moriya interaction (DMI) and manifest particle-like behaviour.
[0003] These spin configurations can be found in B20-type bulk materials, magnetic materials with non-centrosymmetric lattice or ultra-thin magnetic films in which inversion symmetry is broken due to the presence of dissimilar interfaces. The spin texture of skyrmion results from the interplay among exchange interaction, demagnetization, anisotropy and DMI energies in the system. Magnetic skyrmions are topologically protected, i.e., the magnetization of non-trivial spin structure cannot be continuously transformed into a uniform magnetic state.
[0004] In the spintronic devices, the information is encrypted in the magnetization orientation which offers non-volatility, low power consumption and negligible heat dissipation. R.P. cowburn and Welland (Science 287, 1466, 2000) have demonstrated the logic operations using a network of interacting sub-micrometer magnetic dots and the information is transmitted due to magnetostatic interaction between them at room temperature. There are several attempts to achieve 2-input logic gates, however the demonstration of logic gates beyond 2-input are elusive. One such circuit is the majority gate and the concatenation of majority gates has potential implications in complex circuits such as adders and multiplexers. The majority gate results in an output ‘1’ if more than 50% of inputs are ‘1’s and results in ‘0’ otherwise. A. Imre et al., (Science 311, 205, 2006) demonstrated the majority logic functionality based on magnetic nanostructures where the information is propagated among nanomagnets via dipolar coupling.
[0005] Another way of manipulating the spin direction in the device architecture is with spin currents. In the recent past, the majority gate logic devices are demonstrated based on the spin transfer torque (STT) induced domain wall (DW) motion. However, DW requires relatively high current densities leading to joule heating. To overcome this limitation, one can employ spin-orbit torque (SOT) (injection of pure spin current), which is more effective than STT based logic due to low power consumption and less heat dissipation. Magnetic skyrmions with topological stability driven by SOT can potentially overcome the limitations known for domain wall-based devices in terms of energy, current density and speed. Most of the skyrmion based logic functionalities are demonstrated with 2-inputs as a virtue of SOT induced skyrmion motion, edge repulsions, skyrmion-skyrmion topological repulsions and skyrmion Hall effect. However, a majority logic solely based on skyrmions has not been explored so far.
[0006] In this present work, we have demonstrated a device architecture comprising a skyrmion-based 3-input majority gate via micromagnetic simulations which is a powerful and widely used technique for the proof-of-concept demonstration prior to expensive fabrication of the device. The spin current drives the skyrmion in the device and its trajectory is manipulated by an Oersted field generated by a current-controlled non-magnetic metallic gate. The majority logic functionality in our device is achieved by the combined effects of SOT induced skyrmion motion, multiple skyrmion interactions and edge repulsions from the boundaries of the nanostructure. We have shown the trajectory of the 3-input skyrmion in the device and estimated the size of the skyrmion and skyrmion Hall angle to explain the underlying physics involved to control the motion of the skyrmion in the device.
SUMMARY OF THE INVENTION
[0007] In accordance with the first aspect of the present invention, we have demonstrated the skyrmion based 3-input majority logic gate using the current controlled metallic gate. The gate generates an Oersted field to control the skyrmion motion. The majority logic device consists of heavy metal (HM)/ferromagnetic metal (FM) heterostructure to utilize SOT for driving skyrmion by applying charge current in the HM layer. Our proposal based on the results from micromagnetic simulations can be implemented by using magnetic tunnel junctions at input/output terminal and the information is encoded depending on the presence or absence of the skyrmion at the output.
[0008] In accordance with the second aspect of the present invention, the skyrmions at the inputs of the logic device are transported to the output terminal using a specific combination of driving current, gate current and material properties. The logic functions are implemented under several effects: SOT induced skyrmion motion, skyrmion-skyrmion topological repulsion, skyrmion-edge repulsion, skyrmion Hall effect and the Oersted field. The interplay among all these forces leads to the successful realization of the majority gate.
[0009] In accordance with the third aspect of the present invention, skyrmions are injected at the three inputs of the logic device and transmission to the output terminal is engineered using a combination of specific geometries and material properties. We have demonstrated the robustness of the logic device over a large window of these parameters.
[0010] In accordance with the fourth aspect of the present invention, the stability of the skyrmion in the device is confirmed by investigating the skyrmion Hall angle at a large time scale in the majority logic device. This proof-of-concept will be helpful in developing low-power and high-speed skyrmion based computing architectures.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] The invention will be well understood with the detailed description, by way of non-limiting examples only and the description being with reference to the accompanying illustrative drawings.
[0012] FIG. 1 is a schematic illustration of skyrmion based majority logic device architecture, comprising of three inputs, one output terminal and a current-controlled metallic gate to control the motion of skyrmion.
[0013] FIG. 2 shows the simulated Oersted field generated beneath the metallic gate by passing a DC current using COMSOL software.
[0014] FIG. 3 (a-c) show the initial and final magnetic states of one skyrmion driven with j = 1.5× 1010 A/m2 in FM film for the logic operations “100”, “010” and “001”, respectively with a gate field of 100 Oe.
[0015] FIG. 3 (d-f) depict the initial and final magnetic states of two skyrmions driven with j = 1.5× 1010 A/m2 in FM film for the logic operations “110”, “101” and “011”, respectively with a gate field (HG) of 100 Oe.
[0016] FIG. 3 (g) shows the initial and final magnetic states of three skyrmions driven with j = 1.5× 1010 A/m2 in FM film for the logic operation “111”, with a HG of 100 Oe in the logic device.
[0017] FIG. 4 (a) shows the temporal snapshot of magnetic states of one skyrmion motion with j = 1.5× 1010 A/m2 and HG of 100 Oe in the FM film for “100” operation in the logic device.
[0018] FIG. 4 (b) shows the temporal snapshot of magnetic states of two skyrmions motion with j = 1.5× 1010 A/m2 and HG of 100 Oe in the FM film for “110” operation in the logic device.
[0019] FIG. 4 (c) shows the temporal snapshot of magnetic states of three skyrmions motion with j = 1.5× 1010 A/m2 and HG of 100 Oe in the FM film for “111” operation in the logic device.
[0020] FIG. 5 (a) shows the working window of the majority logic for the “101” operation as a function of HG generated beneath the gate and the driving current density (j). The phase diagram consists of three regions labelled as ‘works’, ‘fails’ and ‘deforms’.
[0021] FIG. 5 (b) shows the working window of the majority logic for the “011” operation as a function of HG generated beneath the gate and the driving current density (j).
[0022] FIG. 5 (c) shows the working window of the majority logic for the “110” operation as a function of HG generated beneath the gate and the driving current density (j).
[0023] FIG. 5 (d) shows the working window of the majority logic for the “111” operation as a function of HG generated beneath the gate and the driving current density (j).
[0024] FIG. 6 (a-c) show the size of the skyrmion versus relaxation time of the one skyrmion (100 operation), two skyrmion (“110” operation) and three skyrmion (“111” operation) in the nanodevice.
[0025] FIG. 7 (a-c) show the skyrmion Hall angle (ϕSkH) versus relaxation time for the implementation of “100”, “110” and “111” logic operations.
[0026] FIG. 8 (a-c) show the trajectory of the one skyrmion, two skyrmions and three skyrmions in the device for the implementation of “100”, “110” and “111” logic operations.
[0027] FIG. 9 shows the initial and final magnetic states of three skyrmions in the device structure by varying the dimensions of the nano-device, varied θ (angle between upper and lower rectangle) from 30˚ to 60˚ for “111” logic operation for constant d (width of the upper rectangle): 75 nm and b (width of the lower rectangle): 210 nm.
[0028] FIG. 10 shows the initial and final magnetization states of three skyrmions in the device by varying d (width of the upper rectangle): 40 nm to 100 nm, keeping b (width of the lower rectangle): 210 nm and θ (angle between upper and lower triangle): 45˚ fixed for the “111” logic operation.
[0029] FIG. 11 shows the initial and final magnetization states of three skyrmions in the device by varying e (width of a part of lower rectangle where input B is located): 30 nm to 200 nm, keeping d (width of the upper rectangle) = 75 nm and θ (angle between upper and lower triangle): 45˚ fixed for the “110” logic operation.
[0030] FIG. 12 shows the initial and final magnetization states of two and three in the device by varying f (width of a part of lower rectangle where input C is located): 70 nm to 200 nm, keeping d (width of the upper rectangle) = 75 nm and θ (angle between upper and lower triangle): 45˚ fixed for the “110”, “111” logic operations.
DETAILED DESCRIPTION
[0031] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings.
[0032] The schematic of the device to implement 3-input majority logic based on skyrmion is shown in FIG. 1. The device architecture (100) comprises a lower rectangular section (102) with length (a) of 450 nm and width (b) of 210 nm. A slanted rectangle section (103) of length (c) 180 nm and width (d) 75 nm is placed at an inclination (θ) of 〖45〗^° on the top of the 102. Two notches with dimensions 90 × 4 nm2 (m × n) in the left side (111) and 160 × 4 nm2 (p × q) in the right side (112) of the 102 section are created. The device architecture consists of a heavy metal (HM)/ferromagnet (FM) bilayer structure (101/102), where the 102 is on the top of the 101. As shown in FIG. 1, 104 is placed in the upper section whereas 105 and 106 are located at the top and bottom left of the 102, respectively. The 107 is placed on the top right side of the lower section to detect the skyrmion. Nucleation (input) and the detection (output) of the skyrmions can be realized in practical by employing magnetic tunnel junctions (MTJs) (108). Finally, 109 is used to generate 110 field in the out-of-plane (OOP) direction by driving DC current through it.
[0033] As indicated in FIG. 1, the width (w) and the length (L) of this gate are 20 nm and 230 nm respectively. The role of this 109 is to control the motion of skyrmion either by pinning or depinning it towards 107 position in the device depending on the interplay between the drive current density (j) and 110 field. Note that the drive current density refers to the charge current across the HM layer that induces SOT in the FM layer thereby driving the skyrmions. This unpolarized charge current injects spin current (+Z direction) in the FM layer via spin Hall effect (SHE). The spin current exerts SOT and it drives the skyrmions in the FM layer. On the other hand a DC current – henceforth gate current (IG) – is sent through 109 terminal and it generates 110 field – the amplitude and the direction of which is controlled by the magnitude and polarity of IG. Henceforth, we refer to this Oersted field as the gate field (HG). The 110 field generated beneath 109 is calculated by using COMSOL simulation tool and the results are shown in FIG. 2. The colour bar indicates the magnitude of Oersted field and is found to be around 50 Oe to 200 Oe for an IG of 170µA.
[0034] In this work, micromagnetic simulations are performed using MuMax3 – an open source GPU-accelerated program based on Landau–Lifshitz–Gilbert (LLG) equation solver. To host skyrmions, the thickness of the FM layer is chosen to be 0.8 nm. The magnetic structure is divided into small cuboidal cells of dimensions 2 × 2 × 0.8 nm3 in the simulation, which is sufficiently smaller than the skyrmion size and the exchange length. A Néel skyrmion is injected into the magnetic layer, exhibiting perpendicular magnetic anisotropy (PMA).
[0035] For the convention of our logic scheme, we have chosen the binary bits “1” and “0” as the presence and the absence of the skyrmions, respectively. In our majority logic device model, we have used the driving current density j of 1.5× 1010 A/m2 and HG of 100 Oe for reliable operations. The output of 3-input majority gate is determined by the majority of inputs and the Boolean logic is expressed as AB + BC + CA. In this process of logic operation, when there are no skyrmions relaxed in the inputs A, B and C, no skyrmions will be found at the 107 and the logic operation is interpreted as 0.0+0.0+0.0 = 0, shown in the table 1. This logic operation is represented by “000”. To implement the majority logic, we applied j of 1.5×1010 A/m2 and generated HG of 100 Oe. When one skyrmion is nucleated in any one of the inputs A, B and C and driven by the current, the skyrmion must disappear in 107 region. In these cases, the majority of inputs are “0” (no skyrmion), which means only one skyrmion is relaxed in one of the inputs and no skyrmion in two other inputs as shown in FIG. 3(a-c). The logic operations are interpreted as 1.0+0.0+0.1= 0.1+1.0+0.0 = 0.0+0.1+1.0 = 0 and are represented by “100”, “010” and “001” respectively. FIG. 3(d-f) show the magnetization states when each skyrmion is relaxed in any of the two inputs i.e., skyrmions are present in the majority of inputs and the applied current drives the skyrmion towards 107 terminal. This satisfies the majority logic 1.1+1.0+0.1 = 0.1+1.1+1.0 = 1.0+0.1+1.1 = 1 and these operations are represented as “110”, “011” and “101”, respectively. In the case of the 1.1+1.1+1.1 operation, one skyrmion is in each input and we observe only one skyrmion in 107 region as shown in FIG. 3(g). This logic operation is represented as “111”. The results mimic the majority gate truth table as shown in table 1.
[0036] Table 1. Truth table of skyrmion based 3-input majority logic gate. The presence and absence of skyrmion is represented as “1” and “0”, respectively.

Input A Input B Input C OP = AB+BC+CA
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1

[0037] To unravel the underlying phenomena, we have recorded the time evolution of the skyrmion motion and the results are shown for three different situations in FIG. 4. FIG. 4(a) shows magnetic configurations of one skyrmion relaxed in input 104 alone and no skyrmion results in 107 region (ABCY= “1000”). Here, HG = 100 Oe is used for the successful implementation of majority logic. At t = 1 ns, we have observed that the skyrmion is in 103 and moves towards 109 at t = 8 ns. The 110 field generated beneath 109 is dominated over the driving current around t = 14 ns. Thus, the skyrmion gets pinned near the 109 and it couldn’t reach 107 region thereby satisfying ABCY= “1000” logic state. FIG. 4(b) shows the magnetic configurations of skyrmions that are relaxed in the inputs 104 and 105 and one skyrmion results in 107 region (ABCY= “1101”). Around 8 ns, two skyrmions reach the metallic gate. However, after 14 ns, we have observed that one skyrmion coming from the 104 reaches 107 region and the other remains pinned near 109. The skyrmion-skyrmion topological interaction dominates over the magnetic force from 110 field. Due to the topological repulsions, the two skyrmions can’t collide and remain stable with a separation and hence satisfying ABCY= “1101” logic state.
[0038] The magnetic configurations of three skyrmion interaction in the device are shown in FIG. 4(c). Here, one skyrmion is relaxed in each input 104, 105 and 106 (ABCY= “1111”). It is clearly noticed that three skyrmions reach near 109 after 8 ns. At 14 ns, one skyrmion reaches 107 position and the other two skyrmions get pinned near 109 region. One skyrmion from 104 reaches 107 position because the three skyrmion topological interaction competes with 110 field generated from 109. Here, the interplay among the topology of three skyrmions in the device results in a repulsive force. The repulsions make the skyrmions to stay away from each other and remain stable and thus it satisfies ABCY= “1111” logic state.
[0039] We have conducted a systematic study to demonstrate the range of j and HG for the reliable operation of the majority gate. For this investigation, we have varied j from (0.2-4.0) ×1010 A/m2 and HG (110) from 50 – 300 Oe. The results are summarized in FIG. 5, when a skyrmion is relaxed in atleast two inputs i.e. ABC= “101”, “011”, “110” and “111”. The phase diagram consists of three regions labelled as ‘works’, ‘fails’ and ‘deforms’. One can see that there is a wide range of (j, HG) space available where the logic states ‘work’. For large driving current density, the topological stability of the skyrmion is suppressed and the skyrmion starts to deform into an elliptical structure in the device. Note that the deformation of skyrmion leads to failure of majority logic in the device architecture.
[0040] To explain the physics behind the motion of skyrmion in the nanodevice under the influence of driving current and its stability over time, we have estimated the skyrmion Hall angle(ϕ_SkH). The SOT induced in the FM layer by HM layer enables the skyrmion to travel along +x direction. However, the skyrmion deviates from the linear motion and makes an angle between the longitudinal and transverse velocities called ϕ_SkH. Here, we explain various forces that influence the trajectory of the skyrmion in the device.
[0041] The skyrmion in the nanostructure starts to deform when the driving current exceeds the repulsive edge force that arises from the boundaries of the device. The interplay among all the forces discussed above acts on the skyrmion and determine ϕ_SkH.To determine ϕ_SkH at different time scales for majority logic operations, we have estimated the size of the skyrmion which is an important factor to downscale the device and the results are shown in FIG. 6. The size of skyrmion of 104 is increased from 34 nm to 124 nm as it travels from 104 to 107 as shown in FIG. 6(a). In the case of 100 state, we observed that around 12 ns the size of the skyrmion remains same as the field generated (110) from the 109 holds the skyrmion. FIG. 6(b) shows the size variation of two skyrmions in the device at different time stamps. When the skyrmion moves in the device, it shrinks or expands depending on the influence of edge repulsions and skyrmion-skyrmion topological repulsion. However, in case of 110 state, 110 which is generated from 109, holds 105 skyrmion. Thus, the size of 105 skyrmion remains unchanged after 20 ns. FIG. 6(c) shows the size variation of skyrmions in “111” state at different time stamps in the device. The topological repulsions among three skyrmions and 110 field generated from 109, influence the skyrmion size.
[0042] We have observed ϕ_SkH = 19˚ for ABC= “100” state at 1 ns and then starts to decrease and remains a stable configuration after 10 ns as shown in FIG. 7(a). The 110 field generated from the gate suppresses all the other forces. Hence the metallic gate pins the skyrmion and stops it from reaching 107 terminal. FIG. 7(b) shows the variation of ϕ_SkH with respect to relaxation time when one skyrmion is injected in each 104 and 105 and are driven with SOT. We have observed that skyrmion at 104 has ϕ_SkH of 19˚ at 1 ns and skyrmion at 105 has ϕ_SkH of 12.7˚ at 1 ns. The skyrmion moving from 104 experiences the repulsive force from the other skyrmion from 105 and vice versa. Because of the competition between these two forces, ϕ_SkH of both skyrmions, show ups and downs behaviour up to 20 ns. At 20 ns the skyrmion of 104 reaches near 107 position and ϕ_SkH remains constant at 13˚. The ϕ_SkH of skyrmion of 105 remains 5.4˚ as it gets pinned near 109. Thus the ϕ_SkH is constant over time and this indicates the stability of skyrmion in the nanodevice. FIG. 7(c) shows ϕ_SkH of three skyrmions in the device structure as a function of relaxation time. Up to 40 ns, we have observed ups and downs behaviour in ϕ_SkH of three skyrmions in the nanostructure. The ϕ_SkH remains stable for a prolongated period. However, only skyrmion from 104 reaches 107 position and the other skyrmions are obstructed due to the topological repulsions among them.
[0043] For better understanding, we have shown the trajectory of the skyrmion for majority logic operations in FIG. 8. We have shown the path of the skyrmion in the case of “100”, “110” and “111” logic functionalities. We have observed that the path of the skyrmion is influenced by 110 and driving current density. The driving current allows the skyrmion to reach the output, whereas the 110 drags the skyrmion to get stable near the gate. In the case of “100” logic operation, skyrmion couldn’t reach 107 as shown in FIG. 8(a). But when we inject more than one skyrmion, the topological repulsions also contribute and allows only one skyrmion to reach 107 as shown in FIG. 8(b and c).
[0044] We have systematically analysed the robustness of the geometry for reliable majority logic functionalities in the nanodevice. We have varied the angle (θ) between of 103 and 102 from 30˚ to 60˚. FIG. 9 shows the initial and final magnetization states of three skyrmions in the device structures for “111” logic operation by varying θ and keeping d = 75 nm and lower rectangle (102) dimensions fixed. We have observed that in the range of 30˚ < θ < 60˚, it satisfies all-majority logic operations.
[0045] Similarly, we have varied the width (d) of 103 from 40 nm to 100 nm to investigate the reliability of the logic device. FIG. 10 shows the initial and final magnetization states of three skyrmions in the device structure for “111” logic operation by varying d and keeping θ = 45˚and width of lower rectangle (b) = 210 nm constant. Thus, all the majority logic operations work well in the range of 40 nm < d <100 nm.
[0046] Furthermore, we have also varied the width of a part of 102 where input B is located (e) from 30 nm to 200 nm, keeping d (width of the 103) = 75 nm and θ (angle between 103 and 102): 45˚ fixed. FIG. 11 shows the initial and final magnetization states of two skyrmions in the device structure for “110” logic operation. We have seen that, for a range of 30 nm < e < 200 nm, it satisfies all the logic operations for majority gate.
[0047] Similarly, we have examined by varying width of a part of 102 where input C is located (f ): 70 nm to 200 nm, keeping d (width of the 103) = 75 nm and θ (angle between 103 and 102): 45˚ fixed. FIG. 12 shows the initial and final magnetization states of two and three skyrmions in the device structure for “110” and “111” logic operations, respectively. We have observed that for f = 70 nm, “110” logic operation works but “111” logic operation fails. Thus, for the dimension of f = 70 nm, the majority logic operation fails. Similarly, for for f = 200 nm, “110” logic operation fails but “111” logic operation works and signifies failure of majority logic. However, for f = 100 nm and 150 nm, both the logic operations (110, 111) works well. Hence, all the possible logic operations in the majority logic gate work well in the range of 70 nm < f < 200 nm. Our device model is reliable for majority logic gate for a wide range of geometrical parameters.