Abstract: A solar battery according to the present embodiment has an electrode, which includes a metal and an adhesive material, formed in a conductive region including a polycrystalline semiconductor layer, and thus, the electrical characteristics of the solar battery may be improved and the manufacturing process thereof may be simplified. More specifically, the solar battery includes a semiconductor substrate, and the conductive region including the polycrystalline semiconductor layer is positioned on one surface of the semiconductor substrate.
[Technical Field]
[1] The present disclosure relates to a solar battery, a solar battery panel, and a method for
manufacturing the same, and more particularly, to a solar battery having an improved structure,
and a solar battery panel including the same, and a method for manufacturing the same.
[Background Art]
[2] A solar battery may be manufactured by forming various layers and electrodes
according to design. Depending on the design of various layers and electrodes, the
characteristics and productivity of the solar battery may vary. In particular, when the materials
of the electrode, the formation process, etc., are changed, the characteristics and productivity
of the solar battery may be greatly changed.
[3] For example, as disclosed in Korean Patent No. 1541422, when the electrode is formed
using plating, manufacturing cost is high, and it is difficult to precisely control the plating
process conditions, so problems such as poor plating and deterioration in contact properties
may occur. Since it is necessary to form a separate seed layer for plating, the manufacturing
process of the solar battery is very complicated.
[4] As another example, when the electrode is formed using a sputtering process, a
protective film (resist) is formed by a printing process after forming a sputtering electrode
including a metal film by the sputtering process, and a portion of a metal film is removed by a
wet etching process to form an electrode. As a result, damage to the solar battery may occur
due to the sputtering process, the etching process, etc., the process is complicated due to the
need to perform several steps, and the probability of occUlTence of defects in each process
-2-
mcreases. In addition, since a thickness of the sputtering electrode is thin, and thus, the
resistivity characteristics are not sufficient, an additional electrode layer is formed or a plurality
of metal layers are stacked, so there is a problem in that the manufacturing cost increases and
the manufacturing process is complicated
[Disclosure]
[Technical Problem]
[5] The present embodiment is intended to provide a solar battery capable of improving
productivity and reliability, a solar battery panel, and a method for manufacturing the same.
[6] More specifically, the present embodiment provides a solar battery capable of
improving electrical characteristics of the solar battery by improving an electrode structure of
the solar battery and simplifying a manufacturing process of the solar battery.
[7] In addition, the present embodiment provides a solar battery panel capable of
simplifying a structure and a manufacturing process while improving electrode and wiring
material attachment properties by improving a structure and process of attaching the electrode
and the wiring material of the solar battery, and a method for manufacturing the same.
[Technical Solution]
[8] According to the present embodiment, a solar battery has an electrode, which includes
a metal and an adhesive material, formed in a conductive region including a polycrystalline
semiconductor layer, and thus, the electrical characteristics of the solar battery may be improved
and the manufacturing process thereof may be simplified. More specifically, the solar battery
includes a semiconductor substrate, and the conductive region including the polycrystalline
semiconductor layer is positioned on one surface of the semiconductor substrate.
[9] More specifically, the metal included in the electrode may include a first metal that
reacts with a semiconductor material included in the polycrystalline semiconductor layer to
form a compound layer including a metal-semiconductor compound. The compound layer
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may be partially formed to correspond to a first region at a boundary between the electrode and
the conductive region, and the electrode may have excellent resistance and contact properties
by the compound layer.
[10] The metal and the adhesive material may be formed in contact with the poly crystalline
semiconductor layer in the second region excluding the first region at the boundary between
the electrode and the conductive region.
[11] For example, the first metal may include nickel, the semiconductor material may
include silicon, and the compound layer may include nickel silicide.
[12] In the present embodiment, an area of the first region may be smaller than that of the
second region.
[13] In the present embodiment, the metal of the electrode may further include a second
metal having a lower resistivity than the first metal to improve resistance characteristics. For
example, a part by weight of the first metal may be 15 orless based on totallOO parts by weight
of the metal in the electrode.
[14] In the present embodiment, since the electrode includes a single printed layer including
the metal and the adhesive material, it is possible to simplify the manufacturing process of the
solar battery. For example, a thickness of the electrode or the printed layer may be 10 !J.II1 or
more.
[15] For example, the solar battery further includes a back surface passivation film covering
the conductive region and having a contact hole, in which the electrode may be formed inside
the contact hole to be spaced apart from the back surface passivation film. Altematively, the
solar battery may further include a back surface passivation fihn positioned on the
polycrystalline semiconductor layer and on at least a portion of at least one of the first and
second electrodes.
[16] According to the present embodiment, the solar battery may have a back surface
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electrode structure. For example, the conductive region may include a first conductive region
and a second conductive region spaced apart from each other on the one surface of the
semiconductor substrate, the electrode may include a first electrode connected to the first
conductive region and a second electrode connected to the second conductive region, and at
least one of the first and second electrodes may include the metal and the adhesive material.
[17) According to the present embodiment, a solar battery panel includes the abovedescribed
solar battery, a wiring material electrically connected to the electrode of the abovedescribed
solar battery, and an adhesive layer positioned between the electrode and the wiring
material to electrically connect the electrode and the wiring material.
[18) Here, the adhesive layer is formed in contact with the electrode, and may be a lowtemperature
solder paste including a solder material including bismuth. A surface roughness
of the electrode may be greater than that of the adhesive layer. The electrode may protrude to
be rounded or convexed toward the wiring material, and a width of the adhesive layer may
gradually increase toward the wiring material while completely covering the rounded portion
of the electrode. A ratio of the thickness of the electrode to the thickness of the adhesive layer
may be 0.5 or more.
[19] According to the present embodiment, a method for manufacturing a solar battery
panel includes a step of manufacturing the above-described solar battery, a step of forming an
adhesive layer on an electrode of the above-described solar battery, and an adhesive heat
treatment step of applying heat and pressure to a wiring material positioned on the electrode
and the adhesive layer to adhere the wiring material to the electrode using the adhesive layer.
In this case, the electrode may include a printed layer formed by applying an electrode paste
including a metal and an adhesive material through a printing process and performing curing
heat treatment on the electrode paste.
(20) Here, the electrode may include a single printed layer formed by a one-time printing
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process, and the adhesive layer may be formed by applying a solder paste including a solder
material including bismuth on the single printed layer.
[21] For example, the adhesive layer may further include an additional adhesive material.
In this case, before the adhesive heat treatment step, a part by weight of the adhesive material
included in the electrode paste may be smaller than that of the additional adhesive material
included in the solder paste, and after the adhesive heat treatment step, a part by weight of the
adhesive material included in the electrode may be greater than that of the additional adhesive
material included in the adhesive layer. A temperature of the curing heat treatment step of the
electrode may be 500°C or lower, and a melting point of the adhesive layer may be lower than
a process temperature of the adhesive heat treatment step.
[Advantageous Effects]
[22] According to the present embodiment, an electrode including a printed layer using a
low-temperature electrode paste including a metal and an adhesive material is formed in a
conductive region including a polycrystalline semiconductor layer, so excellent adhesive
properties due to the adhesive material, excellent carrier mobility of a polycrystalline
semiconductor layer, and excellent resistance and adhesive properties due to a sufficient
thickness of an electrode may be obtained. Here, the metal is combined with a semiconductor
material of the polycrystalline semiconductor layer, and includes a first metal forming a
compound layer and a second metal having a relatively low resistance, so excellent resistance
and contact properties may be obtained by the compound layer formed by the first metal, and
resistance characteristics may be further improved by the low resistance of the second metal.
As a result, it is possible to improve the characteristics and efficiency of the solar battery.
[23] For example, the electrode includes a single printed layer to simplify the process of
forming the electrode, so the number of processes may be reduced and the defect rate may be
improved, thereby improving the productivity of the solar battery. By applying the low-
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temperature electrode paste to the polycrystalline semiconductor layer, it is possible to prevent
damage caused by heat that may occur in high-temperature processes. In addition, since a
wiring material may be attached by forming an adhesive layer made of low-temperature solder
paste on a single printed layer, it is possible to improve productivity of a solar battery panel.
As a result, it is possible to improve productivity and reliability of a solar battery and a solar
battery panel including the same.
[Description of Drawings]
[24] FIG. 1 is an exploded perspective view schematically illustrating a solar battery panel
according to an embodiment of the present disclosure.
[25] FIG. 2 is a partial cross-sectional view conceptually illustrating first and second solar
batteries included in the solar battery panel illustrated in FIG. 1 and a wiring unit connecting
these first and second solar batteries.
[26] FIG. 3 is a rear plan view schematically illustrating the first and second solar batteries,
an adhesive layer and an insulating member, and a wiring unit included in the solar battery
panel illustrated in FIG. 1.
[27] FIG. 4 is a cross-sectional view taken along line IV-IV of FIG. 3.
[28] FIG. 5 is a partial rear plan view illustrating a back surface of a solar battery included
in the solar battery panel illustrated in FIG. 1.
[29] FIG. 6 is a conceptual diagram illustrating metal particles used to form an electrode of
a solar battery included in a solar battery panel according to a modification of the present
disclosure, and an enlarged cross-sectional view illustrating an electrode formed using the metal
particles.
[30] FIGS. 7 A to 7G are cross-sectional views illustrating a solar battery and a method for
manufacturing a solar battery panel including the same according to an embodiment of the
present disclosure.
-7-
[31] FIG. 8 is a partial cross-sectional view illustrating a solar battery, an adhesive layer
and an insulating member, and a wiring material included in a solar battery panel according to
another embodiment of the present disclosure.
(32] FIGS. 9A to 9E are cross-sectional views illustrating a solar battery and a method for
manufacturing a solar battery panel including the same according to an embodiment of the
present disclosure.
[33] FIG. 10 is a graph of measuring reflectance according to a wavelength of light from a
back surface of a solar battery according to Example 1 and Comparative Example 1.
[Mode for Disclosure]
[34] Hereinafter, embodiments of the present disclosure will be described in detail with
reference to the accompanying drawings. However, it goes without saying that the present
disclosure is not limited to these embodiments and may be modified in various forms.
[35] In the drawings, in order to clearly and briefly describe the present disclosure, the
illustration of parts irrelevant to the description is omitted, and the same reference numerals are
used for the same or extremely similar parts throughout the specification. In addition, in the
drawings, a thickness, a width, etc., are enlarged or reduced in order to make the description
more clear, and the thickness, the width, etc., of the present disclosure are not limited to those
illustrated in the drawings.
[36] When a certain part "includes" another part throughout the specification, other parts
are not excluded unless otherwise stated, and other parts may be further included. In addition,
when parts such as a layer, a film, a region, or a plate is referred to as being "on" another part,
it may be "directly on" another part or may have another part present therebetween. In
addition, when a part of a layer, film, region, plate, etc., is "directly on" another part, it means
that no other part is positioned therebetween.
[37] Hereinafter, a solar battery, a solar battery panel, and a method for manufacturing the
-8-
same according to an embodiment of the present disclosure will be described in detail with
reference to the accompanying drawings. In the present specification, expressions such as
"first" and "second" are used to distinguish each other, and the present disclosure is not limited
thereto.
[38] FIG. 1 is an exploded perspective view schematically illustrating a solar battery panel
100 according to an embodiment of the present disclosure, and FIG. 2 is a partial cross-sectional
view conceptually illustrating first and second solar batteries 1 Oa and 1 Ob included in the solar
battery panellOO illustrated in FIG. 1, and a wiring unit 140 connecting these first and second
solar batteries. In this specification, for clarity of description, two solar batteries 10 adjacent
to each other are referred to as a first solar battery lOa and a second solar battery lOb.
[39] Referring to FIGS. 1 and 2, the solar battery panel 100 according to the present
embodiment includes a solar battery 10 and a wiring unit 140 electrically connected to the solar
battery 10, and may include an adhesive layer (reference numeral LSP in FIG. 4, hereinafter the
same) electrically connecting the solar battery 10 and the wiring unit 140 between the solar
battery 10 and the wiring unit 140 (more specifically, the electrodes (reference numerals 42 and
44 in FIG. 4, hereinafter the same) of the solar battery 10 and a wiring material 142). In
addition, the solar battery panel! 00 has a sealing materiall30 surrounding and sealing the solar
battery 10 and the wiring unit 140, a first cover member 110 positioned on one surface (e.g., a
front side) of the solar battery 10 on the sealing material130, and a second cover member 120
positioned on the other surface (e.g., a back surface) of the solar battery 10 on the sealing
materiall30.
[40] First, the solar battery 10 may include a semiconductor substrate (reference numeral
12 in FIG. 4, hereinafter the same) and first and second electrodes 42 and 44 positioned on one
surface (e.g., a back surface) of the semiconductor substrate 12. The solar battery 10 will be
described in detail later.
-9-
[41) In the present embodiment, the solar battery panel 100 includes a plurality of solar
batteries 10, and the plurality of solar batteries 10 may be electrically connected in series, in
parallel, or in series-parallel by the wiring unit 140.
[42) More specifically, at least a portion of the wiring unit 140 may include the wiring
material142 that overlaps with the first and second electrodes 42 and 44 of the solar battery 10
and is connected to the first and second electrodes 42 and 44. A connection structure or the
like of each solar battery 10 and the wiring material142 will be described in more detail later.
For example, the wiring unit 140 may further include a connection wiring 144 that is positioned
between the solar batteries 10 in a direction intersecting the wiring material 142 and is
connected to the wiring material142. The plurality of solar batteries 10 may be connected in
one direction (x-axis direction in the drawing) by the wiring material 142 and the connection
wiring 144 to form one column (i.e., a solar battery string). In addition, the wiring unit 140
may further include a bus bar wiring 146 that is positioned at both ends of the solar battery
string and is connected to another solar battery string or a junction box (not illustrated).
[43) The wiring material142, the connection wiring 144, and the bus bar wiring 146 may
each include a conductive material (e.g., a metal material). For example, the wiring material
142, the connection wiring 144, or the bus bar wiring 146 may include a conductive core
(reference numeral 1420 in FIG. 4, hereinafter the same) and a conductive coating layer
(reference numeral1422 in FIG. 4, hereinafter the same) that is positioned on a surface of the
conductive core 1420 and includes a solder rnate1ial. Here, the conductive core 1420 may
include any one of gold (Au), silver (Ag), copper (Cu), or aluminum (AI), and the conductive
coating layer 1422 or the solder material may be made of tin (Sn) or an alloy including the tin.
For example, the conductive core 1420 may include or be made of copper, and the conductive
coating layer 1422 may be made of an alloy (e.g., SnBiAg) including tin.
[44) However, the present disclosure is not limited thereto, and the material, shape,
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connection structure, or the like of the wiring materiall42, the connection wiring 144, or the
bus bar wiring 146 may be variously modified. For example, the solar battery string may be
formed by connecting adjacent solar batteries 10 only with the wiring material 142 without
separately including the connection wiring 144.
[45] The sealing material 130 may include a first sealing material 131 positioned on the
front surface of the solar battery 10 connected by the wiring unit 140 and a second sealing
material132 positioned on the back surface of the solar battery 10. The first sealing material
131 and the second sealing material 132 prevent moisture and oxygen from being introduced
and chemically combine elements of the solar battery panel! 00. The frrst and second sealing
materials 131 and 132 may be made of an insulating material having light transmittance and
adhesion. For example, an ethylene vinyl acetate copolymer resin (EVA), polyvinyl butyral,
a silicon resin, an ester-based resin, an olefm-based resin, etc., may be used as the frrst sealing
materiall31 and the second sealing material132. The second cover member 120, the second
sealing material132, the solar battery 10, the wiring unit 140, and the first sealingmaterial131,
and the frrst cover member 110 may be integrated by a lamination process using the first and
second sealing materials 131 and 132, etc., to constitute the solar battery panel! 00. Although
the drawings illustrates that the frrst sealing material 131 and the second sealing material 132
are positioned separately from each other, in reality, the frrst sealing materiall31 and the second
sealing material 132 may be integrated without a boundary by being integrated by the
lamination process.
[46] The first cover member 110 is positioned on the frrst encapsulant 131 to form the front
surface of the solar battery panellOO, and the second cover member 120 is positioned on the
second encapsulant 132 to form the back surface of the solar battery panellOO. Each of the
first cover member 110 and the second cover member 120 may be made of an insulating
material capable of protecting the solar battery 10 from external impact, moisture, ultraviolet
-11-
rays, and the like. In addition, the first cover member 110 is made of a light transmittance
material that may transmit light, and the second cover member 120 may be formed of a sheet
made of a light transmittance material, a non-light transmittance material, a reflective material,
or the like. For example, the first cover member 110 may be composed of a glass substrate or
the like, and the second cover member 120 may be composed of a film, a sheet, a glass substrate,
or the like. For example, the second cover member 120 has a Tedlar/PET!redlar (TPT) type,
or 1nay include poly vinylidene fluoride (PVDF) resin layer formed on at least one surface of a
base film (e.g., polyethylene terephthalate (PET)).
[47] However, the present disclosure is not limited thereto. Accordingly, the first and
second sealing materials 131 and 132, the first cover member 110, or the second cover member
120 may include various materials other than those described above and may have various
shapes. For example, the first cover member 110 or the second cover member 120 may have
various shapes (e.g., a substrate, a film, a sheet, etc.) or materials.
[48] .FIG. 3 is a rear plan view schematically illustrating first and second solar batteries lOa
and 1 Ob, an adhesive layer LSP and an insulating member IP, and the wiring unit 140 included
in the solar battery panellOO illustrated in FIG. 1. FIG. 4 is a cross-sectional view taken along
line N-N of FIG. 3. FIG. 5 is a partial back surface plan view illustrating the back surface of
the solar battery 10 included in the solar battery panellOO illustrated in FIG. 1. For clarity of
understanding, an enlarged circle of FIG. 5 mainly illustrates a compound layer 50 formed at
the boundary between the conductive regions 32 and 34 and the electrodes 42 and 44.
[49] First, after the solar battery 10 according to the present embodiment is described in
detail, the adhesive layer LSP and the insulating member IP connected to the solar battery 10,
and the wiring unit 140 will be described in detail.
[50] Referring to FIGS. 3 to 5, the solar battery 10 according to the present embodiment
includes a-semiconductor substrate 12, conductive regions 32 and 34 that are positioned on one
-12-
surface (e.g., a back surface) of the semiconductor 12 and includes a polycrystalline
semiconductor layer 30, and electrodes 42 and 44 that are connected to the conductive regions
32 and 34 and include a metal40a and an adhesive material40b.
[51] In the present embodiment, the conductive regions 32 and 34 may include a first
conductive region 32 and a second conductive region 32 spaced apart from each other on the
back surface of the semiconductor substrate 12, and the electrodes 42 and 44 may include a first
electrode 42 connected to the first conductive region 32 and a second electrode 44 connected
to the second conductive region 34. In this case, at least one of the first and second electrodes
42 and 44 may be an electrode including the metal 40a and the adhesive material 40b as
described above. As described above, in the present embodiment, the solar battery 10 may
have a back surface electrode structure in which the first and second conductive regions 32 and
34 having first and second conductivity types opposite to each other are positioned together on
the back surface of the semiconductor substrate 12 while being spaced apart from each other,
and the first and second electrodes 42 and 433 are positioned together thereon. Then, since
the electrode is not formed on the front surface of the semiconductor substrate 12, it is possible
to improve the efficiency of the solar battery 10 by minimizing shading loss. However, the
present disclosure is not limited thereto, and various modifications are possible, such as at least
one of the first and second conductive regions 32 and 34 being positioned on the front surface
of the semiconductor substrate 12.
(52] For example, the semiconductor substrate 12 may include a base region 12a made of
a crystalline semiconductor (e.g., single crystal or polycrystalline semiconductor, for example,
single crystal or polycrystalline silicon, particularly single crystal silicon) including a first or
second conductive dopant. As described above, the solar battery 10 based on the base region
12a or the semiconductor substrate 12 having few defects due to high crystallinity has excellent
electrical characteristics.
-13-
[53] A front electric field region 12b may be positioned on the front surface of the
semiconductor substrate 12. For example, the front electric field region 12b is a doped region
having the same conductivity type as that of the base region 12a and a higher doping
concentration than the base region 12a, and may constitute a portion of the semiconductor
substrate 12. However, the present disclosure is not limited thereto. Accordingly, various
modifications are possible, such as the front electric field region 12b being a semiconductor
layer positioned separately from the semiconductor substrate 12 or including an oxide film
having no dopant and having a fixed electric charge.
[54] ·In addition; the front surface ofthe semiconductor substrate 12 may be provided with
an anti-reflection structure for preventing reflection (for example, a pyramid-shaped texturing
structure including a (Ill) surface of the semiconductor substrate 12) to minimize reflection.
In addition, the back surface of the semiconductor substrate 12 includes a mirror-polished
surface and has a smaller surface roughness than the front surface to improve passivation
characteristics. However, the present disclosure is not limited thereto. For example, various
modifications are possible, such as an anti-reflection structure formed on the back surface of
the semiconductor substrate 12 or no anti-reflection structure formed on the front surface of the
semiconductor substrate 12.
[55] An intermediate layer 20 may be positioned between the semiconductor substrate 12
and the conductive regions 32 and 34 on the back surface of the semiconductor substrate 12.
The intermediate layer 20 may be entirely positioned on the back surface of the semiconductor
substrate 12, and for example, may entirely contact the back surface of the semiconductor
substrate 12.
[56] The intermediate layer 20 may serve as a passivation film for passivating the surface
of the semiconductor substrate 12. Alternatively, the intermediate layer 20 may serve as a
dopant control role or a diffusion barrier preventing the dopants of the conductive regions 32
-14-
and 34 from being excessively diffused into the semiconductor substrate 12. The intermediate
layer 20 may include various materials capable of performing the above-described roles, and
may be formed of, for example, an oxide film, a dielectric film or insulating film containing
silicon, a nitride oxide film, a carbide oxide film, an intrinsic amorphous silicon film, etc. As
in the present embodiment, in the case where the conductive regions 32 and 34 includes the
polycrystalline semiconductor layer 30, when the intermediate layer 20 is formed of a silicon
oxide film, the intermediate layer 20 may be easily manufactured and carriers may be smoothly
performed through the intermediate layer 20. As another example, when the conductive
regions 32 and 34 are formed of an amorphous semiconductor layer or a microcrystalline
semiconductor layer, the intermediate layer 20 may be formed of an intrinsic amorphous silicon
layer.
[57] A thickness of the intermediate layer 20 may be smaller than that of a front passivation
film 24, an anti-reflection film 26, and a back surface passivation film 40. For example, the
thickness of the interlayer 20 may be 10 nm or less (e.g., 5 nm or less, more specifically, 2 nm
or less, for example, 0.5 nm to 2 nm). This is for sufficiently realizing the effect of the
interlayer 20, but the present disclosure is not limited thereto.
[58] The polycrystalline semiconductor layer 30 including the conductive regions 32 and
34 may be positioned (e.g., contacted) on the inter layer 20. More specifically, the first
conductive region 32 and the second conductive region 34 may be positioned together in the
polycrystalline semiconductor layer 30 continuously formed on the intermediate layer 20, and
thus, may be positioned on the same plane. In addition, a barrier region 36 may be positioned
between the first conductive region 32 and the second conductive region 34 and on the same
plane as the first conductive region 32 and the second conductive region 34.
[59] The first and second conductive regions 32 and 34 and the barrier region 36, or the
polycrystalline semiconductor layer 30 may be made of polycrystalline semiconductors (e.g.,
-15-
polycrystalline silicon) having a polycrystalline structure that is a crystal structure different
from that of the semiconductor substrate 12. More specifically, the first conductive region 32
may include a part (a first conductive polycrystalline part) of the polycrystalline semiconductor
layer 30 containing a first conductive dopant, the second conductive region 34 may include a
part (a second conductive polycrystalline part) of the polycrystalline semiconductor layer 30
containing a second conductive dopant, and the barrier region 36 may include a part (intrinsic
or undoped polycrystalline part) of the polycrystalline semiconductor layer 30 undoped with
dopants of the first and second conductivity types. As described above, when the first and
second conductive regions 32 and 34 include the polycrystalline semiconductor layer 30, the
first and second conductive regions 32 and 34 may have high carrier mobility. In addition, as
in the present embodiment, the first and second conductive regions 32 and 34 are combined
with the electrodes 42 and 44 including a single printed layer 420, thereby improving various
characteristics of the solar battery 10. However, the present disdosure is not limited thereto.
Accordingly, the first and second conductive regions 32 and 34 and the barrier region 36 or the
polycrystalline semiconductor layer 30 may include an amorphous semiconductor, a
microcrystalline semiconductor (e.g., amorphous silicon or microcrystalline silicon), or the like.
[60] In this case, when the base region 12a has the second conductivity type, the first
conductive region 32 having a conductivity type different from that of the base region 12a
functions as an emitter region, and the second conductive region 34 having the same
conductivity type as the base region 12a functions as a back surface field region. The barrier
region 36 physically separates the first conductive region 32 and the second conductive region
34 from each other to prevent a shunt that may occur when they come into contact.
[61] In this way, the first and second conductive regions 32 and 34 are formed of separate
layers different from the semiconductor substrate 12 with the intermediate layer 20 interposed
therebetween. Accordingly, loss due to recombination may be minimized compared to the
-16-
case where the doped region formed by doping the semiconductor substrate 12 with a dopant is
used as the conductive region. In addition, by configuring the barrier region 36 as an intrinsic
or undoped portion, the process of forming the barrier region 36 may be simplified.
[62] However, the present disclosure is not limited thereto. Therefore, the intermediate
layer 20 may not be provided. Alternatively, at least one of the first and second conductive
regions 32 and 34 may be formed by doping a portion of the semiconductor substrate 12 with a
dopant to form a doped region constituting a portion of the semiconductor substrate 12. In
addition, the barrier region 36 may not be provided, or the barrier region 36 may be made of a
material other than a semiconductor material or may be formed of an empty space. Various
other modifications are possible.
[63] Here, when the first or second conductive dopant is p-type, a group 11I element such
as boron (B), aluminum (AI), gallium (Ga), or indium (In) may be used. When the first or
second conductive dopant is n-type, a group 5 element such as phosphorus (P), arsenic (As),
·bismuth (Bi), or antimony (Sb) may be used. For example, one of the first and second
conductive dopant may be boron (B) and the other may be phosphorus (P).
[64] In the present embodiment, the first conductive region 32 extends in a first direction
(y-axis direction in the drawing) and is provided in plurality in a second direction (x-axis
direction in the drawing) to form a stripe shape, and the second conductive region 34 may
extend in the first direction and may be provided in plurality in the second direction to form a
stripe shape. In the second direction, the first conductive region 32 and the second conductive
region 34 may be positioned alternately with each other, and may be positioned between the
first conductive region 32 and the second conductive region 34 with a barrier region 36
separating them. In this case, an area (e.g., width) of the first conductive region 32 may be
larger than that (e.g., width) of the second conductive region 34. As a result, the first
conductive region 32 functioning as an emitter region may have a larger area than the second
-17-
conductive region 34 functioning as the back surface electric field region, and thus, may be
advantageous for photoelectric conversion. However, the present disclosure is not limited
thereto, and the arrangement, area, and width of the frrst and second conductive regions 32 and
34 and the barrier region 36 may be variously modified.
[65] The front passivation film 24 and the anti-reflection film 26 may be sequentially
positioned (e.g., contacted) on the front surface of the semiconductor substrate 12, and the back
surface passivation film 40 having a contact hole 46 on the conductive regions 32 and 34 or the
polycrystalline semiconductor layer 30 may be positioned (e.g., contacted). The front
passivation fihn 24 and the anti-reflection film 26 are entirely formed on the entire surface of
the semiconductor substrate 12, and the back surface passivation film 40 may be entirely formed
on the polycrystalline semiconductor layer 30, except for the contact hole 46. For example,
the front passivation fihn 24, the antireflection layer 26, or the back surface passivation film 40
may not include a dopant or the like to have excellent insulating properties and passivation
properties.
[66] For example, the front passivation fihn 24, the anti-reflection film 26, or the back
surface passivation film 40 may have a single layer or multiplayer structure, in which two or
more layers are combined, selected from the group consisting of a silicon nitride film, a silicon
nitride fihn containing hydrogen, a silicon oxide fihn, a silicon oxynitride film, an aluminum
oxide film, a silicon carbide film, MgF2, ZnS, Ti02, and Ce02 In the present embodiment, the
back surface passivation film 40 may be formed of an optical fihn that controls an optical path,
such as a reflective fllm and an anti-reflection film. For example, the back surface passivation
fihn 40 may function as the reflective film serving as an internal reflection that reflects light
incident on the front surface of the solar battery 10 and reaching the back surface back into the
solar battery 10. In addition, the back surface passivation film 40 may function as an antireflection
film that prevents reflection of light incident on the back surface of the solar battery
-18-
10.
[67] The first electrode 42 may be electrically connected to the first conductive region 32
through the contact hole 46, and the second electrode 44 may be electrically connected to the
second conductive region 34 through the contact hole 46.
[68] In the present embodiment, the first electrode 42 may be formed in a stripe shape to
correspond to the first conductive region 32 extending in the first direction, and the second
electrode 44 may be formed in a stripe shape to correspond to the second conductive region 34
extending in the second direction. For example, the area of the first electrode 42 may be 25%
to 75% of the area of the first conductive region 32, and the area of the second electrode 44
may be 25% to 75% of the area of the second· conductive region 34. Within this range, the
effect of carrier collection and transfer may be improved. However, the present disclosure is
not limited thereto, and various modifications are possible.
[69] The contact hole 46 may be formed to connect (e.g., contact) only a portion of the first
and second electrodes 42 and 44 to the first conductive region 32 and the second conductive
region 34, respectively. For example, a plurality of contact holes 46 may be formed to
correspond to one first electrode 42 or one second electrode 44. As a result, it is possible to
reduce the formation area of the contact hole 46 to simplify the process of forming the contact
hole 46 and to prevent problems such as deterioration in properties that may occur when the
contact hole 46 is formed. Alternatively, each of the contact holes 46 may be formed in the
entire length of the first and second electrodes 42 and 44 to correspond to the first and second
electrodes 42 and 44. Thus, it is possible to maximize the contact area between the first and
second electrodes 42 and 44 and the first conductive region 32 and the second conductive region
34 to improve carrier collection efficiency. Various other modifications are possible.
[70] In the present embodiment, the first electrode 42 and/or the second electrode 44 may
include a metal40a and an adhesive material40b. In the enlarged circle of FIG. 4, the portion
-19-
where the first electrode 42 is positioned is enlarged, and will be described below based on this,
but the second electrode 44 may also have the same or extremely similar structure. Hereinafter,
the first and/or second conductive regions 32 and 34 will be described by referring to as tbe
conductive regions 32 and 34, and the first and/or second electrodes 42 connected thereto will
be described by referring to as the electrodes 42 and 44.
[Claim 1]
A solar battery, comprising:
a semiconductor substrate;
a conductive region positioned on one surface of the semiconductor substrate and
including a polycrystalline semiconductor layer; and
an electrode connected to tbe conductive region including the polycrystalline
semiconductor layer and including a metal and an adhesive material.
[Claim 2]
The solar battery of claim 1, wherein the metal includes a frrst metal, and
a compound layer including a metal-semiconductor compound made of the first metal
and a semiconductor material included in the polycrystalline semiconductor layer is partially
formed to correspond to a frrst region at a boundary between the electrode and the conductive
region.
[Claim 3]
The solar battery of claim 2, wherein the metal and the adhesive material are formed
in contact with the polycrystalline semiconductor layer in a second region excluding tbe riiSt
region at the boundary between the electrode and the conductive region.
[Claim 4]
The solar battery of claim 2, wherein the frrst metal includes nickel,
the semiconductor material includes silicon, and
the compound layer includes nickel silicide.
[Claim 5]
The solar battery of claim 3, wherein an area of the frrst region is smaller than that of
the second region.
-59-
[Claim 6]
The solar battery of claim 2, wherein the metal further includes a second metal having
a lower resistivity than the first metal.
[Claim 7]
The solar battery of claim 2, wherein a part by weight of the frrst metal is 15 or less
based on total! 00 parts by weight of the metal in the electrode.
[Claim 8]
The solar battery of claim 1, wherein the electrode includes a single printed layer
including the metal and the adhesive material.
[Claim 9]
The solar battery of claim 8, wherein a thickness of the electrode or the printed layer
is 10 J.Lm or more.
[Claim 10]
The solar battery of claim 1, further comprising:
a back surface passivation film covering the conductive region and having a contact
hole, the electrode being formed inside the contact hole to be spaced apart from the back surface
passivation film, or
a back surface passivation film positioned on the polycrystalline semiconductor layer
and on at least a portion of at least one of the frrst and second electrodes.
[Claim 11]
The solar battery of claim 1, wherein the conductive region includes a first conductive
region and a second conductive region spaced apart from each other on the one surface of the
semiconductor substrate,
the electrode includes a frrst electrode connected to the first conductive region and a
second electrode connected to the second conductive region, and
-60-
at least one of the first and second electrodes includes the metal and the adhesive
material.
[Claim 12]
A solar battery panel, comprising:
a solar battery including a semiconductor substrate, a conductive region positioned on
one surface of the semiconductor substrate and including a polycrystalline semiconductor layer,
and an electrode connected to the polycrystalline semiconductor layer and including a metal
and an adhesive material;
a wiring material electrically connected to the electrode; and
an adhesive layer positioned between the electrode and the Wirmg material to
electrically connect the electrode and the wiring material.
[Claim 13]
The solar battery panel of claim 12, wherein the adhesive layer is formed in contact
with the electrode and includes a solder material including bismuth.
[Claim 14]
The solar battery panel of claim 12, wherein a surface roughness of the electrode is
greater than that of the adhesive layer.
[Claim 15]
The solar battery panel of claim 12, wherein the electrode protrudes to be rounded or
convexed toward the wiring material, and
a width of the adhesive layer gradually increases toward the wiring material while
completely covering the rounded portion of the electrode.
[Claim 16]
The solar battery panel of claim 12, wherein a ratio of a thickness of the electrode to a
thickness of the adhesive layer is 0.5 or more.
-61-
[Claim 17]
A method for manufacturing a solar battery panel, comprising:
a step of manufacturing a solar battery including a semiconductor substrate, a
conductive region positioned on one surface of the semiconductor substrate and having a
polycrystalline semiconductor layer, and an electrode connected to the conductive region;
a step of forming an adhesive layer on the electrode; and
an adhesive heat treatment step of applying heat and pressure to a wiring material
positioned on the electrode and the adhesive layer to adhere the wiring material to the electrode
using the adhesive layer.
wherein the electrode includes a printed layer formed by applying an electrode paste
including a metal and an adhesive material through a printing process and performing curing
heat treatment on the electrode paste.
[Claim 18]
The method for claim 17, wherein the electrode includes a single printed layer formed
by a one-time printing process, and
the adhesive layer is formed by applying a solder paste including a solder material
including bismuth on the single printed layer.
[Claim 19]
The method for claim 18, wherein the adhesive layer further includes an additional
adhesive material,
before the adhesive heat treatment step, a part by weight of the adhesive material
included in the electrode paste is smaller than that of the additional adhesive material included
in the solder paste, and
after the adhesive heat treatment step, a part by weight of the adhesive material
included in the electrode is greater than that of the additional adhesive material included in the
-62-
adhesive layer.
[Claim 20]
The method for claim 17, wherein a temperature of the curing heat treatment step of
the electrode is 500°C or lower, and
a melting point of the adhesive layer is lower than a process temperature of the
adhesive heat treatment step.
| # | Name | Date |
|---|---|---|
| 1 | 202217051759.pdf | 2022-09-10 |
| 2 | 202217051759-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [10-09-2022(online)].pdf | 2022-09-10 |
| 3 | 202217051759-STATEMENT OF UNDERTAKING (FORM 3) [10-09-2022(online)].pdf | 2022-09-10 |
| 4 | 202217051759-REQUEST FOR EXAMINATION (FORM-18) [10-09-2022(online)].pdf | 2022-09-10 |
| 5 | 202217051759-FORM 18 [10-09-2022(online)].pdf | 2022-09-10 |
| 6 | 202217051759-FORM 1 [10-09-2022(online)].pdf | 2022-09-10 |
| 7 | 202217051759-DRAWINGS [10-09-2022(online)].pdf | 2022-09-10 |
| 8 | 202217051759-DECLARATION OF INVENTORSHIP (FORM 5) [10-09-2022(online)].pdf | 2022-09-10 |
| 9 | 202217051759-COMPLETE SPECIFICATION [10-09-2022(online)].pdf | 2022-09-10 |
| 10 | 202217051759-Proof of Right [27-09-2022(online)].pdf | 2022-09-27 |
| 11 | 202217051759-FORM-26 [27-09-2022(online)].pdf | 2022-09-27 |
| 12 | 202217051759-FORM 3 [27-09-2022(online)].pdf | 2022-09-27 |
| 13 | 202217051759-RELEVANT DOCUMENTS [31-01-2023(online)].pdf | 2023-01-31 |
| 14 | 202217051759-POA [31-01-2023(online)].pdf | 2023-01-31 |
| 15 | 202217051759-PA [31-01-2023(online)].pdf | 2023-01-31 |
| 16 | 202217051759-MARKED COPIES OF AMENDEMENTS [31-01-2023(online)].pdf | 2023-01-31 |
| 17 | 202217051759-FORM 13 [31-01-2023(online)].pdf | 2023-01-31 |
| 18 | 202217051759-ASSIGNMENT DOCUMENTS [31-01-2023(online)].pdf | 2023-01-31 |
| 19 | 202217051759-AMENDED DOCUMENTS [31-01-2023(online)].pdf | 2023-01-31 |
| 20 | 202217051759-8(i)-Substitution-Change Of Applicant - Form 6 [31-01-2023(online)].pdf | 2023-01-31 |
| 21 | 202217051759-Others-090223.pdf | 2023-02-10 |
| 22 | 202217051759-Others-090223-6.pdf | 2023-02-10 |
| 23 | 202217051759-Others-090223-5.pdf | 2023-02-10 |
| 24 | 202217051759-Others-090223-4.pdf | 2023-02-10 |
| 25 | 202217051759-Others-090223-3.pdf | 2023-02-10 |
| 26 | 202217051759-Others-090223-2.pdf | 2023-02-10 |
| 27 | 202217051759-Others-090223-1.pdf | 2023-02-10 |
| 28 | 202217051759-GPA-090223.pdf | 2023-02-10 |
| 29 | 202217051759-GPA-090223-1.pdf | 2023-02-10 |
| 30 | 202217051759-Form-2-090223.pdf | 2023-02-10 |
| 31 | 202217051759-Correspondence-090223.pdf | 2023-02-10 |
| 32 | 202217051759-Correspondence-090223-1.pdf | 2023-02-10 |
| 33 | 202217051759-RELEVANT DOCUMENTS [20-12-2023(online)].pdf | 2023-12-20 |
| 34 | 202217051759-POA [20-12-2023(online)].pdf | 2023-12-20 |
| 35 | 202217051759-MARKED COPIES OF AMENDEMENTS [20-12-2023(online)].pdf | 2023-12-20 |
| 36 | 202217051759-FORM 13 [20-12-2023(online)].pdf | 2023-12-20 |
| 37 | 202217051759-AMENDED DOCUMENTS [20-12-2023(online)].pdf | 2023-12-20 |
| 38 | 202217051759-FER.pdf | 2023-12-22 |
| 39 | 202217051759-PA [14-05-2024(online)].pdf | 2024-05-14 |
| 40 | 202217051759-ASSIGNMENT DOCUMENTS [14-05-2024(online)].pdf | 2024-05-14 |
| 41 | 202217051759-8(i)-Substitution-Change Of Applicant - Form 6 [14-05-2024(online)].pdf | 2024-05-14 |
| 42 | 202217051759-Information under section 8(2) [19-06-2024(online)].pdf | 2024-06-19 |
| 43 | 202217051759-FORM 4 [19-06-2024(online)].pdf | 2024-06-19 |
| 44 | 202217051759-OTHERS [06-09-2024(online)].pdf | 2024-09-06 |
| 45 | 202217051759-FER_SER_REPLY [06-09-2024(online)].pdf | 2024-09-06 |
| 46 | 202217051759-COMPLETE SPECIFICATION [06-09-2024(online)].pdf | 2024-09-06 |
| 47 | 202217051759-CLAIMS [06-09-2024(online)].pdf | 2024-09-06 |
| 48 | 202217051759-US(14)-HearingNotice-(HearingDate-24-01-2025).pdf | 2025-01-08 |
| 49 | 202217051759-FORM-26 [08-01-2025(online)].pdf | 2025-01-08 |
| 50 | 202217051759-GPA-130125.pdf | 2025-01-14 |
| 51 | 202217051759-Correspondence-130125.pdf | 2025-01-14 |
| 52 | 202217051759-GPA-140125.pdf | 2025-01-15 |
| 53 | 202217051759-Correspondence-140125.pdf | 2025-01-15 |
| 54 | 202217051759-REQUEST FOR ADJOURNMENT OF HEARING UNDER RULE 129A [20-01-2025(online)].pdf | 2025-01-20 |
| 55 | 202217051759-US(14)-ExtendedHearingNotice-(HearingDate-14-02-2025)-1000.pdf | 2025-01-24 |
| 56 | 202217051759-Correspondence to notify the Controller [12-02-2025(online)].pdf | 2025-02-12 |
| 57 | 202217051759-Written submissions and relevant documents [24-02-2025(online)].pdf | 2025-02-24 |
| 58 | 202217051759-Annexure [24-02-2025(online)].pdf | 2025-02-24 |
| 59 | 202217051759-FORM-8 [26-02-2025(online)].pdf | 2025-02-26 |
| 60 | 202217051759-PatentCertificate10-03-2025.pdf | 2025-03-10 |
| 61 | 202217051759-IntimationOfGrant10-03-2025.pdf | 2025-03-10 |
| 1 | 202217051759E_21-12-2023.pdf |