Abstract: Embodiments described herein include, software, firmware, and hardware logic that provides techniques to perform arithmetic on sparse data via a systolic processing unit. Embodiment described herein provided techniques to skip computational operations for zero filled matrices and sub-matrices. Embodiments additionally provide techniques to maintain data compression through to a processing unit. Embodiments additionally provide an architecture for a sparse aware logic unit.
| # | Name | Date |
|---|---|---|
| 1 | 202147036753-FORM 1 [13-08-2021(online)].pdf | 2021-08-13 |
| 2 | 202147036753-DRAWINGS [13-08-2021(online)].pdf | 2021-08-13 |
| 3 | 202147036753-DECLARATION OF INVENTORSHIP (FORM 5) [13-08-2021(online)].pdf | 2021-08-13 |
| 4 | 202147036753-COMPLETE SPECIFICATION [13-08-2021(online)].pdf | 2021-08-13 |
| 5 | 202147036753.pdf | 2021-10-19 |
| 6 | 202147036753-FORM-26 [02-11-2021(online)].pdf | 2021-11-02 |
| 7 | 202147036753-FORM 3 [14-02-2022(online)].pdf | 2022-02-14 |
| 8 | 202147036753-FORM 3 [16-08-2022(online)].pdf | 2022-08-16 |
| 9 | 202147036753-FORM 18 [28-12-2022(online)].pdf | 2022-12-28 |
| 10 | 202147036753-FER.pdf | 2023-01-31 |
| 11 | 202147036753-FORM 3 [15-05-2023(online)].pdf | 2023-05-15 |
| 12 | 202147036753-PETITION UNDER RULE 137 [27-07-2023(online)].pdf | 2023-07-27 |
| 13 | 202147036753-OTHERS [27-07-2023(online)].pdf | 2023-07-27 |
| 14 | 202147036753-MARKED COPIES OF AMENDEMENTS [27-07-2023(online)].pdf | 2023-07-27 |
| 15 | 202147036753-FORM 13 [27-07-2023(online)].pdf | 2023-07-27 |
| 16 | 202147036753-FER_SER_REPLY [27-07-2023(online)].pdf | 2023-07-27 |
| 17 | 202147036753-CLAIMS [27-07-2023(online)].pdf | 2023-07-27 |
| 18 | 202147036753-Annexure [27-07-2023(online)].pdf | 2023-07-27 |
| 19 | 202147036753-AMMENDED DOCUMENTS [27-07-2023(online)].pdf | 2023-07-27 |
| 20 | 202147036753-Proof of Right [05-09-2023(online)].pdf | 2023-09-05 |
| 21 | 202147036753-FORM 3 [15-11-2023(online)].pdf | 2023-11-15 |
| 1 | SearchHistoryE_30-01-2023.pdf |