Description:TECHNICAL FIELD
[0001] The present disclosure relates, in general, to radio frequency electronic filters, and more particularly, to reconfigurable frequency and bandwidth filters.

BACKGROUND
[0002] Radiofrequency (RF) filters at ultrahigh-frequency (UHF) are commonly designed using lumped resonators with inductive or capacitive coupling between the resonators. Most of the reconfigurable radios require an RF bandpass filter with variable bandwidth and centre frequency at an intermediate frequency (IF) to handle multiple data rates for a different types of modulations. In point-to-point communication systems, to achieve higher throughputs higher-order modulation schemes are required. There is a need for IF stage filters with reconfigurable bandwidth in such systems to achieve better selectivity, sensitivity, and dynamic range. In general, changing the characteristics of the RF filter requires tuning one or more reactive components present in the filter. Most of the low-cost broadcast radios use a multi-gang variable capacitor controlled through a stepper motor with fixed inductors to provide tuning across V/UHF frequency bands.
[0003] The digitally reconfigurable filter uses varactor diodes as tuning elements with variable reverse bias voltage for tuning capacitances. The reconfigurable filter may use more than one varactor as a tuning element to change the characteristics of the RF filter. The frequency and bandwidth of the filter can be changed by varying the capacitance of the varactor diode present in the RF filter. Varactor diode capacitance is inversely proportional to the applied reverse bias voltage and linear over a certain range of reverse bias. In reconfigurable filters, insertion loss mainly depends on the series resistance of the varactor diode. Higher series resistance results in a lower quality factor (Q) and dissipates more across the varactor diode. Also, varactor diodes are more susceptible to a high level of RF power compared to mechanical multi-gang variable capacitors. There are several reconfigurable filters using varactor diodes are published in the form of literature and patents.
[0004] An example of such reconfigurable filters is recited in literature titled “A Tunable Combline Bandpass Filter Loaded with Series Resonator” was proposed by Xu-Guang Wang, Young-Ho Cho and Sang-Won Yun and published in, IEEE Transactions on Microwave Theory and Techniques, vol. 60, pp. 1569-1576, 2012. Another similar literature titled “Three-Pole Tunable Filters with Constant Bandwidth Using Mixed Combline and Split-Ring Resonators” was proposed by Zhiyuan Zhao, Jiang Chen, Lin Yang, and Kunhe Chen and published in, IEEE wireless components letters, Vol.24 pp.671-673, 2014. This tunable filter uses microstrip coupled line loaded with varactor diodes and only center frequency tuned with fixed bandwidth. Also, these configurations are useful at microwave frequencies and not for the UHF/VHF frequencies due to physical size.
[0005] Another example is recited in a Patent US005392011 titled “Tunable filter having capacitively coupled tuning elements” discloses a lumped element-based tunable filer. The bandwidth of the filter is maintained at a constant value by providing inductive coupling between the first and second resonators. The first and second resonators include tuning elements which are second coupled to each other by means of a capacitor to improve the image rejection performance of the tunable filter. Characteristics of the tunable filter are not disclosed and also bandwidth tuning with fixed center frequency is not shown.
[0006] Another example is recited in a Patent US005917387A titled “ Filter having a tunable center frequency and/or tunable bandwidth” discloses a capacitive coupled LC resonator-based bandpass filter. Frequency tuning for different center frequencies is shown but different bandwidth with constant center frequency is not disclosed. Another example is recited in a Patent US006518859B1 titled “Frequency controlled filter for the UHF band” discloses a lumped element tunable filter composed of a series of shunt resonators coupled by coupling capacitors and only frequency tuning is disclosed and bandwidth tuning is not shown. It is an analog voltage-tuned bandpass filter. Yet another example is recited in a Patent US20110187448A1 titled “Wide band analog bandpass filter” discloses both bandwidth and centre frequency tuning of bandpass filter. Series and shunt varactor diodes are used to vary bandwidth and centre frequency respectively. Inductors are used in shunt configuration with the varactors and capacitive coupling is used between the LC resonators which degrades the roll-off at upper passband edge. Also, more passband ripple, center frequency offset and poor impedance matching are observed over the bandwidth tuning range. Analog voltages are used to control bandwidth and center frequency.
[0007] However, none of the above prior arts shows digitally reconfigurable bandwidth and center frequency of bandpass filter with symmetrical passband. Therefore, it is desired to overcome the drawbacks, shortcomings, and limitations associated with existing solutions, and develop a digitally reconfigurable bandpass filter where filter characteristics like bandwidth and center frequency that can be tuned easily by sending a serial peripheral interface (SPI) command.

OBJECTS OF THE PRESENT DISCLOSURE
[0008] An object of the present disclosure relates, in general, to radio frequency electronic filters, and more particularly, to reconfigurable frequency and bandwidth filters.
[0009] Another object of the present disclosure is to provide a digitally reconfigurable bandwidth and centre frequency bandpass filter with symmetrical passband characteristics obtained by a suitable arrangement of lumped components.
[0010] Another object of the present disclosure is to provide a filter having varactor diodes that are used in series and shunt with the fixed inductors to change the characteristics response of the bandpass filter.
[0011] Another object of the present disclosure is to provide a filter that generates different combination voltages required to change the capacitances of varactor diodes.
[0012] Another object of the present disclosure is to provide a filter that uses one fixed series capacitor between node A to node B to create sharp transmission zero at the upper passband edge.
[0013] Another object of the present disclosure is to provide a filter that provides optimized input and output matching networks that are used to obtain better return loss over the bandwidth and center frequency tuning range
[0014] Yet another object of the present disclosure is to provide different bandwidth and centre frequencies of bandpass filter that can be configured by SPI command.

SUMMARY
[0015] The present disclosure relates in general, to radio frequency electronic filters, and more particularly, to reconfigurable frequency and bandwidth filters. The main objective of the present disclosure is to overcome the drawback, limitations, and shortcomings of the existing filter and solution, by providing reconfigurable frequency and bandwidth filters.
[0016] The present disclosure relates to a digitally reconfigurable bandpass filter for variable data rate radio communication systems, the digitally reconfigurable bandpass filter includes a reconfigurable bandpass filter that tunes to the required frequency and bandwidth. Control circuits generate required bias voltages to reconfigure centre frequency and bandwidth. The control circuits include a controller that receives the required tune command from an external interface and assign a corresponding combination of digital words and a multi-channel digital to analogue converter (DAC) adapted to receive the corresponding combination of the digital word based on the tune command to generate required bias voltages, wherein the bias voltages reconfigure centre frequency and bandwidth of the digitally reconfigurable bandpass filter based on the digital word received from the controller.
[0017] Further, the controller assigns the corresponding combination of the digital word from the lookup table (LUT) to the multi-channel DAC, wherein the digital word versus tune command is stored in the form of the LUT in the controller. The configuration of the filter includes a suitable arrangement of inductors, capacitors, varactor diode and resistors to provide a symmetrical passband response. The filter having the plurality of series and shunt varactor diodes adjusts the bandwidth of the filter and reconfigures the centre frequency.
[0018] Moreover, the control circuit enables different combinations of bias voltages for the series and shunt varactor diodes. The input and output matching networks are optimized to obtain better return loss over the frequency and bandwidth tuning range. At least one series capacitor between the first node and second node for creating a sharp transmission zero closer to the upper passband edge.
[0019] Various objects, features, aspects, and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.

BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The following drawings form part of the present specification and are included to further illustrate aspects of the present disclosure. The disclosure may be better understood by reference to the drawings in combination with the detailed description of the specific embodiments presented herein.
[0021] FIG. 1 illustrates an exemplary block diagram of a symmetrical response bandpass filter with digitally reconfigurable bandwidth and centre frequency, in accordance with an embodiment of the present disclosure.
[0022] FIG. 2 illustrates a circuit diagram of the symmetrical response bandpass filter, in accordance with an embodiment of the present disclosure.
[0023] FIG. 3 is a block diagram of the control circuit, in accordance with an embodiment of the present disclosure.
[0024] FIG. 4 illustrates a graphical view of measured results of centre frequency tunning of digitally reconfigurable filter, in accordance with an embodiment of the present disclosure.
[0025] FIG. 5 illustrates a graphical view of measured results of bandwidth tunning at 140MHz of digitally reconfigurable filter, in accordance with an embodiment of the present disclosure.
[0026] FIG. 6 illustrates a graphical view of measured results of bandwidth tunning at 160MHz of digitally reconfigurable filter, in accordance with an embodiment of the present disclosure.
[0027] FIG. 7 illustrates a graphical view of measured results of bandwidth tunning at 180MHz of digitally reconfigurable filter, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0028] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
[0029] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0030] The present disclosure relates, in general, to radio frequency electronic filters, and more particularly, to reconfigurable frequency and bandwidth filters. The proposed filter disclosed in the present disclosure overcomes the drawbacks, shortcomings, and limitations associated with conventional filters by providing an RF bandpass filter and more particularly to tune the characteristics of bandpass filters like bandwidth and centre frequency.
[0031] The present disclosure discloses the design of a filter with digitally reconfigurable bandwidth and centre frequency for variable data rate radio communication systems. The reconfigurable filter can include an RF input terminal, an RF output terminal, an input matching network, an output matching network, a plurality of lumped element resonators, coupling capacitors, and varactor diodes. The reconfigurable bandwidth and center frequency are achieved by varying the capacitances of series and shunt varactor diodes. The reverse bias voltage of varactor diodes is controlled by the digital control circuit. The digital control circuit can include the controller and a multi-channel digital to analog (DAC) converter that enables different combinations of bias voltages required to reconfigure the bandwidth and center frequency of the filter. Fractional bandwidth can be configured from 3% to 20% of the centre frequency by sending commands through serial peripheral interface. The present disclosure can be described in enabling detail in the following examples, which may represent more than one embodiment of the present disclosure.
[0032] The advantages achieved by the filter of the present disclosure can be clear from the embodiments provided herein. The digitally reconfigurable bandwidth and centre frequency bandpass filter with symmetrical passband characteristics are obtained by a suitable arrangement of lumped components. The filter having varactor diodes that are used in series and shunt with the fixed inductors to change the characteristics response of the bandpass filter. The filter generates different combination voltages required to change the capacitances of varactor diodes. The filter uses one fixed series capacitor between node A to node B to create sharp transmission zero at the upper passband edge. Further, the filter provides optimized input and output matching networks that are used to obtain better return loss over the bandwidth and center frequency tuning range and provide different bandwidth and centre frequency of bandpass filter that can be configured by SPI command. The description of terms and features related to the present disclosure shall be clear from the embodiments that are illustrated and described; however, the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents of the embodiments are possible within the scope of the present disclosure. Additionally, the invention can include other embodiments that are within the scope of the claims but are not described in detail with respect to the following description.
[0033] FIG. 1 illustrates an exemplary block diagram of a symmetrical response bandpass filter with digitally reconfigurable bandwidth and centre frequency, in accordance with an embodiment of the present disclosure.
[0034] Referring to FIG. 1, symmetrical response bandpass filter 100 (also referred to as digitally reconfigurable bandpass filter 100, herein) with the symmetrical pass for variable data rate radio communication systems is disclosed. The symmetrical response bandpass filter 100 can include RF input 102, RF output 104, reconfigurable bandpass filter 106, control circuit 108 and external interface 110. The RF input 102 is applied to a reconfigurable bandpass filter 106, which is tuned to the required frequency and bandwidth and received at RF output 104.
[0035] The control circuit 108 generates the required bias voltages to reconfigure centre frequency and bandwidth, the control circuits include a controller 302 and multi-channel digital to analogue converter (DAC) 304 as depicted in FIG. 3. The controller 302 receives the required tune command from the external interface 110 and assign a corresponding combination of the digital word. The multi-channel DAC converter 304 is adapted to receive the corresponding combination of the digital word based on the tune command to generate required bias voltages e.g., V1, V2, V3 and V4, where the bias voltages reconfigure centre frequency and bandwidth of the reconfigurable bandpass filter based on the digital word received from the controller 302.
[0036] The controller 302 assigns the corresponding combination of the digital word from lookup table (LUT) to the multi-channel DAC, wherein the digital word versus tune command is stored in the form of the LUT into the controller. The control circuit 108 enables different combinations of bias voltages for the series and shunt varactor diodes.
[0037] The filter 100 can include an RF input terminal, an RF output terminal, an input matching network, an output matching network, a plurality of lumped element resonators, coupling capacitors and varactor diodes. The configuration of the filter includes a suitable arrangement of inductors, capacitors, varactor diode and resistors to provide a symmetrical passband response. The filter 100 includes the plurality of series and shunt varactor diodes to adjust the bandwidth of the filter and reconfigure the centre frequency. The input and output matching networks are optimized to obtain better return loss over the frequency and bandwidth tuning range. At least one series capacitor is provided between the first node and second node for creating a sharp transmission zero closer to the upper passband edge.
[0038] The required voltages can be generated through the control circuits 108.The control circuit 108 can include multi-channel DAC 304 and controller 302 as depicted in FIG. 3. The tune command data is sent over external interface 110 to the control circuit 108 to generate required bias voltages V1, V2, V3, V4. The bias voltage V1, V2, V3, V4 applied to reconfigurable bandpass filter 106 reconfigure frequency and bandwidth. In an exemplary embodiment, the external interface is the serial port interface (SPI) interface.
[0039] The reconfigurable bandpass filter 106 uses a fixed series inductor, capacitors, varactor diodes, resistors, and a control circuit. The digitally reconfigurable bandwidth and centre frequency bandpass filter with symmetrical passband characteristics obtained by suitable arrangement of lumped components. The filter 100 having varactor diodes that are used in series and shunt with the fixed inductors to change the characteristics response of the bandpass filter. The filter generates different combination voltages required to change the capacitances of varactor diodes, uses one fixed series capacitor between node A to node B to create sharp transmission zero at the upper passband edge, provides optimized input and output matching networks that are used to obtain better return loss over the bandwidth and center frequency tuning range. Further, the filter 100 provides different bandwidth and centre frequency of bandpass filter that can be configured by SPI command.
[0040] FIG. 2 illustrates a circuit diagram of a symmetrical response bandpass filter, in accordance with an embodiment of the present disclosure.
[0041] Referring to FIG. 2 the reconfigurable bandwidth and frequency bandpass filter with symmetrical passband is disclosed. FIG. 2 shows the filter 100 configuration that provides the frequency and bandwidth tunning. The reconfigurable bandpass filter 100 can include input/output matching network, multi-resonator and capacitive coupling. The input, and output matching capacitors, resonator capacitor and coupling capacitor are replaced with varactor diodes. The varactor diodes are reverse-biased with resistors.
[0042] The filter includes an input impedance matching fixed shunt capacitor 202 connected to a source 200 and an output matching fixed shunt capacitor 204 connected to load 206. The first input impedance matching varactor diode 208-1 reverse biased with voltage V1 through resistor 208-2, DC path grounded through a resistor 208-3 and required DC block capacitor 208-4 connected between source 200 and varactor diode 208-1. The output impedance matching varactor diode 208-5 reverse biased with voltage V1 through resistor 208-6, DC path grounded through a resistor 208-7 and required DC block capacitor 208-5 connected between load 206 and varactor diode 208-1.
[0043] A first resonator includes a series inductor 210-1, fixed shunt capacitor 212 and shunt varactor diode 214-1 reverse biased with voltage V4 through resistor 214-2, DC block capacitor 214-3. A second resonator includes a series inductor 210-2, fixed shunt capacitor 216-1 and shunt varactor diode 214-4 reverse biased with voltage V4 through resistor 214-5, DC block capacitor 214-6. The third resonator includes a series inductor 210-3, fixed shunt capacitor 216-2 and shunt varactor diode 218-1 reverse biased with voltage V4 through resistor 218-2, DC block capacitor 218-3. The fourth resonator includes a series inductor 210-4, fixed shunt capacitor 220 and shunt varactor diode 218-4 reverse biased with voltage V4 through resistor 218-5, DC block capacitor 218-6. The first, input coupling series varactor diode 222-1 is placed between node C and D. Secondly, symmetrically w.r.t node H output coupling varactor diode 222-2 placed between the node G and node B. Third, coupling varactor diodes 224-1,224-2 placed between the node between the node E and node F.
[0044] The input coupling varactor diode 222-1 reverse biased with voltage V2 through resistor 222-3 and DC path grounded through a resistor 222-3 and required DC block capacitor 222-4 connected. The output coupling varactor diode 222-2 reverse biased with voltage V2 through resistor 222-5 and DC path grounded through a resistor 222-6 and required DC block capacitor 222-7 connected. To maintain the symmetrical structure w.r.to node H between input 100 and output 206, third coupling two varactor diode are used.
[0045] The third, is coupling varactor diodes 224-1,224-2 reverse biased with voltage V3 through resistor 224-3, DC block capacitors 224-4,224-5 and grounded through resistors 224-6, 224-7 respectively. The capacitor 226 is included between node A and node B to create sharp transmission Zero closer upper edge of passband. Digitally reconfigurable bandpass filter configuration of filter includes the suitable arrangement of inductors, capacitors, varactor diode and resistors to provide symmetrical passband response.
[0046] As depicted in FIG. 2, the filter configuration in the schematics provides the independent reconfigure centre frequency and bandwidth. The required bias voltage V1, V2, V3 and V4 are applied to input/output matching series varactor diodes (208-1,208-8), series coupling varactor diodes (222-1, 222-2), series coupling varactor diodes (224-1,224-2) and shunt varactor diodes(214-1,214-4) respectively to reconfigure the centre frequency with constant bandwidth. Similarly, the required bias voltage V1, V2, V3 and V4 are applied to input/output matching series varactor diodes (208-1,208-8), series coupling varactor diodes (222-1, 222-2), series coupling varactor diodes (224-1,224-2) and shunt varactor diodes (214-1,214-4) respectively to tune bandwidth of filter with fixed centre frequency.
[0047] The circuit EM simulation optimization is performed to find the best combination bias voltages of V1, V2, V3 and V4 for the required bandwidth and centre frequency. These combinations of voltages are tabulated with respect to bandwidth and centre frequency. Bias voltages V1, V2, V3 and V4 are obtained through simulation is verified with practical measurement by feeding analog voltages to the fabricated circuit. Then digital word 306 corresponding to the different combinations of analog voltages are obtained and may be mapped to 16-bit data as tune command. Digital word 306 versus tune command is stored in the form of Lookup Table (LUT) into the controller 302. The user can give directly 16bit data in SPI terminal as a digital input to the reconfigurable filter, which tunes bandwidth and centre frequency automatically.
[0048] FIG. 3 is a block diagram of a control circuit, in accordance with an embodiment of the present disclosure.
[0049] The control circuit 108 can include consists of controller 302 and multi-channel Digital to Analog Converter (DAC) 304. The control circuit 108 generates the required voltages to reconfigure centre frequency and bandwidth. The controller 302 receives the required tune command from SPI to configure bandwidth and centre frequency. Based on the tune command, the controller 302 assign a corresponding combination of digital word from LUT to multi-channel DAC 304. The bias voltages V1, V2, V3, V4 to reconfigure centre frequency and bandwidth are generated through multi-channel DAC 304 based on the digital word received from the controller 302.
[0050] FIG. 4 illustrates a graphical view of measured results of centre frequency tuning of digitally reconfigurable filter, in accordance with an embodiment of the present disclosure. The measured results of centre frequency tunning of digitally reconfigurable filter with return loss (R) and Transmission response (T) are shown in FIG. 4. As depicted in FIG.4 shows the symmetrical passband across the frequency tuning range. The sharp rejection closer to upper passband is creating introducing capacitor between the node A (also referred as first node) and node B also referred as second node) and variation transmission zero (Tz) is shown in FIG.4 across the centre frequency tunning range.
[0051] FIG.5- FIG.7 shows measured results of the reconfigurable bandwidth of filter. FIG. 5 illustrates a graphical view of measured results of bandwidth tunning at 140MHz of digitally reconfigurable filter, in accordance with an embodiment of the present disclosure. FIG. 6 illustrates a graphical view of measured results of bandwidth tunning at 160MHz of digitally reconfigurable filter, in accordance with an embodiment of the present disclosure. FIG. 7 illustrates a graphical view of measured results of bandwidth tunning at 180MHz of digitally reconfigurable filter, in accordance with an embodiment of the present disclosure.
[0052] It will be apparent to those skilled in the art that the filter 100 of the disclosure may be provided using some or all of the mentioned features and components without departing from the scope of the present disclosure. While various embodiments of the present disclosure have been illustrated and described herein, it will be clear that the disclosure is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the disclosure, as described in the claims.

ADVANTAGES OF THE PRESENT INVENTION
[0053] The present invention provides a digitally reconfigurable bandwidth and centre frequency bandpass filter with symmetrical passband characteristics obtained by a suitable arrangement of lumped components.
[0054] The present invention provides a filter having varactor diodes that are used in series and shunt with fixed inductors to change the characteristics response of the bandpass filter.
[0055] The present invention provides a filter that generates different combination voltages required to change the capacitances of varactor diodes.
[0056] The present invention provides a filter that uses one fixed series capacitor between node A to node B to create sharp transmission zero at the upper passband edge.
[0057] The present invention provides optimized input and output matching networks that are used to obtain better return loss over the bandwidth and center frequency tuning range
[0058] The present invention provides different bandwidth and centre frequencies of bandpass filters that can be configured by SPI command.
, Claims:1. A digitally reconfigurable bandpass filter (100) for variable data rate radio communication systems, the digitally reconfigurable bandpass filter comprising:
a reconfigurable bandpass filter (106) that tunes to the required frequency and bandwidth;
a control circuit (108) that generates required bias voltages to reconfigure centre frequency and bandwidth, the control circuits comprising:
a controller (302) that receives the required tune command from an external interface and assign the corresponding combination of the digital word; and
a multi-channel digital to analogue converter (DAC) (304) adapted to receive the corresponding combination of the digital word based on the tune command to generate required bias voltages, wherein the bias voltages reconfigure centre frequency and bandwidth of the digitally reconfigurable bandpass filter based on the digital word received from the controller.
2. The digitally reconfigurable bandpass filter as claimed in claim 1, wherein the controller (302) assigns the corresponding combination of the digital word from a lookup table (LUT) to the multi-channel DAC, wherein the digital word versus tune command is stored in the form of the LUT into the controller.
3. The digitally reconfigurable bandpass filter as claimed in claim 1, wherein the filter (100) comprises an RF input terminal (102), an RF output terminal (104), input matching network, output matching network, a plurality of lumped element resonators, coupling capacitors and varactor diodes.
4. The digitally reconfigurable bandpass filter as claimed in claim 1, wherein configuration of the filter includes a suitable arrangement of inductors, capacitors, varactor diode and resistors to provide symmetrical passband response.
5. The digitally reconfigurable bandpass filter as claimed in claim 1, wherein the filter comprises the plurality of series and shunt varactor diodes to adjust the bandwidth of the filter and to reconfigure the centre frequency.
6. The digitally reconfigurable bandpass filter as claimed in claim 5, wherein the required bias voltage is applied to input/output matching series varactor diodes (208-1,208-8), series coupling varactor diodes (222-1, 222-2), series coupling varactor diodes (224-1,224-2) and shunt varactor diodes (214-1,214-4) respectively to reconfigure the centre frequency with constant bandwidth.
7. The digitally reconfigurable bandpass filter as claimed in claim 5, wherein the required bias voltage is applied to input/output matching series varactor diodes (208-1,208-8), series coupling varactor diodes (222-1, 222-2), series coupling varactor diodes (224-1,224-2) and shunt varactor diodes (214-1,214-4) respectively to tune bandwidth of filter with fixed centre frequency.
8. The digitally reconfigurable bandpass filter as claimed in claim 1, wherein the control circuit (108) enables different combinations of bias voltages for the series and shunt varactor diodes.
9. The digitally reconfigurable bandpass filter as claimed in claim 1, wherein the input and output matching networks are optimized to obtain better return loss over the frequency and bandwidth tuning range.
10. The digitally reconfigurable bandpass filter as claimed in claim 1, wherein at least one series capacitor between a first node and second node for creating a sharp transmission zero closer to the upper passband edge.