Claims:
1. A synchronizing device to recover a payload (10) in a frame (200) in a high data rate backhaul communication system (100), said synchronizing device comprising at least a processor (2) configured to:
receive the frame (200) from a Radio Frequency (RF) transceiver (3),
detect a first preamble (5) in the frame (200),
detect a plurality of timing synchronization symbols (6) subsequent to the detection of the first preamble (5),
perform timing recovery based on the received timing synchronization symbols (6),
detect a second preamble (7) in the frame (200),
detect a plurality of equalizer training symbols (8) subsequent to the detection of the second preamble (7),
train the LMS equalizer based on the received equalizer training symbols (8) in a training mode to obtain channel equalization coefficients,
detect a third preamble (9) in the frame (200), and
detect the payload (10) subsequent to the detection of the third preamble (9), wherein the LMS equalizer is decodes the payload (10) based on the channel equalization coefficients in a decision directed mode, thereby recovering the payload (10).

2. The synchronizing device as claimed in claim 1, wherein the processor (2) is configured to adjust one or more taps of the LMS equalizer based on the received equalizer training symbols (8).

3. The synchronizing device as claimed in claim 1, wherein the processor (2) is configured to detect boundaries of the frame (200) based on the first preamble (5) and the third preamble (9).

4. The synchronizing device as claimed in claim 1, wherein the processor (2) is configured to correct errors in the decoded payload (10) using Forward Error Correction (FEC).

5. The synchronizing device as claimed in claim 4, wherein the processor (2) configured to correct up to 25 symbol delay spread.

6. A synchronizing method for recovering a payload (10) in a frame (200), the method performed by a processor (2) in a high data rate backhaul communication system (100), said method comprising:
receiving the frame (200) from a Radio Frequency (RF) transceiver (3);
detecting a first preamble (5) in the frame (200);
detecting a plurality of timing synchronization symbols (6) subsequent to the detection of the first preamble (5);
performing timing recovery based on the received timing synchronization symbols (6);
detecting a second preamble (7) in the frame (200);
detecting a plurality of equalizer training symbols (8) subsequent to the detection of the second preamble (7);
configuring a Least Mean Square (LMS) equalizer in a training mode;
training the LMS equalizer based on the received equalizer training symbols (8) for obtaining channel equalization coefficients;
configuring the LMS equalizer in a decision directed mode;
detecting a third preamble (9) in the frame (200); and
detecting the payload (10) subsequent to the detection of the third preamble (9), wherein the LMS equalizer decodes the payload (10) based on the channel equalization coefficients in the decision directed mode, thereby recovering the payload (10).

7. The method as claimed in claim 6, comprising adjusting one or more taps of the LMS equalizer based on the received equalizer training symbols (8).

8. The method as claimed in claim 6, comprising detecting boundaries of the frame (200) based on the first preamble (5) and the third preamble (9).

9. The method as claimed in claim 6, comprising correcting errors in the decoded data using Forward Error Correction (FEC).

10. The method as claimed in claim 9, comprising correcting up to 25 symbol delay spread.
, Description:FORM 2
THE PATENTS ACT, 1970
(39 OF 1970)
&
THE PATENTS RULES, 2003

COMPLETE SPECIFICATION
[SEE SECTION 10, RULE 13]

SYNCHRONIZATION DEVICE AND SYNCHRONIZATION METHOD IN HIGH DATA RATE BACKHAUL COMMUNICATION SYSTEM

BHARAT ELECTRONICS LIMITED
WITH ADDRESS:
OUTER RING ROAD, NAGAVARA, BANGALORE 560045, INDIA

THE FOLLOWING SPECIFICATION PARTICULARLY DESCRIBES THE INVENTION AND THE MANNER IN WHICH IT IS TO BE PERFORMED.
FIELD OF INVENTION
[0001] The present disclosure relates generally to data communication systems and particularly to a system and a method for synchronization in a high data rate backhaul communication system.

BACKGROUND
[0002] In high data rate communication systems, frame synchronization is of utmost importance. In the high data rate communication systems having low signal to noise ratio (SNR), detecting a synchronization frame is difficult. Failure to detect the synchronization frame results into missing an entire frame. In prior-art techniques of synchronization, the synchronization frame or one or more synchronization bits in the frame are used for establishing synchronization between transmitter and receiver in the high data rate communication systems.
[0003] US Patent 7177369 describes methods, apparatuses and systems provided for identifying at least one multipath transmission delay within a reverse path data signal, determining at least one forward path pre-equalization parameter based on the transmission delay, and modifying a forward path data signal based on the forward path pre-equalization parameter. A reverse link transmission is used to help characterize the multipath delays that may exist between communicating devices. The reverse path data signal can include a training sequence or other like known/substantially known data that can be analyzed to detect transmission delays, especially delays that extend beyond established guard intervals.
[0004] US Patent 7310393 describes a method and an apparatus for the signal synchronization of an orthogonal frequency division multiplexing system including a delay conjugate multiplication module, a phase processor and an edge detector. It provides estimates for the boundaries of inter-symbol interference free region by utilizing the characteristics of a guard interval in combination with the techniques of the delay conjugate multiplication module, phase differential operation, symbol-by-symbol average operation, and edge detection. The method determines a fixed threshold for directly separating the inter-symbol interference region in a mobile environment to obtain an inter-symbol interference free version of symbol information.
[0005] However, the prior-art synchronization techniques are restricted, i.e. are able to correct up to a limited symbols delay spread, for instance, up to five symbol delay spread, and hence, are not efficient in the high data rate communication systems.
[0006] Therefore, there is still a need for a synchronization technique for efficient frame synchronization in the high data rate communication systems.

SUMMARY
[0007] This summary is provided to introduce concepts related to a synchronization device and a synchronization method in a high data rate backhaul communication system. This summary is neither intended to identify essential features of the present invention nor is it intended for use in determining or limiting the scope of the present invention.
[0008] In an embodiment of the present invention, a synchronizing device to recover payload in a frame in a high data rate backhaul system is provided. The synchronizing device includes a processor configured to receive the frame from a radio Frequency (RF) transceiver. The processor detects a first preamble in the frame. The processor detects a plurality of timing synchronization symbols subsequent to the detection of the first preamble. the processor is configured to perform timing recovery based on the received timing synchronization symbols. The processor detect a second preamble in the frame. The processor detect a plurality of equalizer training symbols subsequent to the detection of the second preamble. The processor is configured to train the LMS equalizer based on the received equalizer training symbols in a training mode to obtain channel equalization coefficients. The processor detects a third preamble in the frame. The processor is configured to detect the payload subsequent to the detection of the third preamble. The LMS equalizer is decodes the payload based on the channel equalization coefficients in a decision directed mode, thereby recovering the payload.
[0009] In another embodiment of the present invention, a synchronizing method for recovering a payload in a frame in a high data rate backhaul communication system is provided. The method ids performed by a processor. The method includes receiving the frame from a Radio Frequency (RF) transceiver. The method includes detecting a first preamble in the frame. The method includes detecting a plurality of timing synchronization symbols subsequent to the detection of the first preamble. The method includes performing timing recovery based on the received timing synchronization symbols. the method includes detecting a second preamble in the frame. The method includes detecting a plurality of equalizer training symbols subsequent to the detection of the second preamble. The method includes configuring a Least Mean Square (LMS) equalizer in a training mode. the method includes training the LMS equalizer based on the received equalizer training symbols for obtaining channel equalization coefficients. The method includes configuring the LMS equalizer in a decision directed mode. The method includes detecting a third preamble in the frame. The method includes detecting the payload subsequent to the detection of the third preamble. The LMS equalizer decodes the payload based on the channel equalization coefficients in the decision directed mode, thereby recovering the payload.
[0010] In an embodiment, the processor adjusts one or more taps of the LMS equalizer based on the received equalizer training symbols.
[0011] In an embodiment, the processor detects boundaries of the frame based on the first preamble and the third preamble.
[0012] In an embodiment, the processor corrects errors in the decoded payload using Forward Error Correction (FEC).
[0013] In an embodiment, the processor corrects up to 25 symbol delay spread.

BRIEF DESCRIPTION OF ACCOMPANYING DRAWINGS
[0014] The detailed description is described with reference to the accompanying figures.
[0015] Figure 1 illustrates a schematic block diagram of a high data rate backhaul communication system in accordance with an embodiment of the present invention.
[0016] Figure 2 illustrates a schematic frame format of a frame in a high data rate backhaul communication system in accordance with an embodiment of the present invention.
[0017] Figures 3a-3b illustrates flow chart of a synchronization method in a high data rate backhaul communication system in accordance with an embodiment of the present invention.

DETAILED DESCRIPTION
[0018] The various embodiments of the present disclosure provide a synchronization device and a synchronization method in a high data rate backhaul communication system.
[0019] In the following description, for purpose of explanation, specific details are set forth in order to provide an understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without these details.
[0020] One skilled in the art will recognize that embodiments of the present invention, some of which are described below, may be incorporated into a number of systems.
[0021] However, the systems and methods are not limited to the specific embodiments described herein. Further, structures and devices shown in the figures are illustrative of exemplary embodiments of the present invention and are meant to avoid obscuring of the present invention.
[0022] Furthermore, connections between components and/or modules within the figures are not intended to be limited to direct connections. Rather, these components and modules may be modified, re-formatted or otherwise changed by intermediary components and modules.
[0023] The appearances of the phrase “in an embodiment” in various places in the specification are not necessarily all referring to the same embodiment.
[0024] The present invention provides a synchronization device to recover a user data indicated by payload in a high data rate synchronization frame in a multipath fading environment. The synchronization device uses three preambles in the frame to achieve synchronization. After a first preamble is detected, the synchronization device starts timing recovery algorithm. After a second preamble is detected, the synchronization device uses training symbols in the frame to predict nature of fading environment using Least Mean Square (LMS) equalizer. A third preamble marks start of the payload. The LMS equalizer decodes the payload to recover the user data. The synchronization device performs Forward Error Correction (FEC) to correct errors in the payload.
[0025] Referring now to Figure 1, a schematic block diagram of a high data rate backhaul communication system (100) is shown in accordance with an embodiment of the present invention. The high data rate backhaul communication system (100) includes an ARM processor (1), a Field-Programmable Gate Array (FPGA) (2) (also referred to as “processor (2)”), an RF transceiver (3), and one or more antennas (4). In an embodiment, a synchronization device is realized through the processor (2).
[0026] The ARM processor (1) receives incoming data from Ethernet. The ARM processor (1) also performs source encoding and decoding and configuration of the RF transceiver (3). The FPGA (2) performs baseband signal processing. The FPGA (2) performs modulation and demodulation on the user data and the synchronization frame framing and de-framing. The FPGA (2) also performs the FEC encoding and decoding on the user data. The RF transceiver (3) converts baseband data for transmitting and from receiving RF signals over air. The antenna (4) is used for transmission and reception of the RF signals over the air.
[0027] Referring now to Figure 2, a schematic frame format of a frame (200) in the high data rate backhaul communication system (100) is shown in accordance with an embodiment of the present invention.
[0028] The frame (200) includes first through third preambles (5,7,9), timing synchronization symbols (6), equalizer training symbols (8) and user data in the payload (10). The frame (200) includes the first preamble (5) for RF ramp-down, ramp-up time and for RF settling and for starting the timing recovery algorithm. The timing synchronization symbols (6) are used for timing recovery using a known technique such as modified Gardner technique. The second preamble (7) is used to detect and start the training of the LMS equalizer. The frame (200) includes the equalizer training symbols (8) for estimation of received channel using known data symbols. The third preamble (9) is used for detecting the payload (10) indicative of start of actual information symbols. The payload (10) is stored in a data buffer for further processing.
[0029] The processor (2) receives the frame (200) and detects the first preamble (5) in the frame (200). After the detection of the first preamble (5), the processor (2) detects the timing synchronization symbols (6). The processor (2) performs the timing recovery based on the timing synchronization symbols (6). Thereafter, the processor (2) detects the second preamble (7). In timing synchronization, the processor (2) detects the optimal sample that has been transmitted in the presence of time varying channel (TVC). If proper sample is not estimated, it results in inter symbol interference (ISI). In an exemplary embodiment, the processor (2) implements Gardners timing recovery loop technique which is a phase locked loop that reduces the sampling phase error and locks to the optimal sampling instant in the steady state. Using this timing synchronization, the processor (2) estimates the optimal sample that has been transmitted.
[0030] After the detection of the second preamble (7), the processor (2) detects the equalizer training symbols (8). Thereafter, the LMS equalizer is trained in a training mode based on the equalizer training symbols (8). After training the LMS equalizer, the LMS equalizer is configured in a decision directed mode. Thereafter, the processor (2) detects the payload (10) indicative of the user data. The LMS equalizer decodes the payload (10) and recovers the user data indicated by the payload (10). Thereafter, the processor (2) corrects the errors in the user data by FEC techniques. The processor (2) stores the decoded payload in a buffer for further processing.
[0031] Referring now to Figures 3a-3b, a flow chart of a synchronization method in the high data rate backhaul communication system (100) is shown in accordance with an embodiment of the present invention.
[0032] At step 11, the baseband data is received from the RF transceiver (3). At steps 12-13, the processor (2) checks for the first preamble (5) and determines whether the first preamble (5) is detected. At step 14, once the first preamble (5) is detected, the processor (2) starts the symbol timing synchronization method. At steps 15-16, once the symbol timing method is locked, the processor (2) checks for the second preamble (7) and determines whether the second preamble (7) is detected. At step 17, once the second preamble (7) is detected, the LMS equalizer is trained with the equalizer training symbols (8). At step 18, once the LMS equalizer training is finished, the processor (2) executes step 19 where the channel equalizer coefficients are estimated. At step 20, the LMS equalizer is shifted to decision directed (DD) mode and the equalizer taps are adjusted. At step 21, the processor (2) checks for the third preamble (9). Once the third preamble (9) is detected, at step 22, the processor (2) decodes the payload (10). At step 23, the processor (2) stores the decoded payload in the data buffer for further processing. The decoded payload is provided to the FPGA (2) where the Ethernet frame is reconstructed after FEC.
[0033] The foregoing description of the invention has been set merely to illustrate the invention and is not intended to be limiting. Since modifications of the disclosed embodiments incorporating the spirit and substance of the invention may occur to person skilled in the art, the invention should be construed to include everything within the scope of the invention.