Abstract: The present disclosure provides a fifth generation (5G) new radio (NR) low band high power next generation Node B or a radio unit (100) operating in macro class. The radio unit (100) may include a fronthaul interface (102), an integrated baseband and transceiver board (IBTB) (104), a radio frequency front end board (RFEB) (106), and a duplexer filter and antenna interface unit (108). FIG. 1
FORM 2
THE PATENTS ACT, 1970
(39 of 1970)
THE PATENTS RULES, 2003
COMPLETE
SPECIFICATION
(See section 10; rule 13)
TITLE OF THE INVENTION
SYSTEM AND DESIGN METHOD OF A LOW BAND RADIO UNIT
APPLICANT
JIO PLATFORMS LIMITED
of Office-101, Saffron, Nr. Centre Point, Panchwati 5 Rasta, Ambawadi,
Ahmedabad - 380006, Gujarat, India; Nationality: India
The following specification particularly describes
the invention and the manner in which
it is to be performed
2
RESERVATION OF RIGHTS
A portion of the disclosure of this patent document contains material, which is
subject to intellectual property rights such as, but are not limited to, copyright,
design, trademark, Integrated Circuit (IC) layout design, and/or trade dress
5 protection, belonging to Jio Platforms Limited (JPL) or its affiliates (hereinafter
referred as owner). The owner has no objection to the facsimile reproduction by
anyone of the patent document or the patent disclosure, as it appears in the Patent
and Trademark Office patent files or records, but otherwise reserves all rights
whatsoever. All rights to such intellectual property are fully reserved by the owner.
10
FIELD OF DISCLOSURE
[0001] The embodiments of the present disclosure generally relate to a radio
unit architecture. In particular, the present disclosure relates to a design of hardware
architecture of fifth generation (5G) new radio (NR) low band radio unit for
15 standalone mode.
BACKGROUND OF DISCLOSURE
[0002] The following description of related art is intended to provide
background information pertaining to the field of the disclosure. This section may
20 include certain aspects of the art that may be related to various features of the
present disclosure. However, it should be appreciated that this section be used only
to enhance the understanding of the reader with respect to the present disclosure,
and not as admissions of prior art.
[0003] Evolving communication outreach necessitates radio units capable
25 of providing deep coverage in dense urban, medium urban, and rural morphologies.
Further, the radio unit is required to provide deep indoor coverage as well.
Increasing structural difficulty demands a more compact and a lightweight radio
unit.
[0004] Furthermore, the presently available radio units face isolation issues,
30 resulting in malfunctioning while operating in a low band environment.
SYSTEM AND DESIGN METHOD OF A LOW BAND RADIO UNIT
3
[0005] There is, therefore, a need in the art to provide an improved hardware
architecture that can overcome the shortcomings of the existing prior arts.
SUMMARY
5 [0006] In an exemplary embodiment, a radio unit (RU) is described. The
RU comprises an integrated baseband and transceiver board (IBTB) configured to
provide an interface for a plurality of radio frequency (RF) transceiver chains based
on an integrated circuit. The IBTB comprises a lower layer physical (PHY)
component in a network layer, an open radio access network (ORAN) compliant
10 fronthaul on an optical interface. The RU comprises an antenna, a first blind mate,
a second blind mate. The RU further comprises a radio frequency (RF) frond end
(FE) board communicatively coupled to the IBTB. The RFEB comprises the
transceiver chains and an observation chain. The RFEB is configured to interface
the antenna and IBTB. The RU comprises a duplexer filter comprising at least one
15 port for transmission chains, at least one port for receiver chains and at least one
port for the antenna. The duplexer filter is configured to provide isolation between
the transmitter chain, and the receiver chain and a steeper roll-off outside operating
band.
[0007] In some embodiments, the RFEB comprises a driver amplifier, a
20 digital step attenuator, a power amplifier (PA), and a circulator.
[0008] In some embodiments, the IBTB further comprises a clock section
including a system synchronizer and clock generator module. The system
synchronizer and clock generator module are configured to provide precision time
protocol (PTP) based clock synchronization on 10G optical interface.
25 [0009] In some embodiments, the duplexer filter is an integrated 4 x 4 high
power duplexer.
[0010] In some embodiments, the RFEB is configured to receive a plurality
control signals from the IBTB along with a power supply through a connector.
[0011] In some embodiments, the RFEB is connected on the first blind mate
30 with the IBTB and on the second blind mate with the duplexer filter.
4
[0012] In some embodiments, the RU is configured to compensate system
gain variation with respect to temperature in a downlink.
[0013] In some embodiments, the RU is configured to reduce a system noise
figure with digital control.
5 [0014] In some embodiments, the IBTB further comprises a digital up
converter (DUC), a digital down converter (DDC), a channel frequency response
(CFR), a digital pre-distortion (DPD), a digital step attenuator, and a low noise
amplifier (LNA).
[0015] In some embodiments, the RU further comprises a printed circuit
10 board (PCB). The PCB comprises high direct current (DC) power system, plurality
of high-speed interfaces running up to 10G, and a high-power RF system into a
board including plurality of layers.
OBJECTS OF THE PRESENT DISCLOSURE
15 [0016] Some of the objects of the present disclosure, which at least one
embodiment herein satisfies are as listed herein below.
[0017] An object of the present disclosure to provide a radio unit comprising
lower layer physical (PHY) section with split 7.2X.
[0018] An object of the present disclosure is to provide a radio unit
20 comprising open radio access network (ORAN) compliant Fronthaul on 10 gigabit
(10G) optical interface.
[0019] An object of the present disclosure is to provide a radio unit
comprising digital front end support using commercial grade field programmable
gate array (FPGA)/application specific integrated circuit (ASIC) and multiple radio
25 frequency (RF) transceiver chains.
[0020] An object of the present disclosure is to provide a radio unit with an
increased isolation between transmitter and receiver chains and a steeper roll-off
outside the operating band.
[0021] An object of the present invention is to provide a radio unit operable
30 in low frequency band range.
5
[0022] An object of the present disclosure is to provide a radio unit
comprising precision time protocol (PTP) based clock synchronization architecture.
[0023] An object of the present disclosure is to provide a radio unit
comprising an integrated 4 x 4 high power duplexer to support frequency division
5 duplex (FDD) system.
[0024] An object of the present disclosure is to provide a radio unit
comprising blind mated and cable less design.
[0025] An object of the present disclosure is to provide a radio unit having
a low weight and a compact form factor.
10 [0026] An object of the present disclosure is to provide a radio unit
comprising an advanced printed circuit board (PCB) design to include high direct
current (DC) power system, complex high-speed interfaces running up to 10G, and
high-power RF system into a single eighteen or more layers board.
[0027] An object of the present disclosure is to provide a radio unit having
15 a reduced noise figure and techniques to compensate system gain variations in
downlink due to temperature.
BRIEF DESCRIPTION OF DRAWINGS
[0028] The accompanying drawings, which are incorporated herein, and
20 constitute a part of this disclosure, illustrate exemplary embodiments of the
disclosed methods and systems in which like reference numerals refer to the same
parts throughout the different drawings. Components in the drawings are not
necessarily to scale, emphasis instead being placed upon clearly illustrating the
principles of the present disclosure. Some drawings may indicate the components
25 using block diagrams and may not represent the internal circuitry of each
component. It will be appreciated by those skilled in the art that disclosure of such
drawings includes the disclosure of electrical components, electronic components
or circuitry commonly used to implement such components.
[0029] FIG. 1 illustrates an exemplary high-level architecture of a 4T4R
30 fifth generation (5G) new radio (NR) low band radio unit (100), in accordance with
some embodiments of the present disclosure.
6
[0030] FIG. 2 illustrates an exemplary high-level architecture of an
Integrated Baseband and Transceiver Board (200) of the 4T4R 5G NR low band
radio unit, in accordance with some embodiments of the present disclosure.
[0031] FIG. 3 illustrates an exemplary block diagram of a single chain of
5 4T4R RF front end board (300), in accordance with some embodiments of the
present disclosure.
[0032] FIG. 4 illustrates an exemplary 4T4R 5G NR low band radio unit
(400), in accordance with some embodiments of the present disclosure.
[0033] FIG. 5 illustrates an exemplary coupling representation of a user
10 equipment with the radio unit, in accordance with some embodiments of the present
disclosure.
[0034] FIG. 6 illustrates an exemplary computer system (500) in which or
with which the 4T4R 5G NR low band radio unit may be implemented, in
accordance with some embodiments of the present disclosure.
15 [0035] The foregoing shall be more apparent from the following more
detailed description of the disclosure.
List of elements:
100 NR low band radio unit
20 102 fronthaul interface
104 IBTB
106 RFEB
108 antenna interface unit
110 connector
25 200 transceiver board
202 RF transceiver
204 clock interface
206 front haul interface
208 interface
30 210 interface
212 interface
7
214 flash memory interface
216 radio frequency transceiver inter-faces
218 radio frequency transceiver inter-faces
220 interface
5 222 RGMII interface
224 interface
226 power supply interface
228 RF section controller
240W deliver
10 300 RFEB
302 pre-driver amplifier
304 pi-pads
306 driver
308 PAs
15 310 coupler
312 isolator
314 RF connector
316 DPD selector
400 NR low band radio unit
20 402 RET connector
404 pipe
412 power interface
414 n-type connectors
502 UE
25 504 wireless network
506 base station
600 exemplary computer system
610 external storage device
620 bus
30 630 main memory
640 read-only memory
8
650 mass storage device
670 processor
DETAILED DESCRIPTION OF DISCLOSURE
5 [0036] In the following description, for the purposes of explanation, various
specific details are set forth in order to provide a thorough understanding of
embodiments of the present disclosure. It will be apparent, however, that
embodiments of the present disclosure may be practiced without these specific
details. Several features described hereafter can each be used independently of one
10 another or with any combination of other features. An individual feature may not
address all of the problems discussed above or might address only some of the
problems discussed above. Some of the problems discussed above might not be
fully addressed by any of the features described herein.
[0037] The ensuing description provides exemplary embodiments only, and
15 is not intended to limit the scope, applicability, or configuration of the disclosure.
Rather, the ensuing description of the exemplary embodiments will provide those
skilled in the art with an enabling description for implementing an exemplary
embodiment. It should be understood that various changes may be made in the
function and arrangement of elements without departing from the spirit and scope
20 of the disclosure as set forth.
[0038] Specific details are given in the following description to provide a
thorough understanding of the embodiments. However, it will be understood by one
of ordinary skill in the art that the embodiments may be practiced without these
specific details. For example, circuits, systems, networks, processes, and other
25 components may be shown as components in block diagram form in order not to
obscure the embodiments in unnecessary detail. In other instances, well-known
circuits, processes, algorithms, structures, and techniques may be shown without
unnecessary detail in order to avoid obscuring the embodiments.
[0039] Also, it is noted that individual embodiments may be described as a
30 process which is depicted as a flowchart, a flow diagram, a data flow diagram, a
structure diagram, or a block diagram. Although a flowchart may describe the
9
operations as a sequential process, many of the operations can be performed in
parallel or concurrently. In addition, the order of the operations may be re-arranged.
A process is terminated when its operations are completed but could have additional
steps not included in a figure. A process may correspond to a method, a function, a
5 procedure, a subroutine, a subprogram, etc. When a process corresponds to a
function, its termination can correspond to a return of the function to the calling
function or the main function.
[0040] The word “exemplary” and/or “demonstrative” is used herein to
mean serving as an example, instance, or illustration. For the avoidance of doubt,
10 the subject matter disclosed herein is not limited by such examples. In addition, any
aspect or design described herein as “exemplary” and/or “demonstrative” is not
necessarily to be construed as preferred or advantageous over other aspects or
designs, nor is it meant to preclude equivalent exemplary structures and techniques
known to those of ordinary skill in the art. Furthermore, to the extent that the terms
15 “includes,” “has,” “contains,” and other similar words are used in either the detailed
description or the claims, such terms are intended to be inclusive—in a manner
similar to the term “comprising” as an open transition word—without precluding
any additional or other elements.
[0041] Reference throughout this specification to “one embodiment” or “an
20 embodiment” or “an instance” or “one instance” means that a particular feature,
structure, or characteristic described in connection with the embodiment is included
in at least one embodiment of the present disclosure. Thus, the appearances of the
phrases “in one embodiment” or “in an embodiment” in various places throughout
this specification are not necessarily all referring to the same embodiment.
25 Furthermore, the particular features, structures, or characteristics may be combined
in any suitable manner in one or more embodiments.
[0042] The terminology used herein is for the purpose of describing
particular embodiments only and is not intended to be limiting of the disclosure. As
used herein, the singular forms “a”, “an” and “the” are intended to include the plural
30 forms as well, unless the context clearly indicates otherwise. It will be further
understood that the terms “comprises” and/or “comprising,” when used in this
10
specification, specify the presence of stated features, integers, steps, operations,
elements, and/or components, but do not preclude the presence or addition of one
or more other features, integers, steps, operations, elements, components, and/or
groups thereof. As used herein, the term “and/or” includes any and all combinations
5 of one or more of the associated listed items.
[0043] Certain terms and phrases have been used throughout the disclosure
and will have the following meanings in the context of the ongoing disclosure.
[0044] The term “5G NR low band radio unit” may refer to a fifthgeneration new radio low band radio unit operating in the 700-800 megahertz
10 (MHZ) frequency range.
[0045] The term “4T4R” may refer to a 4x4 multi-input multi-output
(MIMO) antenna, employing four antennas to establish up to four streams of data
with a receiving device.
[0046] The various embodiments throughout the disclosure will be
15 explained in more detail with reference to FIGs. 1-5.
[0047] FIG. 1 illustrates an exemplary high-level architecture of a 4T4R 5G
NR low band radio unit (100), in accordance with some embodiments of the present
disclosure.
[0048] Referring to FIG. 1, the radio unit (100) may include a fronthaul
20 interface (102), an integrated baseband and transceiver board (IBTB) (104), a radio
frequency front end board (RFEB) (106), and a duplexer filter and antenna interface
unit (108). The radio unit (100) comprises a 5G NR low band high power NR node
B operating in macro class. The macro class includes a power level of ≤ 47.8 dBm
per antenna port and complements macro-level wide-area solutions for deep indoor
25 coverage. Referring to FIG. 1, the radio unit (100) may be connected to a central
unit (CU) and distributed unit (DU) on the fronthaul interface (102) using a 10G
optical interface and may be open radio access network (ORAN) compliant. The
DU handles radio resource control (RRC)/packet data convergence protocol
(PDCP)/radio link control (RLC)/medium access control (MAC), and higher
30 physical (PHY) layer functions.
11
[0049] Referring to FIG. 1, the IBTB (104) includes baseband and
transceiver (104-2) serving as an RF interface for the RFEB (106) and an
application specific integrated circuit (ASIC)/field programmable gate array
(FPGA) chipset handling the lower PHY layer functions comprising, without
5 limitations, digital up converter (DUC), digital down converter (DDC), channel
frequency response (CFR), digital pre-distortion (DPD), digital step attenuator, and
low noise amplifier (LNA). It may be appreciated that the IBTB board architecture
is explained in detail below with reference to FIG. 2.
[0050] Referring to FIG. 1, the RFEB (106) receives control signals from
10 the IBTB (104) along with a power supply through a connector (110-2). The
connector (110-2) is a blind mate type of connector. The RFEB (106) consists of
four transmit chains (106-2) for signal transmission and one observation chain (106-
4) comprising driver amplifier, digital step attenuator, power amplifier (PA), and
circulator. It may be appreciated that the RFEB (106) is explained in detail below
15 with reference to FIG. 3.
[0051] Referring to FIG. 1, the RFEB (106) is connected to the duplexer
filter and antenna interface unit or duplexer (108) through a connector (110-4). The
RFEB (106) is blind mated with the duplexer (108). The duplexer filter consists of
4-ports for transmitter (Tx) chains, 4-ports for receiver (Rx) chains, and 4-ports for
20 antenna for 4T4R or 4x4 MIMO configuration. The duplexer provides high
isolation between Tx and Rx chains and steeper roll-off outside operating band. The
steeper roll-off outside operating band provides attenuation of the signals rapidly
outside the operating band. Due to the design, the duplexer provides passband
response and thereby causing attenuation of signals outside the operating band. The
25 duplexer may include, without limitations, a metallic cavity filter providing
protection of Rx path from strong Tx signal of the same radio unit (100). The
duplexer also provides protection from external out-of-band interferers and
prevents mask violation at the Tx band. In some embodiments, the duplexer may
be considered as a 3-port frequency division duplexer (FDD) device. The FDD acts
30 as a filter enabling the radio unit (100) to achieve complete isolation between the
transmitter and the receiver portions, which are on different boards, but working in
12
the same time frame (simultaneous). This enables the radio unit (100) to operate in
low band environment.
[0052] FIG. 2 illustrates an exemplary high-level architecture of an
Integrated Baseband and Transceiver Board (200) of the 4T4R 5G NR low band
5 radio unit, in accordance with some embodiments of the present disclosure.
[0053] The IBTB (200) includes ASIC/FPGA chip with RF transceiver
(202). In FIG. 2, various interface circuitry are present in the IBTB (200), such as,
a clock interface (204), a front haul interface (206), a remote electrical tilt (RET)
interface (208), interface to peripheral memory circuits or memory section such as,
10 without limitations, a Double Data Rate Fourth Generation Synchronous Dynamic
Random-Access Memory (DDR4) interface (210), an embedded Multi Media Card
(eMMC) interface (212), and a flash memory interface (214). The IBTB (200)
further includes a power supply interface (226), a universal serial bus
(USB)/universal asynchronous receiver transmitter (UART) interface (224), a
15 reduced gigabit media-independent interface (RGMII) (222), a joint test action
group (JTAG) interface (220), and radio frequency transceiver interfaces (216,
218). The clock interface (204) is connected to a clock section (204-2) including a
system synchronizer and clock generator module, the front haul interface or 10G
interface (206) is associated with Small Form-Factor Pluggable Plus (SFP+) cage
20 connector (206-2), and the RET interface (208) is associated with antenna interface
standards group (AISG 2.0/3.0) (208-2), surge protection (208-4), and RS-485
transceiver (208-6). Further, the memory interfaces including the DDR4 interface
(210) is associated with DDR4 (210-2), the eMMC interface (212) is associated
with the eMMC (212-2), and the flash memory interface (214) is associated with
25 electrically erasable programmable read only memory (EEPROM) (214-2) in the
memory section. The EEPROM (214-2) may include NAND/NOR type of flash
memory section. The power interface (226) is connected to a power supply section
(226-2) comprising 48V to 12V direct current (DC) convertor (226-4) and a 48Vto-48V direct current (DC) convertor (226-6). The USB/UART interface (224) is
30 connected to a USB port (224-2), the RGMII interface (222) is connected to a RJ45 connector (222-4) through a physical layer interface (222-2), the JTAG interface
13
(220) is connected to a JTAG debug emulator (220-4) through a JTAG connector
(220-2), and the RF transceiver interfaces (216, 218) interact with RF analog section
(218-2) and are controlled by an RF section controller (228).
[0054] Referring to FIG. 2, an analog section of ASIC/FPGA (not shown)
5 of IBTB (200) includes an interface to an analog to digital converter (ADC) (not
shown) and a digital to analog converter (DAC) (not shown). The ADC and DAC
interface from ASIC/FPGA analog section connect with four receive chains and
four low power transmitter chains, which is further connected with a highperformance PA in the RFEB explained below with reference to FIG. 3. The ADC
10 and DAC interface connected to the PA in RFEB delivers a desired output. The
IBTB (200) further includes an observation chain which acts as DPD feedback path
from PAs (308) of FIG. 3 in the RFEB (300) of FIG. 3 to ASIC/FPGA for
linearization.
[0055] Referring to FIG. 2, the clock interface (204) includes precision time
15 protocol (PTP) for synchronizing the entire radio unit (100) of FIG. 1. The complete
system, i.e., the entire radio unit (100) of FIG. 1 is synchronized within the IBTB
(200) through PTP on 10G fronthaul interface (206) while running PTP client to on
board synchronization circuit, for example, the clock section (204-2). The clock
section (204-2) includes clock generator circuit comprising ultra-low noise clock
20 generation phased lock loops (PLLs), programmable oscillator, and a system
synchronizer. In an embodiment, the IBTB (200) comprising FPGA/ASICs based
RF transceivers (202), digital high-speed signals, switching power supplies, clock
section (204-2), and radio frequency signal, is designed on eighteen or more layers
printed circuit board (PCB). The PCB layer design includes techniques to route RF
25 signals and high speed 10GT/s to adjacent layers.
[0056] FIG. 3 illustrates an exemplary block diagram of a single chain of
4T4R RF front end board (300), in accordance with some embodiments of the
present disclosure.
[0057] The RFEB (300) receives control signals from IBTB along with
30 power supply through a connector (110-2) as shown in FIG. 1. The connector (110-
2) is a blind mate type of connector. The RFEB (300) includes four transmit chains
14
(106-2) for signal transmission and an observation chain (106-4). The observation
chain (106-4) provides DPD feedback paths from PAs to ASIC transceiver for
linearization. In FIG. 3, a single transmit chain including a pre-driver amplifier
(302), pi-pads (304) for providing attenuation, a driver (306), a PA (308), a coupler
5 (310), an isolator (312), an RF connector (314), and a DPD selector (316) are
shown. The transmitter chain further includes a balance-unbalance (Balun)
interface (not shown) for matching balanced load with unbalanced load. Each
observation line carries the directional coupler (310), digital step attenuator (DSA),
and matching network. A circulator and a 4 x 4 duplexer filter are used between
10 each Rx chain, Tx chain, and antenna port to achieve isolation.
[0058] Referring to FIG. 3, the RFEB (300) may be developed on a
multilayer substrate using embedded copper coin technology for high power
laterally diffused metal oxide semiconductor (LDMOS) based PA (308) to deliver
240W output power efficiently. The RFEB (300) on one end blind mates (110-2)
15 with the IBTB (104) of FIG. 1 and on another end blind mates (110-4) with the
duplexer filter (108) of FIG. 1. The blind mating provides robust connection
between IBTB (104) of FIG. 1 and RFEB (300), and avoids the complexity of cable
routing, thereby eliminating/reducing RF signal oscillations. FIG. 4 illustrates an
exemplary 4T4R 5G NR low band radio unit (400), in accordance with some
20 embodiments of the present disclosure.
[0059] In FIG. 4, a hardware snapshot of the 4T4R 5G NR low band radio
unit (400) is shown. The radio unit (400) includes an RET connector (402) which
may be used as an antenna interface, a light emitting diode (LED) pipe (404)
providing visual indication of one or more alarms, a USB-2 port (406) providing
25 debugging connections, optical little connectors (LC) (408, 410) providing 10G
front haul interfaces, and a power interface (412) for connecting to external power,
for example, a 48V DC supply. The radio unit (400) further includes a plurality of
N-type connectors (414) for receiving antenna type inputs. The 5G NR low band
radio unit (400) also includes gain control unit that is configured to control a system
30 gain. Due to variations in temperature, some components may experience
variations in their operating range leading to change in variation in system gain.
15
The gain control unit increases the system gain when the system gain decreases
beyond a first threshold due to temperature, and decreases the system gain when
the system gain increases a second threshold due to temperature. In some examples,
an automatic gain control (AGC) may be used. In some examples, feedback-based
5 gain control may be used as the gain control unit. Other examples not described
here are contemplated herein. A person of ordinary skill in the art will appreciate
that these are mere examples, and in no way, limit the scope of the present
disclosure.
[0060] FIG. 5 illustrates an exemplary coupling representation of a user
10 equipment (UE) with the MRU. As illustrated, the UE (502) may be communicatively
coupled to the radio unit (100) associated with base station (506). The coupling can
be through a wireless network 504. In an exemplary embodiment, the communication
network (504) may include, by way of example but not limitation, at least a portion
of one or more networks having one or more nodes that transmit, receive, forward,
15 generate, buffer, store, route, switch, process, or a combination thereof, etc., one or
more messages, packets, signals, waves, voltage or current levels, some combination
thereof, or so forth. The UE (502) can be any handheld device, mobile device,
palmtop, laptop, smart phone, pager and the like. As a result of the coupling, the
UE (502) may be configured to receive a connection request from the radio unit
20 (100), send an acknowledgment of connection request to the radio unit (100) and
further transmit a plurality of signals in response to the connection request.
[0061] In an aspect, the radio unit (100) may be implemented in an
apparatus (not shown in FIG. 5). In some examples, the apparatus may include but
are not limited to repeaters, wireless routers, access points, two-way radios and base
25 stations. As shown in the FIG. 5, the apparatus is shown to be mounted on the base
station (506).
[0062] FIG. 6 illustrates an exemplary computer system (600) in which or
with which the 4T4R 6G NR low band radio unit may be implemented, in
accordance with some embodiments of the present disclosure.
30 [0063] As shown in FIG. 5, the computer system (600) may include an
external storage device (610), a bus (620), a main memory (630), a read-only
16
memory (640), a mass storage device (650), communication port(s) (660), and a
processor (670). A person skilled in the art will appreciate that the computer system
(600) may include more than one processor and communication ports. The
processor (670) may include various modules associated with embodiments of the
5 present disclosure. The communication port(s) (660) may be any of an RS-232 port
for use with a modem-based dialup connection, a 10/100 Ethernet port, a Gigabit
or 10 Gigabit port using copper or fiber, a serial port, a parallel port, or other
existing or future ports. The communication port(s) (660) may be chosen depending
on a network, such a Local Area Network (LAN), Wide Area Network (WAN), or
10 any network to which the computer system (600) connects. The main memory (630)
may be random access memory (RAM), or any other dynamic storage device
commonly known in the art. The read-only memory (640) may be any static storage
device(s) including, but not limited to, a Programmable Read Only Memory
(PROM) chips for storing static information e.g., start-up or basic input/output
15 system (BIOS) instructions for the processor (670). The mass storage device (650)
may be any current or future mass storage solution, which may be used to store
information and/or instructions.
[0064] The bus (620) communicatively couples the processor (670) with the
other memory, storage, and communication blocks. The bus (620) can be, e.g. a
20 Peripheral Component Interconnect (PCI) / PCI Extended (PCI-X) bus, Small
Computer System Interface (SCSI), universal serial bus (USB), or the like, for
connecting expansion cards, drives, and other subsystems as well as other buses,
such a front side bus (FSB), which connects the processor (670) to the computer
system (600).
25 [0065] Optionally, operator and administrative interfaces, e.g. a display,
keyboard, and a cursor control device, may also be coupled to the bus (620) to
support direct operator interaction with the computer system (600). Other operator
and administrative interfaces may be provided through network connections
connected through the communication port(s) (660). In no way should the
30 aforementioned exemplary computer system (600) limit the scope of the present
disclosure.
17
[0066] While considerable emphasis has been placed herein on the preferred
embodiments, it will be appreciated that many embodiments can be made and that
many changes can be made in the preferred embodiments without departing from
the principles of the disclosure. These and other changes in the preferred
5 embodiments of the disclosure will be apparent to those skilled in the art from the
disclosure herein, whereby it is to be distinctly understood that the foregoing
descriptive matter to be implemented merely as illustrative of the disclosure and not
as limitation.
10 ADVANTAGES OF THE PRESENT DISCLOSURE
[0067] The present disclosure provides a 4T4R 5G NR low band radio unit
comprising lower layer physical (PHY) section, an open radio access network
(ORAN) compliant fronthaul on 10G optical interface, a digital front-end support
based on commercial grade field programmable gate array (FPGA)/application
15 specific integrated circuit (ASIC), and a plurality of radio frequency (RF)
transceiver chains integrated on highly dense four or more layers board.
[0068] The present disclosure provides an integrated duplexer filter blind
mated with an integrated baseband and transceiver board (IBTB) and an RF front
end board (RFEB) resulting in cable less connection.
20 [0069] The present disclosure provides a light weight, compact form factor,
and low power consumption radio unit including IP65 ingress protected mechanical
housing for proper thermal handling.
[0070] The present disclosure provides a radio unit with a frequency
division duplexer filter enabling complete isolation between the transmitter and the
25 receiver portions.
[0071] The present disclosure provides a multilayer substrate for high
power amplifier to accommodate the complex RF and digital signal routing in
RFEB.
[0072] The present disclosure provides the radio unit with a blind mated and
30 cable less design.
18
[0073] The present disclosure provides the radio unit with a controlled
channel gain, thereby reducing the noise figure.
[0074] The radio unit of the present disclosure provides increased coverage
for indoors and high-rise buildings with enhanced data download rates for outdoor.
5 [0075] The present disclosure provides multiple mounting options for the
radio unit enabling deployment flexibility across a wide range of use cases, and
therefore, is capable of serving vast customer base with superior connectivity.
19
WE CLAIM:
1. A radio unit (RU) (100) comprising:
5 an integrated baseband and transceiver board (200) (IBTB (104))
configured to provide an interface (206) for a plurality of radio frequency
(RF) transceiver chains (106) based on an integrated circuit, IBTB (104)
an antenna;
a first blind mate;
10 a second blind mate;
a radio frequency frond end board (RFEB (106)) communicatively
coupled to the IBTB (104) comprising the transceiver chains (106) and an
observation chain (106), configured to interface (206) the antenna and the
IBTB (104); and
15 a duplexer filter (108) comprising at least one port for transmission
chains (106), at least one port for receiver chains (106) and at least one port
for the antenna, configured to provide isolation between transmitter chain,
and receiver chain and a steeper roll-off outside operating band.
20 2. The RU claimed as in claim 1, wherein the RFEB (106) comprises a driver
(306) amplifier, a digital step attenuator, a power amplifier (PA), and a
circulator.
3. The RU claimed as in claim 1, wherein the IBTB (104) comprises a lower
25 layer physical (PHY) component in a network layer, an open radio access
network (ORAN) compliant fronthaul on an optical interface (206), and a
clock section (204) including a system synchronizer and clock generator
module, wherein the system synchronizer and clock generator module is
configured to provide precision time protocol (PTP) based clock
30 synchronization on the optical interface (206).
20
4. The RU claimed as in claim 1, wherein the duplexer filter (108) is an
integrated 4 x 4 high power duplexer (108).
5. The RU claimed as in claim 1, wherein the RFEB (106) is configured to
5 receive a plurality control signals from the IBTB (104) along with a power
supply through a connector (110).
6. The RU claimed as in claim 1, wherein the RFEB (106) is connected on the
first blind mate with the IBTB (104) and on the second blind mate with the
10 duplexer filter (108).
7. The RU claimed as in claim 1, the RU is configured to increase the system
gain when the system gain decreases beyond a first threshold responsive to
temperature, and decrease the system gain when the system gain increases
15 a second threshold responsive to the temperature.
8. The RU claimed as in claim 1, the RU is configured to reduce a system noise
figure with digital control.
20 9. The RU claimed as in claim 1, wherein the IBTB (104) further comprises a
digital up converter (DUC), a digital down converter (DDC), a channel
frequency response (CFR), a digital pre-distortion (DPD), a digital step
attenuator, and a low noise amplifier (LNA).
25 10. The RU claimed as in claim 1 further comprising a printed circuit board
(PCB), the PCB comprises high direct current (DC) power system, plurality
of high-speed interfaces running up to 10G, and a high-power RF system
into a board including plurality of layers.
30 11. An apparatus comprising the radio unit (100) as claimed in claim 1.
21
12. A user equipment (UE) (502) communicatively coupled with a radio unit
(100) (RU),
said coupling comprises steps of:
receiving a connection request;
5 sending an acknowledgment of the connection request to the radio unit
(100);
transmitting a plurality of signals in response to the connection
request, wherein said radio unit (100) comprising a duplexer filter (108) as
claimed in claim 1.
10
Dated this 09 day of April 2024
| # | Name | Date |
|---|---|---|
| 1 | 202321030830-STATEMENT OF UNDERTAKING (FORM 3) [29-04-2023(online)].pdf | 2023-04-29 |
| 2 | 202321030830-PROVISIONAL SPECIFICATION [29-04-2023(online)].pdf | 2023-04-29 |
| 3 | 202321030830-POWER OF AUTHORITY [29-04-2023(online)].pdf | 2023-04-29 |
| 4 | 202321030830-FORM 1 [29-04-2023(online)].pdf | 2023-04-29 |
| 5 | 202321030830-DRAWINGS [29-04-2023(online)].pdf | 2023-04-29 |
| 6 | 202321030830-DECLARATION OF INVENTORSHIP (FORM 5) [29-04-2023(online)].pdf | 2023-04-29 |
| 7 | 202321030830-RELEVANT DOCUMENTS [14-02-2024(online)].pdf | 2024-02-14 |
| 8 | 202321030830-POA [14-02-2024(online)].pdf | 2024-02-14 |
| 9 | 202321030830-FORM 13 [14-02-2024(online)].pdf | 2024-02-14 |
| 10 | 202321030830-AMENDED DOCUMENTS [14-02-2024(online)].pdf | 2024-02-14 |
| 11 | 202321030830-Request Letter-Correspondence [19-02-2024(online)].pdf | 2024-02-19 |
| 12 | 202321030830-Power of Attorney [19-02-2024(online)].pdf | 2024-02-19 |
| 13 | 202321030830-Covering Letter [19-02-2024(online)].pdf | 2024-02-19 |
| 14 | 202321030830-CORRESPONDENCE (IPO)(WIPO DAS)-22-02-2024.pdf | 2024-02-22 |
| 15 | 202321030830-ENDORSEMENT BY INVENTORS [09-04-2024(online)].pdf | 2024-04-09 |
| 16 | 202321030830-DRAWING [09-04-2024(online)].pdf | 2024-04-09 |
| 17 | 202321030830-CORRESPONDENCE-OTHERS [09-04-2024(online)].pdf | 2024-04-09 |
| 18 | 202321030830-COMPLETE SPECIFICATION [09-04-2024(online)].pdf | 2024-04-09 |
| 19 | 202321030830-ENDORSEMENT BY INVENTORS [22-04-2024(online)].pdf | 2024-04-22 |
| 20 | 202321030830-ORIGINAL UR 6(1A) FORM 26-090524.pdf | 2024-05-15 |
| 21 | Abstract1.jpg | 2024-06-07 |
| 22 | 202321030830-FORM-9 [30-09-2024(online)].pdf | 2024-09-30 |
| 23 | 202321030830-FORM 18A [01-10-2024(online)].pdf | 2024-10-01 |
| 24 | 202321030830-FORM 3 [07-11-2024(online)].pdf | 2024-11-07 |
| 25 | 202321030830-FER.pdf | 2024-12-05 |
| 26 | 202321030830-FORM 3 [11-12-2024(online)].pdf | 2024-12-11 |
| 27 | 202321030830-FORM 3 [11-12-2024(online)]-1.pdf | 2024-12-11 |
| 28 | 202321030830-FER_SER_REPLY [24-12-2024(online)].pdf | 2024-12-24 |
| 29 | 202321030830-US(14)-HearingNotice-(HearingDate-27-02-2025).pdf | 2025-01-31 |
| 30 | 202321030830-FORM-26 [12-02-2025(online)].pdf | 2025-02-12 |
| 31 | 202321030830-Correspondence to notify the Controller [12-02-2025(online)].pdf | 2025-02-12 |
| 32 | 202321030830-FORM 3 [05-03-2025(online)].pdf | 2025-03-05 |
| 33 | 202321030830-FORM 3 [05-03-2025(online)]-1.pdf | 2025-03-05 |
| 34 | 202321030830-Written submissions and relevant documents [13-03-2025(online)].pdf | 2025-03-13 |
| 35 | 202321030830-Retyped Pages under Rule 14(1) [13-03-2025(online)].pdf | 2025-03-13 |
| 36 | 202321030830-MARKED COPY [13-03-2025(online)].pdf | 2025-03-13 |
| 37 | 202321030830-CORRECTED PAGES [13-03-2025(online)].pdf | 2025-03-13 |
| 38 | 202321030830-Annexure [13-03-2025(online)].pdf | 2025-03-13 |
| 39 | 202321030830-2. Marked Copy under Rule 14(2) [13-03-2025(online)].pdf | 2025-03-13 |
| 40 | 202321030830-US(14)-ExtendedHearingNotice-(HearingDate-17-06-2025)-1500.pdf | 2025-05-27 |
| 41 | 202321030830-Correspondence to notify the Controller [14-06-2025(online)].pdf | 2025-06-14 |
| 42 | 202321030830-REQUEST FOR CERTIFIED COPY [19-06-2025(online)].pdf | 2025-06-19 |
| 43 | 202321030830-Written submissions and relevant documents [30-06-2025(online)].pdf | 2025-06-30 |
| 44 | 202321030830-Retyped Pages under Rule 14(1) [30-06-2025(online)].pdf | 2025-06-30 |
| 45 | 202321030830-FORM 3 [30-06-2025(online)].pdf | 2025-06-30 |
| 46 | 202321030830-2. Marked Copy under Rule 14(2) [30-06-2025(online)].pdf | 2025-06-30 |
| 47 | 202321030830-PatentCertificate17-07-2025.pdf | 2025-07-17 |
| 48 | 202321030830-IntimationOfGrant17-07-2025.pdf | 2025-07-17 |
| 1 | SearchStrategyE_02-12-2024.pdf |