Claims:

1. A decision controller device 102 in a process control system to avoid nuisance tripping, the decision controller device 102 comprising:
an input communication line 104 to receive one or more inputs;
a processing circuitry to generate at least one decision signal by processing the one or more inputs;
a first output line 106 communicably coupled through at least one first transistor 110-1, and a second output line 108 communicably coupled with at least one second transistor 110-2, wherein the at least one first transistor 110-1 and the at least one second transistor 110-2 are connected in series, and wherein each of the at least one first transistor 110-1 and the at least one second transistor 110-2 is triggered by the at least one decision signal simultaneously and in complementary manner to avoid nuisance tripping.

2. The decision controller device 102 as claimed in claim 1, wherein the decision controller device is an intelligent decision making device selected from any or combination of a microcontroller, a microprocessor, and a field-programmable gate array (FPGA).

3. The decision controller device 102 as claimed in claim 1, wherein the one or more inputs are selected from:
a current value or a voltage value generated from power supply lines providing power to the field device; or
a current signal or a voltage signal generated from power supply lines providing power to the field device.

4. The decision controller device 102 as claimed in claim 1, wherein the decision controller device 102 resides in a protection relay that generates tripping signal for at least one circuit breaker in the process control system.

5. The decision controller device 102 as claimed in claim 1, wherein at least one decision signal is a trip signal to disconnect one or more power supply lines.
6. The decision controller device 102 as claimed in claim 1, wherein the at least one first transistor 110-1 and the at least one second transistor 110-2 are connected in series forms two paths in series implementing a hardware based logical AND operation.

7. The decision controller device 102 as claimed in claim 1, wherein each of the at least one first transistor 110-1 and the at least one second transistor 110-2 are configured with different algorithms generating at least one output, wherein a tripping signal to at least one circuit breaker in the process control system is issued when the at least one output generated by each of the at least one first transistor and the at least one second transistor is similar.

8. The decision controller device 102 as claimed in claim 1, wherein each of the at least one first transistor 110-1 and the at least one second transistor 110-2 are connected in series with an output relay 112.

9. The decision controller device as claimed in claim 1, wherein:
the at least one first transistor 110-1 is a Negative-Positive-Negative (NPN) type transistor and the at least one second transistor 110-2 is a Positive-Negative-Positive (PNP) type transistor; or
the at least one first transistor 110-1 is a Positive-Negative-Positive (PNP) type transistor type transistor and the at least one second transistor 110-2 is a Negative-Positive-Negative (NPN).

10. A protection relay comprising a decision controller device 102 as clamed in claim 1.
, Description:
TECHNICAL FIELD
[0001] The present disclosure relates to a protection relay technology, and more specifically relates to, a system and device for driving output reliably to avoid nuisance activation of output.

BACKGROUND
[0002] Background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
[0003] Every industry depends on certain intelligent decision making electronic devices for process monitoring, controlling and maintaining any process or operation. Usually sensors provide information about different parameters of a particular process. These signals are fed to a data processing circuit which is either a part of Process Controller/ Protection Relay or interfaced externally. Protection Relay have very critical role in controlling operation of any process. Protection relays also monitor health of electrical system and protects it against any unfavorable situation or fault. Controlling electrical system needs output to activate or deactivate peripheral equipment or process.
[0004] A simple relay output from Protection Relay can start and stop process involving Mega Watt of power and thus it is necessary to have a very deterministic and reliable operation of output to avoid any nuisance activation of process which is not supposed to activate or start. At present, output circuit rely on simple electromechanical relay driving and processing algorithm without any redundancy which activates this output as it can be shown in FIG. 1. This can be a lead to nuisance output activation due to hardware issues like noise or power reset or due to incorrect software algorithm processing. This demands a rugged, reliable and deterministic solution to activate output.
[0005] Efforts have been made in related art to address above stated problem by using a process control system. An example of such a process control system is recited in Japanese patent 4786672B2, entitled “Input and output devices to be used within a process control system, and how to configure the device”. The patent discloses a process control system, in particular, the setting control of input and output devices in a process control system, fault isolation control, and an apparatus and method for implementing redundancy assistive control. Another example of such a process control system is recited in United States patent 4399421A, entitled “Lock-out relay with adjustable trip coil”. The patent discloses a tripping solenoid is used in connection with a lockout relay and has an adjusting means for positioning a plunger end with respect to a coil of the solenoid to predetermine threshold voltage, reluctance, and response time to activation of the plunger by a magnetic field of the coil. A spring opposes movement of the plunger in a first direction toward a push rod which is separated from the plunger and mounted coaxially therewith. Another example of such a process control system is recited in United States patent 20120017122A1, entitled “Input/output device with configuration, fault isolation and redundant fault assist functionality”. The patent discloses a process control system is provided having a plurality of I/O devices in communication using a bus. A primary redundant I/O device and a secondary redundant I/O device are coupled to the bus, where the secondary redundant I/O device is programmed to detect a primary redundant I/O device fault. The secondary redundant I/O device, upon detecting the primary redundant I/O device fault, publishes a primary redundant I/O device fault message on the bus. The controller may deactivate the primary redundant I/O device and activate the secondary redundant I/O device responsive to the primary redundant I/O device fault message.
[0006] However, the prior-art talks about using electromechanical components to drive the output but it is very expensive methods. Further, the prior-art talks about using two isolated but redundant output devices which are coupled over the bus and is used in the range of few milli-seconds to seconds. Furthermore, the prior-art talks about input output configuration but does not speak about reliability of output generation and nuisance avoidance. Additionally, in prior art, there is no solution available to generate rugged, reliable and deterministic solution to activate output.
[0007] Thus, there still exists a need to provide an efficient, effective, and improved system and device to drive output reliably to avoid nuisance activation of output. Further, there exists a need to solve problems of nuisance output activation by using redundant and complimentary output circuit as well as by using redundant software algorithm. Furthermore, there is a need of a cost effective solution to ensure deterministic functioning of critical operation. Additionally, there is a need of an effective solution for high noise environment to ensure deterministic system behavior and to ensure deterministic functioning of critical operation in heavy supply disturbance. Moreover, there is a need of an effective solution for to ensure deterministic functioning of critical operation in case of power reset.
[0008] All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition of that term provided herein applies and the definition of that term in the reference does not apply.
[0009] In some embodiments, the numbers expressing quantities of ingredients, properties such as concentration, reaction conditions, and so forth, used to describe and claim certain embodiments of the invention are to be understood as being modified in some instances by the term “about”. Accordingly, in some embodiments, the numerical parameters set forth in the written description and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by a particular embodiment. In some embodiments, the numerical parameters should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of some embodiments of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as practicable. The numerical values presented in some embodiments of the invention may contain certain errors necessarily resulting from the standard deviation found in their respective testing measurements.
[00010] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[00011] The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[00012] Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all groups used in the appended claims.

SUMMARY
[00013] The present disclosure relates to a protection relay technology, and more specifically relates to, a system and mechanism to drive output reliably to avoid nuisance activation of output.
[00014] Accordingly, an aspect of the present disclosure relates to a decision controller device in a process control system to avoid nuisance tripping, the controller device. The decision controller device includes an input communication line, a processing circuitry, a first output line and a second output line. The input communication line receives one or more inputs. The processing circuitry generates at least one decision signal by processing the one or more inputs. The first output line communicably coupled with at least one first transistor, and a second output line communicably coupled with at least one second transistor. First transistor and second transistor are connected in series, and wherein each of the at least one first transistor and the at least one second transistor is triggered by the at least one decision signal simultaneously and in complementary manner to avoid nuisance tripping.
[00015] In an aspect, the decision controller device is an intelligent decision making device selected from any or combination of a microcontroller, a microprocessor, and a field-programmable gate array (FPGA).
[00016] In an aspect, the one or more inputs are selected from a current value or a voltage value generated from power supply lines providing power to the field device.
[00017] In an aspect, the one or more inputs are selected from a current signal or a voltage signal generated from power supply lines providing power to the field device.
[00018] In an aspect, the process control system including a plurality of I/O devices in communication with the decision controller device using a bus.
[00019] In an aspect, a protection relay generates tripping signal for at least one circuit breaker in the process control system.
[00020] In an aspect, decision signal is a trip signal to disconnect one or more power supply lines.
[00021] In an aspect, the at least one first transistor and the at least one second transistor are connected in series forms two paths in series implementing a hardware based logical AND operation.
[00022] In an aspect, each of the at least one first transistor and the at least one second transistor are configured with different algorithms generating at least one output, wherein a tripping signal to at least one circuit breaker in the process control system is issued when the at least one output generated by each of the at least one first transistor and the at least one second transistor is similar.
[00023] In an aspect, the at least one first transistor is a Negative-Positive-Negative (NPN) type transistor and the at least one second transistor is a Positive-Negative-Positive (PNP) type transistor.
[00024] In an aspect, the at least one first transistor is a Positive-Negative-Positive (PNP) type transistor type transistor and the at least one second transistor is a Negative-Positive-Negative (NPN).
[00025] Existing techniques produce undesired output few times in their lifespan and they activate output when it should not be. In contrast, the present invention provides a new, non-obvious and technically advanced system and method to reduce possibilities by guarding output generation circuitry against power supply fluctuations, power reset events and noise.
[00026] Various objects, features, aspects and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.

BRIEF DESCRIPTION OF THE DRAWINGS
[00027] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure. The diagrams are for illustration only, which thus is not a limitation of the present disclosure, and wherein:
[00028] FIG. 1 illustrates output activation by means of single output from a microcontroller/ microprocessor.
[00029] FIG. 2 illustrates a dual output with redundant complimentary output, in accordance with an exemplary embodiment of the present disclosure.
[00030] FIG. 3 illustrates effects of Power supply fluctuations on digital output at high state, in accordance with an exemplary embodiment of the present disclosure.
[00031] FIG. 4 illustrates effects of power supply fluctuations on digital output at low state, in accordance with an exemplary embodiment of the present disclosure.
[00032] FIG. 5 illustrates effects of power supply reset on digital output, in accordance with an exemplary embodiment of the present disclosure.
[00033] FIG. 6 illustrates an exemplary two algorithms to calculate two redundant outputs, in accordance with an exemplary embodiment of the present disclosure.

DETAILED DESCRIPTION
[00034] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the scope of the present disclosure as defined by the appended claims.
[00035] If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
[00036] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[00037] Exemplary embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments are shown. These exemplary embodiments are provided only for illustrative purposes and so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those of ordinary skill in the art. The invention disclosed may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Various modifications will be readily apparent to persons skilled in the art. The general principles defined herein may be applied to other embodiments and applications without departing from the scope of the invention. Moreover, all statements herein reciting embodiments of the invention, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future (i.e., any elements developed that perform the same function, regardless of structure). Also, the terminology and phraseology used is for the purpose of describing exemplary embodiments and should not be considered limiting. Thus, the present invention is to be accorded the widest scope encompassing numerous alternatives, modifications and equivalents consistent with the principles and features disclosed. For purpose of clarity, details relating to technical material that is known in the technical fields related to the invention have not been described in detail so as not to unnecessarily obscure the present invention.
[00038] Each of the appended claims defines a separate invention, which for infringement purposes is recognized as including equivalents to the various elements or limitations specified in the claims. Depending on the context, all references below to the "invention" may in some cases refer to certain specific embodiments only. In other cases it will be recognized that references to the "invention" will refer to subject matter recited in one or more, but not necessarily all, of the claims.
[00039] All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g., “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[00040] Various terms as used herein are shown below. To the extent a term used in a claim is not defined below, it should be given the broadest definition persons in the pertinent art have given that term as reflected in printed publications and issued patents at the time of filing.
[00041] The prior-art talks about using electromechanical components to drive the output but it is very expensive methods. Further, the prior-art talks about using two isolated but redundant output devices which are coupled over the bus and is used in the range of few milli-seconds to seconds. Furthermore, the prior-art talks about input output configuration but does not speak about reliability of output generation and nuisance avoidance. Additionally, in prior art, there is no solution available to generate rugged, reliable and deterministic solution to activate output.
[00042] In prior art, a system and mechanism generate rugged, reliable and deterministic solution to activate output. There is need to find solution to above said problem for following reasons:
1. Industrial environment is a harsh environment in which lot of electronic devices and electrical machines are running, switching on or switching off at any given moment. This generates a lot of EMI/EMC noise as it can be shown in FIG. 4. Radiated, conducted or coupled noise can change potential levels of any conductor. If this conductor is what is driving output then this can lead to nuisance output activation.
2. In industrial environment a lot of power fluctuations are present. If protection relay happens to experience disturbance on power line then output of devices which are vulnerable to power supply fluctuations like microcontroller, microprocessor or digital IC’s can behave unpredictably and output lines of such devices may generate unwanted potential levels or fluctuations which can lead to unreliable output triggering as it can be shown in FIG. 3.
3. In industrial environment, power schemes are complex, protection relays may be powered through different supplies and electrical machines may be powered through different power supply. Suppose, protection relay power supply switch off at any moment then digital IC’s including processing unit like Microcontroller and Microprocessor may generate a small high pulse immediately after the power is restored as shown in FIG. 5. This may lead to nuisance activation of output as this characteristic is very device dependent.
4. Most often it is seen that despite testing software algorithm very rigorously, due to unforeseen conditions a software algorithm may tend to produce incorrect output few times during its entire lifecycle. This is called as non-deterministic behavior of algorithms. There are following reasons for software to behave in non-deterministic way:
5. If it uses external state other than the input, such as user input, a global variable, a hardware timer value, a Random value, or stored data in memory.
6. If it operates in a way that is timing-sensitive, for example if it has multiple processors writing to the same data at the same time. In this case, the precise order in which each processor writes its data will affect the result.
7. If a hardware error causes its state to change in an unexpected way.
[00043] As stated above, there are three problems which can affect deterministic behavior of output due to hardware errors viz. noise triggering, power line disturbance and loss of power. The proposed invention solves all these three problems.
[00044] The present disclosure relates to a protection relay technology, and more specifically relates to, a system and mechanism to drive output reliably to avoid nuisance activation of output.
[00045] In an embodiment, the proposed invention solves above problems of nuisance output activation by using redundant and complimentary output circuit as well as by using redundant software algorithm.
[00046] The present invention provides system and mechanism to drive output reliably to avoid nuisance activation of output. The proposed invention provides very cost effective solution to ensure deterministic functioning of critical operation. The proposed invention provides an effective solution for high noise environment to ensure deterministic system behavior and to ensure deterministic functioning of critical operation in heavy supply disturbance. The proposed invention provides an effective solution for to ensure deterministic functioning of critical operation in case of power reset.
[00047] FIG. 1 illustrates output activation by means of single output from a microcontroller/ microprocessor. FIG. 2 illustrates a dual output with redundant complimentary output, in accordance with an exemplary embodiment of the present disclosure. FIG. 3 illustrates effects of Power supply fluctuations on digital output at high state, in accordance with an exemplary embodiment of the present disclosure. FIG. 4 illustrates effects of power supply fluctuations on digital output at low state, in accordance with an exemplary embodiment of the present disclosure. FIG. 5 illustrates effects of power supply reset on digital output, in accordance with an exemplary embodiment of the present disclosure. FIG. 6 illustrates an exemplary two algorithms to calculate two redundant outputs, in accordance with an exemplary embodiment of the present disclosure.
REDUNDANT AND COMPLIMENTARY OUTPUT CIRCUIT:
[00048] As stated above, there are three problems which can affect deterministic behavior of output due to hardware errors viz. noise triggering, power line disturbance and loss of power. The proposed invention solves all these three problems. As shown in FIG. 2 proposed invention uses two output paths connected in series to activate a particular output (relay contact) having complimentary method of activation. Two output paths are used and it is necessary to activate both of them simultaneously but in complimentary way. Series connections are done to make hardware AND ing operation (Logical AND Gate). Both the inputs (output of microcontroller) are necessary to activate single output (relay in this case) which is critical. As explained above, two outputs are generated by different an algorithm which enhances reliability of decision making. Chances of taking wrong decision goes down substantially
[00049] As shown in FIG. 2, U1 can be any intelligent decision making device/element like microcontroller, microprocessor or field-programmable gate array (FPGA). U1 can yield decision based on certain inputs. For example, in protection relay domain, the system can take/read/sample current and voltage data to ensure that in fault condition trip output is asserted to breaker which will disconnect power supply lines. But this scheme is not limited to protection relay domain only. This can be used in any design where it is necessary to ensure that wrong output is not asserted. All the conditions are double checked by having two paths in series. Series connection is nothing but AND ing (Logical AND) operation. In AND ing operation, both inputs (inputs to AND gate which are output of microcontroller in this case) are necessary to generate output and single input cannot activate/drive AND gate.
[00050] In an embodiment, activating relay means asserting output and relay can trigger actual operation. Asserting output will trigger expected process. In example of protection relay, trip signal is asserted by microcontroller. Microcontroller can activate relay and relay will activate circuit breaker which will disconnect power supply. Relay also helps in isolating microcontroller/microprocessor from output circuitry which can be having ratings in few hundred volts.
[00051] In another embodiment, Complimentary method of activation means two transistors can be used which are having complimentary behavior. NPN transistor can activate after getting high/one input and will deactivate after getting low/zero input. PNP transistor on other hand can behave exactly opposite and will activate after getting low/zero input and can deactivate after getting high/one input. By using two different types of transistors system is avoiding accidental activation of both the transistors by noise, power supply interruption or by power supply reset. These three effects can drive input of NPN and PNP transistors to high/one or low/zero condition simultaneously despite not being driven to that state by microcontroller. If inputs of both the transistors are driven high then NPN will turn on but PNP will turn off and thus output cannot be asserted. If inputs of both the transistors are driven low then PNP can turn on but NPN will turn off and again, output cannot be asserted. This is the benefit of using complimentary pair of transistors. Only microcontroller can drive these lines to generate expected output. In complimentary way, input to NPN can be driven to high/one state by say process 1 but input to PNP can be driven to low/zero by say process 2 and output/relay will be activated.
[00052] In an exemplary embodiment, over current protection in which trip signal can be asserted (Motor stop operation) in case of over current condition. This means that current is shooting above a threshold value. There are good chances that actual value of current is not crossing set threshold but due to excessive harmonics or noise, current value can go up and similarly due to EMI/EMC disturbance operation of microcontroller/microprocessor can get affected and it may generate wrong output. Disturbance in microcontroller/microprocessor can happen in form of memory corruption or due to disturbance in communication line if microcontroller is fetching data from other microcontroller and noise corrupts this data. Thus it is necessary to have second check point to process critical outputs like Trip which can stop entire operation and nuisance stop should never happen in protection relay else operation in factory/industry will halt for no reason causing unnecessary losses. In this typical scenario to avoid nuisance tripping, system can take readings of current waveform and calculate its RMS value in process 1 (Process 1 is one algorithm which will generate 1st decision). Also, the system can have checkpoints in process 1 which can use in process 2 or Process 2 can be replica of process 1. Process 2 can generate 2nd decision. Now these two decisions must match and then only generate trip output. Noise cannot affect both the processes uniformly (as both the processes are running in different time slot). It is very likely that one process can get affected due to noise but chances are less than two processes can get affected because of noise at same time. This can add system of checks and balances or double checking to generate critical outputs.
[00053] FIG. 3 shows effects of power supply fluctuations. These fluctuations can impact single output and may trigger false output signal but by using complimentary output, it is not possible to turn on output by mere supply fluctuations. Supply fluctuation can take both the lines either towards supply potential or towards ground potential at the same time. In complimentary output scheme both outputs should be driven by complimentary outputs i.e. 1 and 0 at appropriate transistor. Thus because of supply fluctuations, either of the output can be turned on but it will turn on both the outputs at once and it will avoid nuisance output activation.
[00054] FIG. 5 illustrates transient state of output of any Digital IC including Microcontroller or Microprocessor. It is usually mentioned in datasheet of such ICs the description of initial state of output pins after turning on power supply. It is observed that most of the Digital ICs pull output pin to high state and then user code can put it in stable state. If output is active high then power reset may trigger nuisance output activation unless the user code reaches to a point from where it can drive that output pin in deterministic way. In present innovation, there is a need of complimentary signals, even after power reset, nuisance output can be generated in either of the output ports but relay will not switch on as shown in FIG. 5 as it needs complimentary set of outputs.
[00055] FIG. 4 illustrates effect of noise. Noise can be radiated or conducted. This disturbance can impact single output and may trigger false output signal but by using complimentary output, it is not possible to turn on output by mere noise. Noise can take both lines either towards supply potential or towards ground potential at the same time. In complimentary output scheme both outputs should be driven by complimentary outputs i.e. 1 & 0 at appropriate transistor. Thus because of noise, either of the output can be turned on but it will turn on both the outputs at once and it will avoid nuisance output activation.
REDUNDANT SOFTWARE ALGORITHM:
[00056] It is a common practice in software development that an output can be generated by one particular function. Writing deterministic software is an art and used only for critical processes. It involves lot of checks and balances. In embedded systems, memory constraint and available processing capability puts a constraint on developing a software having checks and balances on critical outputs. In critical process, having huge consequences for false output it is necessary to have checks and balances by means of having redundant algorithm which can assert correctness of that particular algorithm either independently on in conjuncture. In present innovation, two algorithms are running to turn on one output. One algorithm having all main decision making elements and another algorithm having selected few important decision making elements are shown in FIG. 6. FIG. 6 illustrates two software algorithms to calculate two redundant outputs. First algorithm can include Test Case 1 to Test Case 5 (Main Code) and supplementary redundant algorithm comprises of Test Case 1, Test Case 2, Test Case 3 and Test Case 6. Supplementary algorithm which is helping to ensure correct output from main algorithm can take certain decisions from main algorithm or can seek external inputs and make those or another set of decisions by itself. This is adding software redundancy to ensure correctness of output. The proposed invention can have two algorithms which will be running in two different time slots, any disturbance in circuit which may affect code execution by corrupting data in internal registers or memory will not affect both the algorithms simultaneously thus can make this scheme full proof.
[00057] The foregoing description of the specific embodiments will so fully reveal the general nature of the invention that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation.
[00058] In an embodiment, the proposed invention enables hardware redundancy to avoid nuisance activation of output. The proposed invention is very cost effective solution to ensure deterministic functioning of critical operation. The proposed invention enables software redundancy to avoid any thin chances of miscalculation by single algorithm. The proposed invention provides an effective solution for high noise environment to ensure deterministic system behavior. The proposed invention enables an effective solution for to ensure deterministic functioning of critical operation in heavy supply disturbance. The proposed system enables an effective solution for to ensure deterministic functioning of critical operation in case of power reset.
[00059] It should be apparent to those skilled in the art that many more modifications besides those already described are possible without departing from the inventive concepts herein. Moreover, in interpreting both the specification and the claims, all terms should be interpreted in the broadest possible manner consistent with the context. In particular, the terms “comprises” and “comprising” should be interpreted as referring to elements, components, or steps in a non-exclusive manner, indicating that the referenced elements, components, or steps may be present, or utilized, or combined with other elements, components, or steps that are not expressly referenced. Where the specification claims refers to at least one of something selected from the group consisting of A, B, C ….and N, the text should be interpreted as requiring only one element from the group, not A plus N, or B plus N, etc. The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the scope of the appended claims.
[00060] While embodiments of the present disclosure have been illustrated and described, it will be clear that the disclosure is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the scope of the disclosure, as described in the claims.
[00061] In the description of the present specification, reference to the term "one embodiment," "an embodiments", "an example", "an instance", or "some examples" and the description is meant in connection with the embodiment or example described The particular feature, structure, material, or characteristic included in the present invention, at least one embodiment or example. In the present specification, the term of the above schematic representation is not necessarily for the same embodiment or example. Furthermore, the particular features structures, materials, or characteristics described in any one or more embodiments or examples in proper manner. Moreover, those skilled in the art can be described in the specification of different embodiments or examples are joined and combinations thereof.
[00062] All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive.
[00063] Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.
[00064] The invention is not restricted to the details of the foregoing embodiment(s). The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.
[00065] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.