Claims:
1. A method of determining a fault in a protection relay, the method comprising:
receiving, by a controller, in real-time, a monitor signal that is representative of a transmission signal on the protection relay;
determining, by the controller, peak value of the monitor signal, wherein the peak value is determined before the transmission signal reaches a transmission peak value;
comparing, by the controller, the determined peak value with a pre-determined threshold value;
determining, by the controller, the fault when the determined peak value is greater than the pre-determined threshold value;
filtering, upon determination of the fault, one or more frequency components associated with the monitor signal, wherein the frequency components are filtered to avoid pseudo fault conditions;
obtaining, if the fault persists, at least a root mean square (RMS) value for the monitor signal considering the filtered frequency components;
comparing the obtained RMS value with a pre-determined threshold setting value, and determining issuance of a trip signal when the obtained RMS value is greater than the pre-determined threshold setting value.
2. The method as claimed in claim 1, wherein the step of receiving comprises: receiving the monitor signal in real time with the transmission signal.
3. The method as claimed in claim 1, wherein the method further comprises: indicating the determination of the fault by at least recording the fault for subsequent retrieval.
4. The method as claimed in claim 3, wherein recording the fault comprises storing the fault in a memory device.
5. The method as claimed in claim 1, wherein the pre-determined threshold value is obtained from a pickup value based at least on one or more protection settings or is pre-set and/or is pre-configured.
6. The method as claimed in claim 1, wherein the monitor signal is the transmission signal.
7. The method as claimed in claim 1, wherein the method further comprises: validating, by the controller, the fault based on receipt of the monitor signal a plurality of time to determine if the fault persists.
8. The method as claimed in claim 1, wherein the method further comprises: executing, before issuing the trip signal, a protection function.
9. The method as claimed in claim 1, wherein the pre-determined threshold setting value is pre-set or pre-configured.
10. An apparatus to determine a fault in a protection relay, the apparatus comprising:
a peak predictor module configured to:
receive, in real-time, a monitor signal that is representative of a transmission signal on the protection relay; and
determine peak value of the monitor signal, wherein the peak value is determined before the transmission signal reaches a transmission peak value;
a comparator module configured to compare the determined peak value with a pre-determined threshold value, and determine the fault when the determined peak value is greater than the pre-determined threshold value;
a Fast Fourier transform (FFT) module configured to filter, upon determination of the fault, one or more frequency components associated with the monitor signal, wherein the frequency components are filtered to avoid pseudo fault conditions, wherein the frequency components are filtered to avoid pseudo fault conditions;
a root mean square (RMS) value determination module configured to obtain, if the fault persists, at least a root mean square (RMS) value for the monitor signal considering the filtered frequency components; an
a protection module configured to compare the obtained RMS value with a pre-determined threshold setting value, and determining issuance of a trip signal when the obtained RMS value is greater than the pre-determined threshold setting value.
, Description:
TECHNICAL FIELD
The present disclosure generally relates to the field of protective relay (such as, but not limited to feeder protection relays, motor protection relays and other numeric relays) in switchgear applications. In particular, it pertains to, but not by way of limitation, a system and method for early fault prediction for protection relays.

BACKGROUND
Background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
In electrical engineering, a protective relay (such as, but not limited to feeder protection relays, motor protection relays and other numeric relays) is a relay device designed to trip a circuit breaker when a fault is detected. In short, relay device is a sensing device which senses abnormal voltage and current conditions in power system and sends signal to circuit breaker to remove faulty part from rest of the power system.
The first protective relays were electromagnetic devices, relying on coils operating on moving parts to provide detection of abnormal operating conditions such as over-current, over-voltage, reverse power flow, over-frequency, and under-frequency. Microprocessor-based digital protection relays now emulate the original devices, as well as providing types of protection and supervision impractical with electromechanical relays. Electromechanical relays provide only rudimentary indication of the location and origin of a fault. In many cases a single microprocessor relay provides functions that would take two or more electromechanical devices. By combining several functions in one case, numerical relays also save capital cost and maintenance cost over electromechanical relays. However, due to their very long life span, tens of thousands of these “silent sentinels” are still protecting transmission lines and electrical apparatus all over the world. Important transmission lines and generators have cubicles dedicated to protection, with many individual electromechanical devices, or one or two microprocessor relays.
Currently there are many systems, such as feeder systems, that are available in the market in which the probability of occurrence of fault is high since the length of the electrical power transmission line is long. So, identifying the fault as early as possible is necessary. Once a faulty condition is sensed, a command is given to the circuit breaker and this command causes the circuit breaker to open. Thereby, isolating the load from the source to prevent it from getting damaged. This puts forth a challenge for protection relay, such as feeder protection relay, to be able to sense a fault condition as early as possible. Another challenge would be to ensure that the trip signal that is being generated is not a false one since that would cause an unnecessary opening of the circuit breaker which would mean power supply at the load end unnecessarily getting interrupted leading to cores of losses to the power consumers.
Various attempts have been made to solve the problem of rapid detection/ sensing of short circuits/ a fault condition in an electrical network. For example, United States Patent 6437576 B2 proposes a method for rapid detection of short circuits in an electrical network. It is based on estimating the electrical characteristics of the short circuit load and calculating the peak value of the current on the basis of the N successive samples of the instantaneous current i(t) and its derivative di(t)/dt. If the calculated value, typically available before the current actually attains this value, is greater than a pre-established threshold, a signal is emitted indicative of a short circuit fault.
United States Patent Application 20100312505 A1 proposes a root locus method for early short circuit recognition. The current, the first and the second temporal der1vat1on thereof are continuously and consecutively determined at the same time and in the same temporal distance and are processed as respective digital sequence of numbers. Every sequence of numbers is associated with a defined threshold value, the numbers of the three sequences of numbers being compared with the respective threshold value associated therewith. Every number that exceeds the threshold value associated therewith is associated with a weighing variable and the weighing variables that pertain to the same time are added up to a first weighing sum. The first weighing sums are added to a second weighing sum for a defined number of directly subsequent times and the second weighing sum is compared with an additional defined threshold value. When the second weighing sum exceeds the defined threshold value, a short circuit is recognized
United States Patent 6313639 B1 proposes a method for identifying short circuits in a low voltage network. It includes the step of determining a first envelope and a second envelope for a plurality of locus curves of a current, steepness as a function of current in a low voltage network, the first and second envelopes including all switching angles, the first envelope being determined for a lower power factor, the second envelope being determined for an upper power factor. Additionally, a third envelope is determined taking into account rated current switching operations between the lower power factor and the upper power factor. A resultant envelope is formed from a combination of the first, second and third envelopes by overlaying the first, second and third envelopes. The resultant envelope defines a tolerant locus curve criterion indicating a short circuit for values outside the tolerant locus curve criterion
Further, researchers have also attempted to solve the above problem by using root locus method for early fault predictions which involves a lot of memory consumption. Also, using di (t)/dt for fault prediction along with i(t) puts forth a risk of pseudo fault detection which has already mentioned, in the case of feeder protection is not acceptable. So, ensuring immunity to nuisance faults along with early fault prediction is a major challenge
Also, since the basic application of the protection relay is to provide the protection in case of the fault in the system and prevent the system form getting damaged, in order to provide the protection, the protections relay needs to sense the signal, process the signal and determine the fault condition and issue the trip command. There are few methods which are generally used to read and process the signals and execute the protection function in order to issue the trip command as recited below.
Method 1 (Full Cycle Method): In this method complete cycle is sensed and processed and then the execution of protection is triggered. In this case since the complete cycle is considered, the protection execution shall be triggered after every 20mS. This process is the ideal one but in case of a Severe fault condition where the trip needs to be issued very fast, this method will delay the issue of trip command since even though the fault condition occurs are the initial stage it will be detected by the system after 20mS.
Method 2 (Half Cycle Method: In this method the signal is processed at every half cycle. It means the protection execution will be triggered every 10mS.In this case there is a possibility of issuing the delayed trip command since the fault condition may occur just after or before the protection execution is done. So there is a possibility that the system may detect the fault condition after 1.5 cycle (30mS) or 40mS which is also not acceptable in order to issue the trip command. System will not be deterministic enough to sense the fault and issue the trip command since the injection of current and execution of the protection in the controller is not in sync and which is difficult to achieve as well.
Method 3 (Quarter Cycle Method): In this method the signal is processed at every 5mS. It means the protection execution is triggered every 5mS. Implementation of this method results in limitation similar to Method 2.
Method 4 (Rolling Window method): In this method the signal is divided into small window and RMS is calculated at every window. Implementation of this method results in the load on the controller in order to calculate the RMS at every window which will lead the system slow, nondeterministic and as result there is delay in issuing the trip command. Also in order to implement this method the processing speed of the controller should be very high enough which is not cost efficient as well.
The aforementioned limitations of the existing the protections relay in the existing prior-art are recognized by the inventors hereof and some or all of these limitations have been addressed by various embodiments of the present invention. The inventors of this applications recognized that it would be advantageous to provide a mechanism which enables prediction of a peak value of a signal (sinusoidal signal), preferably, on the basis of just two samples, making early detection possible and using this signal as just a trigger signal for a filter and not to generate a final trip signal, unlike the existing research favoring pseudo fault. It suits the need of the ability of a protection relay to take a trip decision “early” as well as “Correctly.”
All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition of that term provided herein applies and the definition of that term in the reference does not apply.
In some embodiments, the numbers expressing quantities of ingredients, properties such as concentration, reaction conditions, and so forth, used to describe and claim certain embodiments of the invention are to be understood as being modified in some instances by the term “about.” Accordingly, in some embodiments, the numerical parameters set forth in the written description and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by a particular embodiment. In some embodiments, the numerical parameters should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of some embodiments of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as practicable. The numerical values presented in some embodiments of the invention may contain certain errors necessarily resulting from the standard deviation found in their respective testing measurements.
As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all Markush groups used in the appended claims.

SUMMARY
The aforementioned limitations of the existing protection relays are recognized by the inventors hereof and some or all of these limitations have been addressed by providing a new, efficient, technically advanced, system and method which enables prediction of a peak value of a signal (sinusoidal signal), preferably, on the basis of just two samples, making early detection possible and using this signal as just a trigger signal for a filter and not to generate a final trip signal, unlike the existing research favoring pseudo fault. It suits the need of the ability of a protection relay to take a trip decision “early” as well as “Correctly.”
The present disclosure generally relates to the field of protective relay (such as, but not limited to feeder protection relays, motor protection relays and other numeric relays) in switchgear applications. In particular, it pertains to, but not by way of limitation, a system and method for early fault prediction for protection relays.
An object of the present disclosure is to provide a system and method for early fault prediction for protection relays.
Another object of the present disclosure is to provide a system and method for predicting a peak value of a sinusoidal signal, preferably, on the basis of just two samples, making early detection possible and using this signal as just a trigger signal for a filter and not to generate a final trip signal, unlike the existing research favoring pseudo fault. It suits the need of the ability of a protection relay to take a trip decision “early” as well as “Correctly.”
An aspect of the present disclosure provides a method of determining a fault in a protection relay. The method, being performed by the controller, can include the steps of: receiving, in real-time, a monitor signal that is representative of a transmission signal on the protection relay; determining peak value of the monitor signal, wherein the peak value is determined before the transmission signal reaches a transmission peak value; comparing the determined peak value with a pre-determined threshold value; determining the fault when the determined peak value is greater than the pre-determined threshold value; filtering, upon determination of the fault, one or more frequency components associated with the monitor signal, wherein the frequency components are filtered to avoid pseudo fault conditions; obtaining, if the fault persists, at least a root mean square (RMS) value for the monitor signal considering the filtered frequency components; comparing the obtained RMS value with a pre-determined threshold setting value, and determining issuance of a trip signal when the obtained RMS value is greater than the pre-determined threshold setting value.
In an aspect, the step of receiving the monitor signal can include the steps of receiving the monitor signal in real time with the transmission signal.
In an aspect, the method can further include indicating the determination of the fault by at least recording the fault for subsequent retrieval. In the aspect, the fault can be stored in a memory device.
In an aspect, the pre-determined threshold value can be obtained from a pickup value based at least on one or more protection settings or is pre-set and/or is pre-configured.
In an aspect, the monitor signal can be the transmission signal.
In an aspect, the method can further include the steps of validating the fault based on receipt of the monitor signal a plurality of time to determine if the fault persists.
In an aspect, the method can further include the step of executing, before issuing the trip signal, a protection function.
In an aspect, the pre-determined threshold setting value is pre-set or pre-configured.
An aspect of the present disclosure relates to an apparatus (interchangeably and alternatively referred to as “controller” in this application) to determine a fault in a protection relay. The apparatus can include a peak predictor module, a comparator module, a Fast Fourier transform (FFT) module, a root mean square (RMS) value determination module, and a protection module.
The peak predictor module can receive, in real-time, a monitor signal that is representative of a transmission signal on the protection relay, and determine peak value of the monitor signal, wherein the peak value is determined before the transmission signal reaches a transmission peak value.
The comparator module can compare the determined peak value with a pre-determined threshold value, and determine the fault when the determined peak value is greater than the pre-determined threshold value.
The Fast Fourier transform (FFT) module can filter, upon determination of the fault, one or more frequency components associated with the monitor signal, wherein the frequency components are filtered to avoid pseudo fault conditions, wherein the frequency components are filtered to avoid pseudo fault conditions.
The root mean square (RMS) value determination module can obtain, if the fault persists, at least a root mean square (RMS) value for the monitor signal considering the filtered frequency components.
The protection module can compare the obtained RMS value with a pre-determined threshold setting value, and determining issuance of a trip signal when the obtained RMS value is greater than the pre-determined threshold setting value.
In contrast to the existing techniques of early fault detection, the present invention provides provide a system and method for predicting a peak value of a sinusoidal signal, preferably, on the basis of just two samples, making early detection possible and using this signal as just a trigger signal for a filter (Fast Fourier transform (FFT) filter) and not to generate a final trip signal, unlike the existing research favoring pseudo fault. It suits the need of the ability of a protection relay to take a trip decision “early” as well as “Correctly.”
Also, in contrast to the root locus method for early fault predictions which involves a lot of memory consumption, and since usage di (t)/dt for fault prediction along with i(t) puts forth a risk of pseudo fault detection which is not acceptable in the case of feeder protection, ensuring immunity to nuisance faults along with early fault prediction is a major challenge, the present invention provides a peak detection system and method using the instantaneous samples of signal i(t) and does not use di(t)/dt since the first and second order differential terms are known to be noisy. Also, for ensuring immunity to nuisance faults, according to the present invention, the final trip decision is not directly taken after the peak prediction and there is an intermediate noise removal block involved.
Various objects, features, aspects and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components

BRIEF DESCRIPTION OF THE DRAWINGS
The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
FIG. 1 illustrates an exemplary hardware circuitry for transmitting a signal is to a controller for processing, in accordance with an embodiment of the present disclosure.
FIG. 2 illustrates an exemplary block diagram of the proposed invention, in accordance with an embodiment of the present disclosure.
FIG. 3 illustrates an exemplary flow-chart determining a fault in a protection relay, in accordance with an embodiment of the present disclosure.
FIG. 4 illustrates an exemplary computer system utilized for implementation of the proposed system in accordance with an exemplary embodiment of the present disclosure.

DETAILED DESCRIPTION
The following is a detailed description of embodiments of the disclosure illustrated in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure as defined by the appended claims.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of embodiments of the present invention. It will be apparent to one skilled in the art that embodiments of the present invention may be practiced without some of these specific details.
Embodiments of the present invention include various steps, which will be described below. The steps may be performed by hardware components or may be embodied in machine-executable instructions, which may be used to cause a general-purpose or special-purpose processor programmed with the instructions to perform the steps. Alternatively, steps may be performed by a combination of hardware, software, and firmware and/or by human operators.
Embodiments of the present invention may be provided as a computer program product, which may include a machine-readable storage medium tangibly embodying thereon instructions, which may be used to program a computer (or other electronic devices) to perform a process. The machine-readable medium may include, but is not limited to, fixed (hard) drives, magnetic tape, floppy diskettes, optical disks, compact disc read-only memories (CD-ROMs), and magneto-optical disks, semiconductor memories, such as ROMs, PROMs, random access memories (RAMs), programmable read-only memories (PROMs), erasable PROMs (EPROMs), electrically erasable PROMs (EEPROMs), flash memory, magnetic or optical cards, or other type of media/machine-readable medium suitable for storing electronic instructions (e.g., computer programming code, such as software or firmware).
Various methods described herein may be practiced by combining one or more machine-readable storage media containing the code according to the present invention with appropriate standard computer hardware to execute the code contained therein. An apparatus for practicing various embodiments of the present invention may involve one or more computers (or one or more processors within a single computer) and storage systems containing or having network access to computer program(s) coded in accordance with various methods described herein, and the method steps of the invention could be accomplished by modules, routines, subroutines, or subparts of a computer program product.
If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
Exemplary embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments are shown. These exemplary embodiments are provided only for illustrative purposes and so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those of ordinary skill in the art. The invention disclosed may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Various modifications will be readily apparent to persons skilled in the art. The general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the invention. Moreover, all statements herein reciting embodiments of the invention, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future (i.e., any elements developed that perform the same function, regardless of structure). Also, the terminology and phraseology used is for the purpose of describing exemplary embodiments and should not be considered limiting. Thus, the present invention is to be accorded the widest scope encompassing numerous alternatives, modifications and equivalents consistent with the principles and features disclosed. For purpose of clarity, details relating to technical material that is known in the technical fields related to the invention have not been described in detail so as not to unnecessarily obscure the present invention.
Thus, for example, it will be appreciated by those of ordinary skill in the art that the diagrams, schematics, illustrations, and the like represent conceptual views or processes illustrating systems and methods embodying this invention. The functions of the various elements shown in the figures may be provided through the use of dedicated hardware as well as hardware capable of executing associated software. Similarly, any switches shown in the figures are conceptual only. Their function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic, or even manually, the particular technique being selectable by the entity implementing this invention. Those of ordinary skill in the art further understand that the exemplary hardware, software, processes, methods, and/or operating systems described herein are for illustrative purposes and, thus, are not intended to be limited to any particular named element.
Each of the appended claims defines a separate invention, which for infringement purposes is recognized as including equivalents to the various elements or limitations specified in the claims. Depending on the context, all references below to the "invention" may in some cases refer to certain specific embodiments only. In other cases it will be recognized that references to the "invention" will refer to subject matter recited in one or more, but not necessarily all, of the claims.
All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g., “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
Various terms as used herein are shown below. To the extent a term used in a claim is not defined below, it should be given the broadest definition persons in the pertinent art have given that term as reflected in printed publications and issued patents at the time of filing.
The aforementioned limitations of the existing protection relays are recognized by the inventors hereof and some or all of these limitations have been addressed by providing a new, efficient, technically advanced, system and method which enables prediction of a peak value of a signal (sinusoidal signal), preferably, on the basis of just two samples, making early detection possible and using this signal as just a trigger signal for a filter and not to generate a final trip signal, unlike the existing research favoring pseudo fault. It suits the need of the ability of a protection relay to take a trip decision “early” as well as “Correctly.”
The present disclosure generally relates to the field of protective relay (such as, but not limited to feeder protection relays, motor protection relays and other numeric relays) in switchgear applications. In particular, it pertains to, but not by way of limitation, a system and method for early fault prediction for protection relays.
An object of the present disclosure is to provide a system and method for early fault prediction for protection relays.
Another object of the present disclosure is to provide a system and method for predicting a peak value of a sinusoidal signal, preferably, on the basis of just two samples, making early detection possible and using this signal as just a trigger signal for a filter and not to generate a final trip signal, unlike the existing research favoring pseudo fault. It suits the need of the ability of a protection relay to take a trip decision “early” as well as “Correctly.”
An aspect of the present disclosure provides a method of determining a fault in a protection relay. The method, being performed by the controller, can include the steps of: receiving, in real-time, a monitor signal that is representative of a transmission signal on the protection relay; determining peak value of the monitor signal, wherein the peak value is determined before the transmission signal reaches a transmission peak value; comparing the determined peak value with a pre-determined threshold value; determining the fault when the determined peak value is greater than the pre-determined threshold value; filtering, upon determination of the fault, one or more frequency components associated with the monitor signal, wherein the frequency components are filtered to avoid pseudo fault conditions; obtaining, if the fault persists, at least a root mean square (RMS) value for the monitor signal considering the filtered frequency components; comparing the obtained RMS value with a pre-determined threshold setting value, and determining issuance of a trip signal when the obtained RMS value is greater than the pre-determined threshold setting value.
In an aspect, the step of receiving the monitor signal can include the steps of receiving the monitor signal in real time with the transmission signal.
In an aspect, the method can further include indicating the determination of the fault by at least recording the fault for subsequent retrieval. In the aspect, the fault can be stored in a memory device.
In an aspect, the pre-determined threshold value can be obtained from a pickup value based at least on one or more protection settings or is pre-set and/or is pre-configured.
In an aspect, the monitor signal can be the transmission signal.
In an aspect, the method can further include the steps of validating the fault based on receipt of the monitor signal a plurality of time to determine if the fault persists.
In an aspect, the method can further include the step of executing, before issuing the trip signal, a protection function.
In an aspect, the pre-determined threshold setting value is pre-set or pre-configured.
An aspect of the present disclosure relates to an apparatus to determine a fault in a protection relay. The apparatus can include a peak predictor module, a comparator module, a Fast Fourier Transform (FFT) module, a root mean square (RMS) value determination module, and a protection module.
The peak predictor module can receive, in real-time, a monitor signal that is representative of a transmission signal on the protection relay, and determine peak value of the monitor signal, wherein the peak value is determined before the transmission signal reaches a transmission peak value.
The comparator module can compare the determined peak value with a pre-determined threshold value, and determine the fault when the determined peak value is greater than the pre-determined threshold value.
The Fast Fourier transform (FFT) module can filter, upon determination of the fault, one or more frequency components associated with the monitor signal, wherein the frequency components are filtered to avoid pseudo fault conditions, wherein the frequency components are filtered to avoid pseudo fault conditions.
The root mean square (RMS) value determination module can obtain, if the fault persists, at least a root mean square (RMS) value for the monitor signal considering the filtered frequency components.
The protection module can compare the obtained RMS value with a pre-determined threshold setting value, and determining issuance of a trip signal when the obtained RMS value is greater than the pre-determined threshold setting value.
In contrast to the existing techniques of early fault detection, the present invention provides provide a system and method for predicting a peak value of a sinusoidal signal, preferably, on the basis of just two samples, making early detection possible and using this signal as just a trigger signal for a filter (Fast Fourier transform (FFT) filter) and not to generate a final trip signal, unlike the existing research favoring pseudo fault. It suits the need of the ability of a protection relay to take a trip decision “early” as well as “Correctly.”
Also, in contrast to the root locus method for early fault predictions which involves a lot of memory consumption, and since usage di (t)/dt for fault prediction along with i(t) puts forth a risk of pseudo fault detection which is not acceptable in the case of feeder protection, ensuring immunity to nuisance faults along with early fault prediction is a major challenge, the present invention provides a peak detection system and method using the instantaneous samples of signal i(t) and does not use di(t)/dt since the first and second order differential terms are known to be noisy. Also, for ensuring immunity to nuisance faults, according to the present invention, the final trip decision is not directly taken after the peak prediction and there is an intermediate noise removal block involved.
FIG. 1 illustrates an exemplary hardware circuitry 100 for transmitting a signal is to a controller for processing, in accordance with an embodiment of the present disclosure. FIG. 1 shows that a primary current is stepped down using a current transformer and is then converted into a voltage signal by placing a burden across the current transformed (CT) secondary. This voltage signal is amplified using an appropriate gain stage and filtered before sending to ADC
In an exemplary embodiment, an output of the circuit 100 is given as an input to Analog-to-digital converter (ADC) and a sinusoidal input signal in sensed by a controller through ADC. The proposed system and method, according to the present disclosure, enables to use two consecutive samples in order to estimate the peak value of the sinusoidal signal, before the input signal actually reaches to its peak value. This estimated peak is compared with a known threshold. In an example, this known threshold is nothing but the calculation of the pickup value based on the protection settings.
In an exemplary embodiment, if the estimated peak value is found to be greater than the known threshold value, then this could possibly be an indicator of a fault condition. This fault is validated for a few samples to check whether the fault still persists. If the fault persists then the trigger signal is given to a Fast Fourier Transform (FFT) module which determines the frequency components and using this, root mean square value is computed and this value is compared with a known threshold setting and if this value is found to be greater than the threshold value, a final trip signal is issued after the execution of the protection function.
In an exemplary embodiment, the system and method according to the present disclosure enables to identify a fault condition either by fault predictor method or with normal full cycle method which is 20 mS. Thus there is no possibility of delayed fault detection, instead the fault condition will be processed faster than all the existing methods (at least recited in the background section).
FIG. 2 illustrates an exemplary block diagram 200 of the proposed invention, in accordance with an embodiment of the present disclosure. In an exemplary embodiment, as shown in FIG. 2, the main components of the present disclosure are a peak predictor module 206 (also referred to as “peak predictor module”), a comparator module 208 (also referred to as “comparator”), a Fast Fourier transform (FFT) module 214 (also referred to as “FFT filter”), a root mean square (RMS) value determination module 216 (also referred to as “measurement module”), and a protection module 218.
In an exemplary embodiment, the peak predictor 206 takes current and previous sample of ADC 204 as inputs (the ADC 204 may receive the signal form a signal conditioning unit 202.), denoted by Ik and Ik+1 respectively at instants tk and tk+1 respectively.

I (k) = I. Sin (?0.tk) (1)
I (k+1) = I. Sin (?0.tk+1) = I. Sin [?0. ( tk + ?t)] (2)
I (k+1) = I. Sin (?0.tk). Cos (?0. ?t) + I.Sin (?0. ?t). Cos (?0.tk) (3)
(I(k+1 )-I(k).Cos(?0.?t))/(Sin(?0.?t)) = I.Cos (?0.tk) (4)
Adding squares of equations (1) and (4).
I²= (I^2 (k)+I^2 (k+1)-2.I(k).I(k+1).Cos(?0.?t))/([Sin(?0.?t)]²) (5)
Here, I indicate the peak value of the sinusoidal signal and this can be determined by two consecutive samples of the input signal. This calculated value will be correctly predicted only when the input sinusoidal signal is of fixed frequency.
In an exemplary embodiment, the comparator module 204 compares the estimated peak value with the fixed threshold value 210 (or predefined user setting/requirements). When the estimated peak value is greater than the threshold value 212, a fault sample counter is incremented. When the fault sample counter value reaches “N”, a trigger signal is issued to the Fast Fourier Transform module 214.
In an exemplary embodiment, the FFT Filter 214 enables to ensure that the protection relay does not issue a trip signal in case of pseudo faults, it is necessary to filter out the high frequency components and this done through this filter
In an exemplary embodiment, the measurement module 216 calculates the root mean square value of the signal taking into consideration frequency components till the nth harmonic.
In an exemplary embodiment, the protection module 218 compares the root mean square value generated by the measurement module 216 with the fixed threshold 220 (protection settings) to take a final trip decision (issuance of trip signal 222).
It may be appreciated that, the comparison happens twice. Once, in the comparator module and the second time in the protection module. This is because the peak predictor module assumes that the signal would be fixed (say 50Hz). This would be true under a steady state condition. But during load switching, transients affect the input signal frequency and the peak predictor is likely to give incorrect results. In feeder protection, nuisance trip is a major concern, so for the sake of ensuring that the designed module detects actual faults and not pseudo ones, result of the first comparison is just used as a trigger signal for further processing and is not going to be the only module deciding the final trip.
FIG. 3 illustrates an exemplary flow-chart 300 for determining a fault in a protection relay, in accordance with an embodiment of the present disclosure.
At step 302, a controller receives, in real-time, a monitor signal that is representative of a transmission signal on the protection relay. In an exemplary embodiment, the monitor signal is received in real time with the transmission signal. In another exemplary embodiment, the monitor signal is the transmission signal.
At step 304, the controller determines peak value of the monitor signal, wherein the peak value is determined before the transmission signal reaches a transmission peak value.
At step 306, the controller compares the determined peak value with a pre-determined threshold value. In an exemplary embodiment, the pre-determined threshold value is obtained from a pickup value based at least on one or more protection settings or is pre-set and/or is pre-configured.
At step 308, the controller determines the fault when the determined peak value is greater than the pre-determined threshold value.
At step 310, upon determination of the fault, one or more frequency components associated with the monitor signal are filtered to avoid pseudo fault conditions.
At step 312, if the fault persists, at least a root mean square (RMS) value is obtained for the monitor signal considering the filtered frequency components. In an exemplary embodiment, the fault is validated based on receipt of the monitor signal a plurality of time to determine if the fault persists.
At step 314, the obtained RMS value is compared with a pre-determined threshold setting value, and determining issuance of a trip signal when the obtained RMS value is greater than the pre-determined threshold setting value. In an exemplary embodiment, a protection function is executed before issuance of the trip signal. In an exemplary embodiment, the pre-determined threshold setting value is pre-set or pre-configured.
In an exemplary embodiment, the method enables to indicate the determination of the fault by at least recording the fault for subsequent retrieval. The recorded faults can be stored in a memory.
FIG. 4 illustrates an exemplary computer system 400 utilized for implementation of the proposed system in accordance with an exemplary embodiment of the present disclosure. In an embodiment, present invention can be implemented in the computer system 400 to enable aspects of the present disclosure. Embodiments of the present disclosure include various steps, which have been described above. A variety of these steps may be performed by hardware components or may be tangibly embodied on a computer-readable storage medium in the form of machine-executable instructions, which may be used to cause a general-purpose or special-purpose processor programmed with instructions to perform these steps. Alternatively, the steps may be performed by a combination of hardware, software, and/or firmware. As shown in the figure, computer system 400 includes an external storage device 410, a bus 420, a main memory 430, a read only memory 440, a mass storage device 450, communication port 460, and a processor 470. A person skilled in the art will appreciate that computer system 400 may include more than one processor and communication ports. Examples of processor 470 include, but are not limited to, an Intel® Itanium® or Itanium 2 processor(s), or AMD® Opteron® or Athlon MP® processor(s), Motorola® lines of processors, FortiSOC™ system on a chip processors or other future processors. Processor 470 may include various modules associated with embodiments of the present invention. Communication port 460 can be any of an RS-232 port for use with a modem based dialup connection, a 10/100 Ethernet port, a Gigabit or 10 Gigabit port using copper or fiber, a serial port, a parallel port, or other existing or future ports. Communication port 460 may be chosen depending on a network, such a Local Area Network (LAN), Wide Area Network (WAN), or any network to which computer system 700 connects. Memory 730 can be Random Access Memory (RAM), or any other dynamic storage device commonly known in the art. Read only memory 440 can be any static storage device(s) e.g., but not limited to, a Programmable Read Only Memory (PROM) chips for storing static information e.g., start-up or BIOS instructions for processor 470. Mass storage 450 may be any current or future mass storage solution, which can be used to store information and/or instructions. Exemplary mass storage solutions include, but are not limited to, Parallel Advanced Technology Attachment (PATA) or Serial Advanced Technology Attachment (SATA) hard disk drives or solid-state drives (internal or external, e.g., having Universal Serial Bus (USB) and/or Firewire interfaces), e.g. those available from Seagate (e.g., the Seagate Barracuda 7200 family) or Hitachi (e.g., the Hitachi Deskstar 7K1000), one or more optical discs, Redundant Array of Independent Disks (RAID) storage, e.g. an array of disks (e.g., SATA arrays), available from various vendors including Dot Hill Systems Corp., LaCie, Nexsan Technologies, Inc. and Enhance Technology, Inc. Bus 420 communicatively couples processor(s) 470 with the other memory, storage and communication blocks. Bus 720 can be, e.g. a Peripheral Component Interconnect (PCI) / PCI Extended (PCI-X) bus, Small Computer System Interface (SCSI), USB or the like, for connecting expansion cards, drives and other subsystems as well as other buses, such a front side bus (FSB), which connects processor 470 to software system. Optionally, operator and administrative interfaces, e.g. a display, keyboard, and a cursor control device, may also be coupled to bus 720 to support direct operator interaction with computer system 400. Other operator and administrative interfaces can be provided through network connections connected through communication port 460. External storage device 410 can be any kind of external hard-drives, floppy drives, IOMEGA® Zip Drives, Compact Disc - Read Only Memory (CD-ROM), Compact Disc - Re-Writable (CD-RW), Digital Video Disk - Read Only Memory (DVD-ROM). Components described above are meant only to exemplify various possibilities. In no way should the aforementioned exemplary computer system limit the scope of the present disclosure.
The various illustrative logical blocks, modules and circuits and algorithm steps described herein may be implemented or performed as electronic hardware, software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. It is noted that the configurations may be described as a process that is depicted as a flowchart, a flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe the operations as a sequential process, many of the operations can be performed in parallel or concurrently. In addition, the order of the operations may be re-arranged. A process is terminated when its operations are completed. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. When a process corresponds to a function, its termination corresponds to a return of the function to the calling function or the main function.
When implemented in hardware, various examples may employ a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array signal (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core or any other such configuration.
When implemented in software, various examples may employ firmware, middleware or microcode. The program code or code segments to perform the necessary tasks may be stored in a computer-readable medium or processor-readable medium such as a storage medium or other storage(s). A processor may perform the necessary tasks. A code segment may represent a procedure, a function, a subprogram, a program, a routine, a subroutine, a module, a software package, a class, or any combination of instructions, data structures, or program statements. A code segment may be coupled to another code segment or a hardware circuit by passing and/or receiving information, data, arguments, parameters, or memory contents. Information, arguments, parameters, data, etc. may be passed, forwarded, or transmitted via any suitable means including memory sharing, message passing, token passing, network transmission, etc.
As used in this application, the terms "component," "module," "system," and the like are intended to refer to a computer-related entity, either hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to being, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and/or a computer. By way of illustration, both an application running on a computing device and the computing device can be a component. One or more components can reside within a process and/or thread of execution and a component may be localized on one computer and/or distributed between two or more computers. In addition, these components can execute from various computer readable media having various data structures stored thereon. The components may communicate by way of local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network such as the Internet with other systems by way of the signal).
In one or more examples herein, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium or processor-readable medium. A processor- readable media and/or computer-readable media include both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer- readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium or processor-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and blue-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. Software may comprise a single instruction, or many instructions, and may be distributed over several different code segments, among different programs and across multiple storage media. An exemplary storage medium may be coupled to a processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor.
One or more of the components, steps, and/or functions illustrated in the Figures may be rearranged and/or combined into a single component, step, or function or embodied in several components, steps, or functions. Additional elements, components, steps, and/or functions may also be added without departing from the invention. The novel algorithms described herein may be efficiently implemented in software and/or embedded hardware.
Those of skill in the art would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.
As used herein, and unless the context dictates otherwise, the term “coupled to” is intended to include both direct coupling (in which two elements that are coupled to each other or in contact each other) and indirect coupling (in which at least one additional element is located between the two elements). Therefore, the terms “coupled to” and “coupled with” are used synonymously. Within the context of this document terms “coupled to” and “coupled with” are also used euphemistically to mean “communicatively coupled with” over a network, where two or more devices are able to exchange data with each other over the network, possibly via one or more intermediary device.