Claims:1. A system (100) for digital pulse compression, said system comprising:
a receiver transducer array (104) that receives a set of signals reflected from an object in response to a transmitted signal;
an analog front end (AFE) (112) coupled to the receiver transducer array (104), the AFE (112) converts the received set of signals to a digital set of data, the digital set of data stored in a data buffer;
a pulse compression unit (114) coupled to the AFE, the pulse compression unit performs faster digital pulse compression on the digital set of data, the pulse compression unit comprising:
an input data management unit (IDMU) (202) that receives the digital set of data from the data buffer, the digital set of data are segregated into data blocks of fixed size, wherein the size is determined by user;
a transmit signal replica generation unit (TSRGU) (204) generates the transmit signals and stores the processed transmit signals in a shared memory (208), the shared memory coupled to the TSRGU;
a plurality of bandpass pulse compression units (BPCUs) (206) coupled to the IDMU, each of the plurality of BPCUs receive the data blocks assigned by the IDMU, the plurality of BPCUs receive the stored transmit signal from the shared memory, wherein the transmit signal from the shared memory is multiplied with the received data blocks in each of the plurality of BPCUs to perform pulse compression in frequency domain on a range-cell basis; and
an output data management unit (ODMU) (210) coupled to each of the plurality of BPCUs, the ODMU receives the output set of data from each of the plurality of BPCUs to be arranged in a desired manner.
2. The system as claimed in claim 1, wherein the pulse compression unit (114) is a fast digital pulse compression unit (FDPCU), the FDPCU is implemented in any or a combination of commercial of the shelf (COTS) hardware and custom made dedicated digital signal processing (DSP) hardware, wherein a plurality of processing entities is configured to perform in an independent and parallel manner.
3. The system as claimed in claim 1, wherein the IDMU (202) assigns plurality of BPCUs to the plurality of processing entities available in the system, each of the plurality of BPCUs process the received data blocks in parallel and independent to each other, wherein the IDMU monitors the status of the plurality of BPCUs and assigns new data blocks to the plurality of BPCUs upon completion of previous process.
4. The system as claimed in claim 1, wherein the TSRGU (204) converts generated transmit signal to frequency domain, wherein the TSRGU performs any or a combination of bandpass filtering and baseband conversion in frequency domain and stores the complex conjugate of the processed transmit signal in the shared memory.
5. The system as claimed in claim 1, wherein the plurality of BPCUs (206) receive data block from IDMU, the data corresponding to a range-cell is selected from the assigned data block by a data segmentation unit of the BPCU, the plurality of BPCUs performs any or a combination of bandpass filtering and baseband conversion in frequency domain to form baseband range-cell data.
6. The system as claimed in claim 5, wherein the plurality of BPCUs (206) receive processed transmit signal from the shared memory, the plurality of BPCUs multiplies the baseband range-cell data with processed transmit signal to form a product signal.
7. The system as claimed in claim 6, wherein the plurality of BPCUs (206) convert the product signal to time-domain and detects peak of the time-domain signal, wherein the data segmentation unit of the BPCUs selects next range-cell from data block by shifting the range-cell window corresponding to resolution of the system.
8. The system as claimed in claim 7, wherein the plurality of BPCUs (206) store all the peak data corresponding to each range-cell to a one-dimensional array and forwards the one-dimensional array along with data block number to the ODMU.
9. The system as claimed in claim 8, wherein the ODMU (210) polls the status of plurality of BPCUs and receives the processed output set of data and data block number from the BPCUs upon process completion, wherein the ODMU stores the processed output set of data in an output data array, wherein the contents of output data array are stored in an output data buffer.
10. A method (600) for digital pulse compression, said method comprising:
receiving (602), at a receiver transducer array, a set of signals reflected from an object in response to a transmitted signal;
converting (604), at an analog front end (AFE), the received set of signals to a digital set of data; the AFE coupled to the receiver transducer array, the digital set of data is stored in a data buffer;
performing (606), at a pulse compression unit, the faster digital pulse compression of the digital set of data, the pulse compression unit coupled to the AFE;
receiving (608), at an input data management unit (IDMU) configured in the pulse compression unit, the digital set of data from the data buffer, the digital set of data are segregated into data blocks of fixed size, wherein the size is determined by user.
generating (610), at a transmit signal replica generation unit (TSRGU), transmit signals and storing the processed transmit signals in a shared memory, the shared memory coupled to the TSRGU;
receiving (612), at a plurality of bandpass pulse compression units (BPCUs), the data blocks assigned by IDMU, the plurality of BPCUs receive the stored transmit signal from the shared memory, wherein the transmit signal from the shared memory is multiplied with the received data blocks in each of the plurality of BPCUs to perform pulse compression in frequency domain on a range-cell basis; and
arranging (614), at an output data management unit (ODMU), the output set of data received from each of the plurality of BPCUs in a desired manner.
, Description:TECHNICAL FIELD
[0001] The present disclosure relates, in general, to digital data processing of radar and sonar systems employing frequency-modulated transmitter pulses, and more specifically, relates to a system and method for fast digital pulse compression employed in radar and sonar receivers.

BACKGROUND
[0002] Pulse compression is a signal processing technique commonly used by radar, sonar and echography to increase the range resolution as well as the signal to noise ratio. This is achieved by modulating the transmitted pulse and then correlating the received signal with the transmitted pulse. Usage of frequency-modulated pulses for transmission has been known in the art.
[0003] Various implementation of digital pulse compression known in the art describes a digital pulse compression method in frequency domain. The sampled and digitized echo signals are converted to frequency domain using discrete Fourier transform. This signal is multiplied by the complex conjugate of the discrete Fourier transform of a replica of the transmitter pulse to obtain product signal. The compressed pulse is obtained by computing an inverse discrete Fourier transform of the product signal. An existing system may include digital pulse compression filter for use in a radar or sonar transmitting and receiving unit to process sampled and digitized signals.
[0004] Another existing system may process digital pulse compressed radar data which provides high-throughput radar signal processing by breaking the signal processing chain into a series of independent data processing units (DPUs) that execute independently and in parallel. However, although multiple pulse compression technologies exist today, these technologies suffer from limitations of extensive and costly hardware and software to meet real-time requirements.
[0005] Therefore, there is a need in the art to provide a means that enables faster digital pulse compression technique realizable on the commercial of the shelf (COTS) hardware or custom made dedicated digital signal processing hardware.
OBJECTS OF THE PRESENT DISCLOSURE
[0006] An object of the present disclosure relates, in general, to digital data processing of radar and sonar systems employing frequency-modulated transmitter pulses, and more specifically, relates to a system and method for fast digital pulse compression employed in radar and sonar receivers.
[0007] Another object of the present disclosure is to provide a system that performs faster digital pulse compression effectively.
[0008] Another object of the present disclosure is to provide a system that divides the received data into multiple sections and processes the data in a parallel manner, thus reducing the execution time.
[0009] Another object of the present disclosure is to provide a system that makes use of all available processing entities parallelly for efficient signal processing, and reduces the processing time.
[0010] Another object of the present disclosure is to provide a system that include FDPCU that can be implemented in any or a combination of commercial of the shelf (COTS) hardware and custom made dedicated digital signal processing hardware, where several processing entities are available, which can run independently and parallelly.
[0011] Another object of the present disclosure provides the FDPCU that do not require any communication between parallel processing entities.
[0012] Another object of the present disclosure is to provide a system that converts the received data into frequency domain on a range cell basis resulting in a saving of 'm' computations for a bandpass filter of order 'm', thereby reducing computational load.
[0013] Another object of the present disclosure is to provide a system that implements baseband conversion in digital domain, which makes the system suitable for hardware without analogue mixer circuits.
[0014] Yet another object of the present disclosure provides the FDPCU that employs efficient utilization of memory by storing processed transmit signal in the shared memory, which can be accessed by all the processing entities in the system.
SUMMARY
[0015] The present disclosure relates, in general, to digital data processing of radar and sonar systems employing frequency-modulated transmitter pulses, and more specifically, relates to a system and method for fast digital pulse compression employed in radar and sonar receivers.
[0016] The present disclosure enables fast digital pulse compression technique realizable on the commercial of the shelf (COTS) hardware or custom made dedicated digital signal processing hardware. The system enhances the speed of digital pulse compression by maximum utilization of available processing resources and frequency domain processing. The system divides the received data into multiple sections and processes the data in a parallel and independent manner. The method converts the received data into frequency domain on a range cell basis, does bandpass filtering, baseband conversion and matched filtering (replica correlation) in the frequency domain. The system employs a novel architecture, which requires no communication between parallel processing entities, which simplifies implementation. The system employs efficient utilization of memory by storing processed transmit signal in shared memory which can be accessed by all the processing entities in the system. The system can be implemented on processing systems with any number of processing entities.
[0017] In an aspect, the present disclosure provides a system for digital pulse compression, the system includes a receiver transducer array that receives a set of signals reflected from an object in response to a transmitted signal, an analog front end (AFE) coupled to the receiver transducer array, the AFE converts the received set of signals to a digital set of data, the digital set of data stored in a data buffer, a pulse compression unit coupled to the AFE, the pulse compression unit performs faster digital pulse compression on the digital set of data, the pulse compression unit comprising an input data management unit (IDMU) that receives the digital set of data from the data buffer, the digital set of data are segregated into data blocks of fixed size, wherein the size is determined by user, a transmit signal replica generation unit (TSRGU) generates the transmit signals and stores the processed transmit signals in a shared memory, the shared memory coupled to the TSRGU, a plurality of bandpass pulse compression units (BPCUs) coupled to the IDMU, each of the plurality of BPCUs receive the data blocks assigned by the IDMU, the plurality of BPCUs receive the stored transmit signal from the shared memory, wherein, the transmit signal from the shared memory is multiplied with the received data blocks in each of the plurality of BPCUs to perform pulse compression in frequency domain on a range-cell basis; and an output data management unit (ODMU) coupled to each of the plurality of BPCUs, the ODMU receives the output set of data from each of the plurality of BPCUs to be arranged in a desired manner.
[0018] In an embodiment, the pulse compression unit is a fast digital pulse compression unit (FDPCU), the FDPCU is implemented in any or a combination of commercial of the shelf (COTS) hardware and custom made dedicated digital signal processing (DSP) hardware, wherein a plurality of processing entities is configured to perform in an independent and parallel manner.
[0019] In another embodiment, the IDMU assigns plurality of BPCUs to the plurality of processing entities available in the system, each of the plurality of BPCUs process the received data blocks in parallel and independent to each other, wherein the IDMU monitors the status of the plurality of BPCUs and assigns new data blocks to the plurality of BPCUs upon completion of previous process.
[0020] In another embodiment, the TSRGU converts generated transmit signal to frequency domain, wherein the TSRGU performs any or a combination of bandpass filtering and baseband conversion in frequency domain and stores the complex conjugate of the processed transmit signal in the shared memory.
[0021] In another embodiment, the plurality of BPCUs receive data block from IDMU, data corresponding to a range-cell is selected from the assigned data block by data segmentation unit of BPCU, the plurality of BPCUs performs any or a combination of bandpass filtering and baseband conversion in frequency domain to form baseband range-cell data.
[0022] In another embodiment, the plurality of BPCUs receive processed transmit signal from the shared memory, the plurality of BPCUs multiplies the baseband range-cell data with processed transmit signal to form a product signal.
[0023] In another embodiment, the plurality of BPCUs convert the product signal to time-domain and detects peak of the time-domain signal, wherein the data segmentation unit of BPCU selects next range-cell from data block by shifting the range-cell window corresponding to resolution of the system.
[0024] In another embodiment, the plurality of BPCUs store all the peak data corresponding to each range-cell to a one-dimensional array and forwards the one-dimensional array along with data block number to ODMU.
[0025] In another embodiment, the ODMU polls the status of plurality of BPCUs and receives processed output set of data and data block number from the BPCUs upon process completion, wherein the ODMU stores the processed output set of data in an output data array, wherein the contents of output data array are stored in output data buffer.
[0026] In an aspect, the present disclosure provides a method for digital pulse compression, the method comprising: receiving, at a receiver transducer array, a set of signals reflected from an object in response to a transmitted signal, converting, at an analog front end (AFE), the received set of signals to a digital set of data; the AFE coupled to the receiver transducer array, the digital set of data is stored in a data buffer, performing, at a pulse compression unit, the pulse compression on the digital set of data, the faster digital pulse compression unit coupled to the AFE, receiving, at an input data management unit (IDMU) configured in the pulse compression unit, the digital set of data from the data buffer, the digital set of data are segregated into data blocks of fixed size, wherein the size is determined by user, generating, at a transmit signal replica generation unit (TSRGU), transmit signals and storing the processed transmit signals in a shared memory, the shared memory coupled to the TSRGU, receiving, at a plurality of bandpass pulse compression units (BPCUs), the data blocks assigned by IDMU, the plurality of BPCUs receive the stored transmit signal from the shared memory, wherein, the transmit signal from the shared memory is multiplied with the received data blocks in each of the plurality of BPCUs to perform pulse compression in frequency domain on a range-cell basis; and arranging, at an output data management unit (ODMU), the output set of data received from each of the plurality of BPCUs in a desired manner.
[0027] Various objects, features, aspects, and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.

BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The following drawings form part of the present specification and are included to further illustrate aspects of the present disclosure. The disclosure may be better understood by reference to the drawings in combination with the detailed description of the specific embodiments presented herein.
[0029] FIG. 1A illustrates an exemplary representation of radar and sonar systems for faster digital pulse compression, in accordance with an embodiment of the present disclosure.
[0030] FIG. 1B illustrates an exemplary functional components of fast digital pulse compression unit (FDPCU), in accordance with an embodiment of the present disclosure.
[0031] FIG. 2 is a high-level flow diagram illustrating the working of input data management unit (IDMU), in accordance with an embodiment of the present disclosure.
[0032] FIG. 3 illustrates an exemplary process in bandpass pulse compression unit (BPCU), in accordance with an embodiment of the present disclosure.
[0033] FIG. 4 illustrates an exemplary block diagram of transmit signal replica generation unit (TSRGU), in accordance with an embodiment of the present disclosure.
[0034] FIG. 5 is a high-level flow diagram illustrating the working of output data management unit (ODMU), in accordance with an embodiment of the present disclosure.
[0035] FIG. 6 illustrates an exemplary flow diagram of a method for faster digital pulse compression, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0036] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
[0037] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0038] The present disclosure relates, in general, to digital data processing of radar and sonar systems employing frequency-modulated transmitter pulses, and more specifically, relates to a system and method for fast digital pulse compression employed in radar and sonar receivers.
[0039] The present disclosure enables fast digital pulse compression technique realizable on the commercial of the shelf (COTS) hardware or custom made dedicated digital signal processing hardware. The system enhances the speed of digital pulse compression by maximum utilization of available processing resources and frequency domain processing. The system divides the received data into multiple sections and processes the data in a parallel and independent manner. The method converts the received data into frequency domain on a range cell basis, does bandpass filtering, baseband conversion and matched filtering (replica correlation) in the frequency domain. The system employs a novel architecture, which requires no communication between parallel processing entities, which simplifies implementation. The system employs efficient utilization of memory by storing processed transmit signal in shared memory which can be accessed by all the processing entities in the system. The system can be implemented on processing systems with any number of processing entities. The present disclosure can be described in enabling detail in the following examples, which may represent more than one embodiment of the present disclosure.
[0040] FIG. 1A illustrates an exemplary representation of radar and sonar systems for faster digital pulse compression, in accordance with an embodiment of the present disclosure.
[0041] Referring to FIG. 1A, radar/sonar system 100 (also referred to as a system 100, herein) may be configured to perform faster digital pulse compression. The system 100 may include a transmitting antenna/transducer array 102 that may transmit radio/sound waves and a receiving antenna/transducer array 104 (also referred to as receiver transducer array 104) that may capture and process the reflected waves from the target. The system 100 may include a waveform generator 106 that may generate a waveform which is amplified by a power amplifier 110. A timing and control unit 108 coupled to the waveform generator 106. In the current case, the transmitting waveform is a frequency modulated waveform pulse. The power amplifier 110 output is fed to transmitting antenna/transducer array 102. The transmitting antenna/transducer array 102 may generate radio/sound waves, which propagates through a medium in which they are operating. These waves hit on the targets/objects on their path and a portion of waves is reflected. These reflected waves or echoes may be captured by receiving antenna/transducer array 104.
[0042] In an embodiment, both transmitting and receiving antennas (102, 104) may be the same. In that case, receive part is decoupled during transmission and transmit part is decoupled during the reception by means of a transmit/receive switch. In another embodiment, analogue front end (AFE) 112 may be configured to receive the reflected waves from the receiving antenna/transducer array 104, where the receiving antenna/transducer array 104 output may be weak, a noisy analogue signal with very low signal to noise ratios (SNR). These signals need to be amplified, filtered from noise and converted to digital form. The AFE 112 configured to receive the reflected waves from the receiving antenna/transducer array 104 to convert to a digital form.
[0043] In an implementation, the receiver transducer array 104 receives a set of signals reflected from the object in response to the transmitted signal, the AFE 112 may be coupled to the receiver transducer array 104, the AFE may convert the received set of signals to a digital set of data, the digital set of data stored in a data buffer. The pulse compression unit 114 coupled to the AFE 112, the pulse compression unit 114 may perform faster digital pulse compression on the digital set of data.
[0044] For example, these digitized signals are to be pulse compressed by means of the pulse compression unit 114. Pulse compression is a signal processing technique commonly used by radar, sonar and echography to increase the range resolution as well as the signal to noise ratio. This is achieved by modulating the transmitted pulse and then correlating the received signal with the transmitted pulse. The pulse compression unit 114 can be coupled to the signal processing unit 116, the pulse compressed data is fed to radar/sonar signal processing unit 116 for various processing.
[0045] In an exemplary embodiment, the pulse compression unit 114 may be a fast digital pulse compression unit (FDPCU), the FDPCU (illustrated in FIG.1B and described in detail below). The FDPCU may reduce the processing time by 'n' times or better, where 'n' is the number of processing entities available in the system 100. The FDPCU can be implemented in any or a combination of commercial of the shelf (COTS) hardware and custom made dedicated digital signal processing hardware, where several processing entities may be available which can run independently and parallelly. The FDPCU can be implemented using any or a combination of COTS software, where the software can utilize several processing entities available in the hardware independently and parallelly. The FDPCU require no communication between parallel processing entities. The FDPCU may employ efficient utilization of memory by storing processed transmit signal in shared memory, which can be accessed by all the processing entities in the system 100.
[0046] In another embodiment, in the case of imaging radars/sonars, there may be an image processing unit 118 for implementing various image processing techniques. Next, data is fed to a detection and classification unit 120 which search for targets in received signals and classify the targets. The detection and classification unit 120 coupled to the image processing unit 118. A display 122 may be coupled to the detection and classification unit 120, where the display 122 may be used to present radar data, images, or information received or processed by the detection and classification unit 120.
[0047] FIG. 1B illustrates an exemplary functional components of fast digital pulse compression unit (FDPCU), in accordance with an embodiment of the present disclosure.
[0048] Referring to FIG. 1B, the FDPCU 114 may be configured for faster pulse compression by utilizing all the processing resources of the system 100. The FDPCU 114 may include an input data management unit (IDMU) 202, a transmit signal replica generation unit (TSRGU) 204, one or more bandpass pulse compression units (BPCUs) ((206-1, 206-2 to 206-N) which are collectively referred to as one or more BPCUs 206, hereinafter), a shared memory 208, and an output data management unit (ODMU) 210.
[0049] In an embodiment, the digitized data from the AFE 112 may be stored in the receive data buffer. The IDMU 202 may receive the digital set of data from the data buffer, the digital set of data are segregated into data blocks of fixed size, wherein the size may be determined by the user. The IDMU 202 may read data from the receive data buffer, segregates the data into data blocks of fixed size, assigns data blocks to various processing entities available in the system 100, and feeds the data blocks to each of the one or more BPCUs 206.
[0050] The TSRGU 204 may generate the transmit signals and may store the processed transmit signals in the shared memory 208, where the shared memory 208 coupled to the TSRGU 204. The TSRGU 204 may generate the transmit waveform, convert the transmit waveform to the frequency domain. The TSRGU 204 may perform bandpass filtering, baseband conversion, and finally store the complex conjugate of the transmit replica signal in the shared memory 208.
[0051] The one or more BPCUs 206 may be coupled to the IDMU 204, each of the one or more BPCUs 206 may receive the data blocks assigned by the IDMU 204, the one or more BPCUs may also receive the stored transmit signal from the shared memory 208, where the transmit signal from the shared memory 208 may be multiplied with the received data blocks in each of the one or more BPCUs to perform pulse compression in the frequency domain on a range-cell basis. Each of the BPCUs 206 may receive the data block assigned by IDMU 204, and read the processed transmit replica signal (also interchangeably referred to as transmit signal) from the shared memory 208. Each of the one or more BPCUs 206 may perform bandpass filtering, baseband conversion and digital pulse compression in the frequency domain on the range-cell basis.
[0052] The ODMU 210 may accept data output from each of the one or more BPCUs 206 and arrange the output set of data in proper order before feeding it into the signal processing unit 116 for further processing. Data is fed to the detection and classification unit 120 which search for targets in received signals and classify the targets. The display 122 may be coupled to the detection and classification unit 120, where the display 122 may be used to present the information received or processed by the detection and classification unit 120.
[0053] The embodiments of the present disclosure described above provide several advantages. The one or more of the embodiments provide the system 100 that performs faster digital pulse compression effectively. The system 100 reduces the processing time by 'n' times or better, where 'n' is the number of processing entities available in the system 100. The FDPCU can be implemented in any or a combination of commercial of the shelf (COTS) hardware and custom made dedicated digital signal processing hardware, where several processing entities are available, which can run independently and parallelly. The system 100 divides the received data into multiple sections and processes the data in a parallel manner, thus reducing the execution time. The present disclosure provides the FDPCU that do not require any communication between parallel processing entities.
[0054] FIG. 2 is a high-level flow diagram illustrating the working of input data management unit (IDMU), in accordance with an embodiment of the present disclosure.
[0055] Initially, IDMU 202 may read the number of processing entities, 'n' available in the system 100 in which the radar/sonar signal processing is performed. The processing system can be any or a combination of a generic multicore computer system, or a field-programmable gate array (FPGA) based system, a System-on-a-chip (SoC) based system or similar systems with more than one processing entities. A processing entity can be anything, which can process data independently and parallelly in such a system. For example, in the generic multicore computer system, which employs a multi-core central processing unit (CPU), the number of processing entities is the number of processing cores available.
[0056] For instance, let the number of processing entities available in the system be four. Assign n = 4. Assign p =1 and d=1. The digitized data from AFE 112 may be stored in the receive data buffer. The receive data buffer can be any form of data storage means in the system under consideration. IDMU 202 may read a data block of size 'S' from the receive data buffer. The size of the data block can be decided by the user based on the amount of data to be processed, the processing capacity of the processing entities and available primary memory space. Primary memory is a fast means for data storage. It is frequently accessed by the processing entities.
[0057] The data block can be a portion of a single ping data, entire ping data itself or data of multiple pings. A ping is a pulse of the wave transmitted by the system 100. The ping data is the data obtained after digitisation of received reflected signal from the target (echo or backscatter). For a higher range of radar/sonar, data block can be a portion of a single ping data. Entire ping data itself may be too heavy on memory and processing entities in this case. On the other hand, for a shorter range of radar/sonar, data block can be entire ping data itself. Dividing ping data into multiple blocks may be inefficient in this case. Likewise, the proposed method efficiently utilizes available resources. The IDMU with the number of processing entities available in the system (n), it assigns each processing entity a bandpass pulse compression unit (BPCU) to run. The BPCUs 206 runs on the one or more processing entities.
[0058] For example, 'n' BPCUs runs parallelly and independently thus providing faster outputs. In the current example (n=4) there are four BPCUs 206 running parallelly: BPCU 1, BPCU 2, BPCU 3 and BPCU 4 respectively. Let the data block be entire ping data. IDMU reads the data block from the receive data buffer and assigns it to BPCU 1. Then next data block is read and is assigned to BPCU 2. Then next data block to BPCU 3. Then the next data block to BPCU 4. After assigning the data blocks to BPCUs 206, IDMU may poll the processing status of the BPCUs. If BPCUs finish the job and becomes available, IDMU may assign new data blocks to them till the receive data finishes or system stops execution, IDMU continues the operation.
[0059] Thus, the IDMU 202 may assign one or more BPCUs 206 to the processing entities available in the system, each of the one or more BPCUs 206 may process the received data blocks in parallel and independent to each other, where the IDMU 202 may monitor the status of the BPCUs 206 and assigns new data blocks to the BPCUs 206 upon completion of the previous process.
[0060] FIG. 3 illustrates an exemplary process in bandpass pulse compression unit (BPCU), in accordance with an embodiment of the present disclosure.
[0061] As shown in FIG. 3, the one or more BPCUs 206 may receive the data block assigned by IDMU 202, the one or more BPCUs 206 may read the processed transmit replica signal from the shared memory 208 and may perform bandpass filtering, baseband conversion and digital pulse compression in the frequency domain on the range-cell basis. Pulse compression involves correlating received signal with transmit signal in the time domain. This can be done in the frequency domain by multiplying the frequency-domain received signal with the complex conjugate of the frequency domain transmit signal. The processing is implemented in frequency domain for efficient execution.
[0062] Data blocks assigned by IDMU 202 are divided into multiple data segments on a range-cell basis by a data segmentation unit of the one or more BPCUs 206. The range-cell is a segment of receive data corresponding to the pulse period of radar/sonar. The data corresponding to a range-cell is selected from the assigned data block by the data segmentation unit of the BPCU 206, the one or more BPCUs 206 may perform any or a combination of bandpass filtering and baseband conversion in the frequency domain to form baseband range-cell data.
[0063] For instance, if the pulse period is 10 ms, then range-cell is a set of receive data samples for a duration of 10 ms. Now, this range-cell data is converted into the frequency domain by means of a Fast Fourier Transform (FFT). This frequency-domain samples may undergo baseband conversion followed by bandpass filtering. This may reduce the processing load for pulse compression. Replica of the transmitted signal is converted to the frequency domain using FFT, converted to baseband followed by bandpass filtering in the frequency domain, and is stored in the shared memory208 by the TSRGU 204. This is a one-time process.
[0064] Thus, the system 100 can convert the received data into frequency domain on the range cell basis resulting in a saving of 'm' computations for a bandpass filter of order 'm', thereby reducing computational load. The system 100 may implement baseband conversion in digital domain, which makes the system suitable for hardware without analogue mixer circuits. The present disclosure provides the system 100 that makes use of all available processing entities parallelly for efficient signal processing.
[0065] FIG. 4 illustrates an exemplary block diagram of transmit signal replica generation unit (TSRGU), in accordance with an embodiment of the present disclosure.
[0066] Referring to FIG. 4, the processed transmit signal may be accessed by all the one or more BPCUs 206 running parallelly. The shared memory 208 can be a fast means of data storage which can be accessed by all the processing entities in the system 100. Each processing entity may read the samples from the shared memory 208. The one or more BPCUs 206 may multiply the baseband range-cell data with processed transmit signal to form a product signal, the one or more BPCUs 206 may convert the product signal to the time-domain and detect peak of the time-domain signal, where the data segmentation unit of the BPCUs select next range-cell from data block by shifting the range-cell window corresponding to resolution of the system 100.
[0067] Pulse compression can be implemented in the time domain by correlation of transmit signal replica with the received signal. Pulse compression can be implemented in the frequency domain by multiplying the received signal FFT samples with complex conjugated transmit signal replica FFT samples. The conjugated replica FFT samples read from shared memory 202 is multiplied by receive data FFT samples in each processing entities. This may enable faster processing.
[0068] The result may be converted to the time domain by means of the inverse Fourier transform (IFFT). Now, the correlated output is in the time domain. The correlation peak detector as illustrated in FIG. 3 may detect the peak from the output. The next range-cell data may be selected from the assigned data block by means of shifting the range-cell window. The number of samples to be shifted depends on the resolution of the system 100. For instance, if the resolution of the system is 1meter, new samples corresponding to 1 meter may be added and old samples may be removed from range-cell data. Again, the new range-cell data undergoes all the above process and the peak sample is generated. The process continues till the end of the assigned data block, producing a set of output data. This set of data is stored in a one-dimensional array. Upon completion of processing, each of the one or more BPCUs 206 may forward this array along with the data block number assigned by IDMU 202 to the ODMU 210.
[0069] FIG. 5 is a high-level flow diagram illustrating the working of output data management unit (ODMU), in accordance with an embodiment of the present disclosure.
[0070] Referring to FIG. 5, the one or more BPCUs 206 may store all the peak data corresponding to each range-cell to a one-dimensional array and may forward the one-dimensional array along with data block number to the ODMU 210. The ODMU 210 may accept the data output from various one or more BPCUs 204 and arrange the output data in proper order/desired manner before feeding it into the signal processing unit 116. The ODMU 210 may read the number of processing entities, 'n' available in the system 100 in which the radar/sonar signal processing is performed. The block continuously polls the status of the one or more BPCUs 206. If any of the BPCUs 206 completes processing, the corresponding processed output and data block number 'd' is read from the one or more BPCUs 206.
[0071] The processed output may be stored in dth entry of output data array which is a two-dimensional array. This process continues for 'n' times till outputs of all the one or more BPCUs 206 are stored in an output data array. The array of processed data may be arranged in the proper order (i.e., the order in which data blocks are assigned to the one or more BPCUs). The contents of the output data array may be stored in an output data buffer, which may be read by further processing blocks. Till the receive data finishes or system stops execution, ODMU 210 continues this operation.
[0072] FIG. 6 illustrates an exemplary flow diagram of a method 600 for faster digital pulse compression, in accordance with an embodiment of the present disclosure.
[0073] Referring to FIG. 6, at block 602, the receiver transducer array may receive a set of signals reflected from an object in response to a transmitted signal. At block 604, the AFE coupled to the receiver transducer array, the AFE may convert the received set of signals to a digital set of data, the digital set of data stored in a data buffer. At block 606, the pulse compression unit coupled to the AFE, the pulse compression unit may perform faster digital pulse compression on the digital set of data.
[0074] At block 608, the IDMU configured in the pulse compression unit may receive the digital set of data from the data buffer, the digital set of data are segregated into data blocks of fixed size, wherein the size is determined by user. At block 610, the TSRGU may generate the transmit signals and stores the processed transmit signals in a shared memory, the shared memory coupled to the TSRGU.
[0075] At block 612, the one or more BPCUs coupled to the IDMU, each of the one or more BPCUs may receive the data blocks assigned by the IDMU, the one or more BPCUs receive the stored transmit signal from the shared memory, where the transmit signal from the shared memory is multiplied with the received data blocks in each of the BPCUs to perform pulse compression in frequency domain on a range-cell basis. At block 614, the ODMU coupled to each of the one or more BPCUs, the ODMU may receive the output set of data from each of the one or more BPCUs to be arranged in desired manner.
[0076] It will be apparent to those skilled in the art that the system 100 of the disclosure may be provided using some or all of the mentioned features and components without departing from the scope of the present disclosure. While various embodiments of the present disclosure have been illustrated and described herein, it will be clear that the disclosure is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the scope of the disclosure, as described in the claims.

ADVANTAGES OF THE PRESENT DISCLOSURE
[0077] The present disclosure provides a system that performs faster digital pulse compression effectively.
[0078] The present disclosure provides a system that divides the received data into multiple sections and processes the data in a parallel manner, thus reducing the execution time.
[0079] The present disclosure provides a system that makes use of all available processing entities parallelly for efficient signal processing, and reduces the processing time.
[0080] The present disclosure provides a system that include FDPCU that can be implemented in any or a combination of commercial of the shelf (COTS) hardware and custom made dedicated digital signal processing hardware, where several processing entities are available, which can run independently and parallelly.
[0081] The present disclosure provides the FDPCU that do not require any communication between parallel processing entities.
[0082] The present disclosure provides the FDPCU that employs efficient utilization of memory by storing processed transmit signal in the shared memory, which can be accessed by all the processing entities in the system.
[0083] The present disclosure provides a system that converts the received data into frequency domain on a range cell basis resulting in a saving of 'm' computations for a bandpass filter of order 'm', thereby reducing computational load.
[0084] The present disclosure provides a system that implements baseband conversion in digital domain, which makes the system suitable for hardware without analogue mixer circuits.