DESC: FORM 2
The Patent Act 1970
(39 of 1970)
&
The Patent Rules, 2005

COMPLETE SPECIFICATION
(SEE SECTION 10 AND RULE 13)

TITLE OF THE INVENTION
“Method and a system for network clock synchronization”

APPLICANTS:

Name Nationality Address
SAMSUNG R&D Institute India - Bangalore Private Limited India # 2870, Orion Building, Bagmane Constellation Business Park, Outer Ring Road, Doddanekundi Circle, Marathahalli Post, Bangalore-560037, India

The following specification particularly describes and ascertains the nature of this invention and the manner in which it is to be performed:-

TECHNICAL FIELD
The embodiments herein generally relate to field of wireless communication and more particularly to network clock synchronization in the wireless communication.

BACKGROUND
Wireless communication technologies such as 5G and 4G that provide higher data rates and enable device-to-device (D2D), Machine Type communication (MTC) or the like may lead to an exponential growth in data traffic volume in coming future. Precise clock synchronization among nodes of the network is critical in a network to maintain high network performance for such high traffic volumes. Clock synchronization refers to precision clock alignment between the network nodes such as communication devices, base stations and so on by estimating and correcting the relative clock error. For example, in 4G D2D and 5G D2D communication, clock synchronization among participating devices is necessary. In a wireless mesh type communication, the clock synchronization among mesh nodes is critical. Similarly, in Long term Evolution- Advanced (LTE-A) and 5G, synchronization between base stations and other infrastructure nodes in the network including mobile station is critical. Generally, the clock synchronization can be achieved by each network node by accessing a reference clock (that provides stable clock reference) in the network such as a GPS, IEEE1588 or any predefined reference clock. However, without direct access to the stable reference clock accurate clock synchronization, in order of µsec, is a challenging task. Further, for D2D or MTC communications in indoor scenarios such as small Cell LTE-A, 5G cellular, 5G-WiFi at office, home, stadium, malls etc., where access to the GPS or Ethernet may be unavailable, the clock synchronization is challenging. A possible solution comprises of equipping all network nodes with expensive stable crystal oscillators with precise calibration, where such a solution is practically difficult for commercial low cost networks.
Some existing methods provide statistical clock synchronization techniques for clock synchronization, where one network node providing the reference clock performs two way packet exchanges with other node requiring the clock synchronization. Thereafter, the clock is synchronized by using statistical computations for clock adjustments. However, with a two way packet exchange statistical clock synchronization methods, the network nodes are loaded with additional packet transmission traffic. For network nodes, such as mesh nodes of a mesh network which are low power devices, the two way packet exchange can drain battery of a mesh node. Thus, for any low power devices the two way packet exchange method for clock synchronization is cost and power inefficient. Further, the two way packets transmission for clock synchronization results in increased traffic volume and effectively reduces network bandwidth. Further, the existing statistical methods generally provide clock synchronization accuracy only to order of milliseconds, wherein the desired accuracy for 5G, LTE-A etc. is in order of microseconds. Further, the two way statistical method needs both network nodes to be involved actively during clock synchronization process as exchange of packets is performed between the synchronizing nodes. However, network nodes that are attempting to join the network are unable to actively participate in clock synchronization process.

OBJECTIVE
The principal objective of the embodiments herein is to provide a method and a system for network clock synchronization between a slave clock of a network node (first network node) with a master clock of other network node (second network node) using a statistical one way packet transmission mechanism, wherein the first network node designates the clock of the first network node as slave clock if the first network node is unable to access a reference clock.
Another objective of the embodiments herein is to provide a method for stamping the packets transmitted from the first network node with a transmit time stamp to enable one or more nodes in the network to synchronize their clocks using the one way statistical packet transmission mechanism, wherein the first network node designates clock of the first network node as the master clock when the first network node is able to access the reference clock.
Another objective of the embodiments herein is to estimate a clock error to be applied as correction to the slave clock in terms of a clock skew and a clock offset, wherein the clock skew and the clock offset are estimated by analyzing a plurality of packets received from the second network node.
Another objective of the embodiments herein is to estimate the clock offset and the clock skew using Maximum likelihood estimation (MLE) that is independent of distribution parameters associated with the plurality of packets when received at the first network node.
Another objective of the embodiments herein is to allow the network clock synchronization to ripple through the network using the statistical one way packet transmission mechanism.

SUMMARY
In view of the foregoing, an embodiment herein provides a method for network clock synchronization. The method includes performing one of designating a clock of a first network node in a network as a master clock, and designating the clock of the first network node as a slave clock based on accessibility of the first network node to a reference clock. Further, the method includes performing the network clock synchronization using a statistical one way packet transmission mechanism.
Embodiments further disclose a system for network clock synchronization. The system comprises a network comprising plurality of network nodes, wherein a first network node from said plurality of network nodes is configured to perform one of designate a clock of the first network node as a master clock, and designate the clock of the first network node as a slave clock based on accessibility of the first network node to a reference clock. Further, the first network node is configured to perform the network clock synchronization using a statistical one way packet transmission mechanism. Embodiments further disclose a network node for clock synchronization. The network node comprises an integrated circuit further comprising at least one processor, at least one memory having a computer program code within the circuit. Further, the at least one memory and the computer program code with the at least one processor cause a clock synchronization module in the network node to perform one of designate a clock of the network node as a master clock, and designate the clock of the network node as a slave clock based on accessibility of the network node to a reference clock. Further, the clock synchronization module is configured to perform the network clock synchronization using a statistical one way packet transmission mechanism.
These and other aspects of the embodiments herein will be better appreciated and understood when considered in conjunction with the following description and the accompanying drawings. It should be understood, however, that the following descriptions, while indicating embodiments and numerous specific details thereof, are given by way of illustration and not of limitation. Many changes and modifications may be made within the scope of the embodiments herein without departing from the spirit thereof, and the embodiments herein include all such modifications.

BRIEF DESCRIPTION OF FIGURES
The embodiments of this invention are illustrated in the accompanying drawings, throughout which like reference letters indicate corresponding parts in the various figures. The embodiments herein will be better understood from the following description with reference to the drawings, in which:
FIG. 1a illustrates an example system for network clock synchronization between a slave clock of a network node (first network node) with a master clock of other network node (second network node) using a statistical one way packet transmission mechanism when the first network node is unable to access the reference clock, according to embodiments as disclosed herein;
FIG. 1b illustrates the example system for network clock synchronization using the statistical one way packet transmission mechanism when the first network node is able to access a reference clock, according to embodiments as disclosed herein;
FIG. 2 is a time diagram indicating plurality of time stamped packets transmitted by the second network node that are received by the first network node for estimating a clock offset and a clock skew when the first network node is unable to access the reference clock, according to embodiments as disclosed herein;
FIG. 3 is illustrates a plurality of components of the first network node, according to embodiments as disclosed herein;
FIG. 4 is a flow diagram illustrating a method for network clock synchronization using the statistical one way packet transmission mechanism, according to embodiments as disclosed herein;
FIG. 5 illustrates an example network for clock synchronization ripple through the network based on the statistical one way packet transmission mechanism, according to embodiments as disclosed herein; and
FIG. 6 is a graph illustrating simulation results indicating accuracy and stability of the slave clock after clock synchronization based on the statistical one way packet transmission mechanism, as disclosed in the embodiments herein.
DETAILED DESCRIPTION
The embodiments herein and the various features and advantageous details thereof are explained more fully with reference to the non-limiting embodiments that are illustrated in the accompanying drawings and detailed in the following description. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments herein. The examples used herein are intended merely to facilitate an understanding of ways in which the embodiments herein may be practiced and to further enable those of skill in the art to practice the embodiments herein. Accordingly, the examples should not be construed as limiting the scope of the embodiments herein.
The embodiments herein achieve a method and system for network clock synchronization among plurality of network nodes of a network using a statistical one way packet transmission mechanism. The method includes performing the network clock synchronization (also referred as clock synchronization) between a slave clock of a first network node with a master clock of other network node (a second network node) using a statistical one way packet transmission mechanism. The first network node designates the clock of the first network node as slave clock if the first network node is unable to access a reference clock. Further, if the first network node is able to access the reference clock, the method includes stamping packets transmitted from the first network node with a transmit time stamp to enable one or more nodes in the network to synchronize their clocks using the one way statistical packet transmission mechanism.
The method includes estimating a clock error, applied as correction to the slave clock, in terms of a clock skew and a clock offset. To estimate the clock skew and the clock offset, the method includes receiving and analyzing plurality of packets transmitted by the second network node irrespective of whether the packets are destined to the first network node. The analysis of packets is based on the transmit time stamp (also referred as time stamp) carried by each received packet.
The method includes utilizing Maximum likelihood estimation (MLE) for estimating the clock offset and the clock skew by analyzing the transmit time stamp, and received time for each plurality of packet received. However, the proposed MLE based clock skew and clock offset estimation is independent of distribution parameters associated with the plurality of packets received by the first network node and thus is independent of packet arrival rate. Further, the method is a one way packet transmission method that does not need the first network node to send any packets to the second network node in response to the received packets for the clock synchronization. Thus, the method provides an independent passive MLE mechanism for estimating the clock error for clock synchronization. The accuracy of the clock synchronization provided by the method is at level of micro seconds. Hence, the method is useful in all Time Division Duplex (TDD) wireless networks such as Time Division-Long term evolution (TD-LTE), Coordinated Multi-Point (COMP), inter-cell interference cancellation and management, relaying that demand precise micro second level synchronization. Further, the one way packet transmission from the second network node improves overall system capacity and also reduces draining a battery of the first network node as there is no need of transmission of packets by the first network node for synchronization. This enables the method to be used for low power devices such as Machine Type Communication (MTC) devices.
In an embodiment, the method includes allowing the clock synchronization ripple in the network using the statistical one way packet transmission mechanism. Once the slave clock of the first network node is synchronized, the method allows the slave clock to act as a secondary master clock to the plurality of other slave clocks of other network nodes by transmitting time stamped packets to other network nodes in vicinity.
In an embodiment, the first network node, the second network node and/or the other network nodes can be a base station, an indoor small base station, a communication device, the MTC device and so on.
In an embodiment, the network can be a small Cell LTE-A, 5G cellular, 5G-WiFi in an office, malls, home, Mesh network, sensor networks, Ad-hoc network and so on.
Referring now to the drawings, and more particularly to FIGS. 1 through 6, where similar reference characters denote corresponding features consistently throughout the figures, there are shown embodiments.
FIG. 1a illustrates an example system 100 for the network clock synchronization between a slave clock of a network node (first network node) 102 with a master clock of a network node (second network node) 104 using the statistical one way packet transmission mechanism when the first network node is unable to access the reference clock 106, according to embodiments as disclosed herein. In an embodiment, the system 100 is the network including the first network node 102 synchronizing the slave clock with the master clock of the second network node 104, where the second network node 104 is able to access a reference clock 106 in the system 100. In an embodiment, the reference clock 106 is a GPS, IEEE1588 or any predefined reference clock (for example, the clock of the second network node 104) providing a stable clock for accurate clock synchronization.
The first network node 102 can be configured to estimate the clock error to be applied as correction to the slave clock in terms of clock parameters such as the clock skew and the clock offset. The first network node 102 can be configured to estimate the clock offset from the plurality of packets received from the second network node 104 that are time stamped, and reception time of each of the plurality of packets at the first network node. The first network node 102 can be configured to identify that it is unable to directly access the reference clock 106 in the system 100. Upon identification that the first network node is unable to access the reference clock 106, the first network node 102 can be configured to designate its clock as the slave clock. Further, the first network node 102 can be configured to identify the second network node 104, providing a stable clock reference that can be designated as the master clock. Further, the first network node 102 can be configured to designate the clock of the first network node 102 as the slave clock. The first network node 102 can be configured to identify or select the second network node 104 based on any of the master clock (node) identification mechanisms known such as a predefined logic and so on.
Further, once the second network node 104 is identified, the first network node 102 can be configured to receive plurality of packets (that are time stamped) from the second network node 104 irrespective of whether they are destined for the first network node 102. The second network node 104 can be preconfigured to designate its clock as the master clock when it is able to access the reference clock 106 in the system 100. Once preconfigured as master clock, the second network node 104 can be configured to time stamp every packet in transmits in the network. The time stamping can be at any of the predefined layers such as a Medium Access (MAC) layer.
Further, the first network node 102 is configured to seamless receive a predefined number of packets (sufficient for statistical analysis using MLE) and estimate the clock error in terms of the clock offset and the clock skew using the MLE.
The clock offset can be defined as relative time difference between the master clock and the slave clock. Clock skew is defined as the relative difference in clock frequency between the master clock and the slave clock. Thus the clock skew is a time dependent parameter.
The clock offset and the clock skew are illustrated in a timing diagram in conjunction with FIG. 2. Further, the statistical analysis based on MLE for estimation of clock error in terms of the clock offset and the clock skew is explained in conjunction with method 400 in FIG. 4. The proposed MLE based clock skew and clock offset estimation is independent of random component of the delay distribution parameters associated with the plurality of packets received by the first network node 102, effectively independent of the packet arrival rate.
Further, the first network node 102 can be configured to apply the estimated clock error to the slave clock to get in synchronization with the master clock. The first network node 102 can be configured to repeat the clock synchronization after a predefined time interval and enable maintaining the long term stability of the slave clock.
In an embodiment, the method includes allowing the clock synchronization to ripple through the system 100 using the statistical one way packet transmission mechanism and is explained in conjunction with FIG. 5. The first network node can be configured to behave as the secondary master clock and transmit time stamped packets for other one or more network nodes to synchronize their clocks with the secondary master clock.
The system 100 may include plurality of first network nodes, plurality of second network nodes, and a plurality of reference clocks to perform the clock synchronization. However, the components of the network are limited to the components illustrated in FIG. 1 for brevity and simplicity of understanding.
FIG. 1b illustrates the example system 100 for network clock synchronization using the statistical one way packet transmission mechanism when the first network node 102 is able to access the reference clock 106, according to embodiments as disclosed herein. In an embodiment, the method includes designating the clock of the first network node 102 as the master clock when the first network node is able to access the reference clock 106. Further, the method includes stamping plurality of packets transmitted from the first network node 102 with the transmit time stamp. The time stamped packets from the first network node 102 can be received by one or more network nodes in the network to perform the network clock synchronization using the statistical one way packet transmission mechanism. One or more network nodes can identify the clock of the first network node 102 as the master clock based on a predefined criteria for master clock selection.
FIG. 2 is a time diagram indicating plurality of time stamped packets transmitted by the second network node 104 that are received by the first network node 102 for estimating a clock offset and a clock skew when the first network node 102 is unable to access the reference clock, according to embodiments as disclosed herein. The figure illustrates timing diagram 202 indicating transmission time of packets sent by the second network node 104 and timing diagram 204 indicating reception times corresponding to the transmitted packets when received by the first network node 102.
For the master clock (P), all control and data packets are stamped with “Transmit Time”. For example, T_k^((P)) for the Kth packet. For the slave clock (A), passively received packets are stamped with the received time. For example, T_k^((AP)) for the Kth packet. The first network node 102 observes and analyzes N such packets and estimates the clock error in terms of clock parameters such as clock offset 206 and clock skew 208. The estimation statistical analysis is explained in conjunction with FIG. 4. The time stamping by the first network node 102 when functioning as master clock is similar to time stamping described for the second network node 104.
FIG. 3 illustrates a plurality of components of the first network node 102, according to embodiments as disclosed herein. Referring to Figure 3, the first network node 102 is illustrated in accordance with an embodiment of the present subject matter. In an embodiment, the first network node 102 may include at least one processor 302, an input/output (I/O) interface 304 (herein a configurable user interface), a memory 308. The at least one processor 302 may be implemented as one or more microprocessors, microcomputers, microcontrollers, digital signal processors, central processing units, state machines, logic circuitries, and/or any devices that manipulate signals based on operational instructions. Among other capabilities, the at least one processor 302 is configured to fetch and execute computer-readable instructions stored in the memory 308.
The I/O interface 304 may include a variety of software and hardware interfaces, for example, a web interface, a graphical user interface, and the like. The I/O interface 304 may allow the first network node 102 to communicate with other devices, such as the secondary network node 104, other network nodes, web servers, and external data servers (not shown). The I/O interface 304 may facilitate multiple communications within a wide variety of networks and protocol types, including wired networks, for example, LAN, cable, etc., and wireless networks, such as WLAN, cellular, D2D communication network, Wi-Fi networks and so on.
The modules 308 include routines, programs, objects, components, data structures, etc., which perform particular tasks, functions or implement particular abstract data types. In one implementation, the modules 308 may include a clock synchronization module 310 configured to identify whether the first network node 102 unable to directly access the reference clock 106 in the system 100. If the first network node 102 is unable to access the reference clock 106, the clock synchronization module 310 is configured to designate the clock of the first network node 102 as slave clock. Further, the clock synchronization module 310 is configured to estimate the clock error estimate to be applied as correction to the slave clock in terms of the clock skew and the clock offset parameters. The clock synchronization module can be configured to estimate the clock offset from a plurality of time stamped packets received from the second network node 104, and reception time of each of the plurality of packets at the first network node 102.
In an embodiment, once the slave clock is synchronized, the clock synchronization module 310 can be configured to behave as a secondary master clock and time stamp the packets during transmission. The time stamped packets from the first network node 104 can then be used by other network nodes for clock synchronization. This provides the clock synchronization ripple in the system 100.
In an embodiment, when the first network node 102 is able to access the reference clock 106 the clock synchronization module 310 can be configured to stamp the packets transmitted from the first network node 102 with the transmit time stamp. This enables one or more nodes in the network to synchronize their clocks using the one way statistical packet transmission mechanism by receiving the time stamped packets from the first network node 102.
The modules 308 may include programs or coded instructions that supplement applications and functions of the first network node 102. The data 312, amongst other things, serves as a repository for storing data processed, received, and generated by one or more of the modules 308.
FIG. 4 is a flow diagram illustrating a method 400 for the network clock synchronization using the statistical one way packet transmission mechanism, according to embodiments as disclosed herein. At step 402, the method 400 includes detecting whether the first network node is able to access the reference clock. If the first network node is able to access the reference clock 106, then at step 404, the method 400 allows the clock synchronization module 310 to designate the clock of the first network node 102 as the slave clock. At step 406, the method 400 allows the clock synchronization module 310 to identify the second network node 104 in the network that is able to access the reference clock 106. At step 408, the method allows the clock synchronization module 310 to designate the clock of the second network node 104 as the master clock. At step 410, the method 400 allows the clock synchronization module 310 to receive plurality of packets transmitted by the second network node 104. The number of packets received (N) may be decided based on minimum number of packet required to perform statistical analysis using the MLE to estimate the clock error for the slave clock. Each of the plurality of packets is provided with the time stamp by the second network node104. The time stamp may be at any of the layers such as the MAC layer of the received packet and the time stamp information is accordingly extracted at the receiving end (the first network node 104). At step 412, the method 400 allows the clock synchronization module 310 to record the reception time of each of the plurality of packets. At step 414, the method 400 allows the clock synchronization module 310 to estimate the clock error for the slave clock with respect to the master clock in terms of the clock skew and the clock offset. The clock skew and the clock offset are estimated using the time stamp information and the reception time of each of the plurality of packets recorded at the first network node 102. The computation for the clock skew is based on the equation 1 provided below:
clock"\ " skew"\ "(? ^_IPMLE)=(?¦?(V_k t_k-V_k G-"\ "?t_k+"\ "?G+"\ "Gt_k+G^2)?)/(?¦?(t_k^2-"\ "Gt_k)?) (1)
Where, V_k=T_k^((AP) )-T_k^((P) )
t_k=T_k^((AP))-T_1^((P)); G=(?¦t_k )/N
?=(?¦V_k )/N
Further, computation for the clock offset is based on the equation 2 provided below:
clock"\ " offset"\ "(Ø ^)=E(V_k )-"\ " f"\*"(SD) (2)
Where, E() is the expected value of V_k for N observations, SD is the standard deviation of N observations and f is a factor ranging from {1, 2, 3} and selected based on the modeling and simulations.
At step 416, the method 400 allows the clock synchronization module 310 to synchronize the slave clock with the master clock by applying a correction to the slave clock based on the relative clock error estimated in terms of the clock skew and the clock offset. The system model used for clock error estimation in terms of clock skew and clock offset is based on the ‘characterization of clock and oscillators’ provided in National Institute of Standards and Technology (NIST) technical note 1337.
Further, the method 400 allows the clock synchronization module 310 to repeat the steps 404 through 416 after a predefined time interval to maintain the clock error within a predefined clock error range to provide longer stability of clock synchronization. The maximum time elapsed (the pre-defined time interval) can be f seconds, which is estimated from modeling and system simulations. The clock skew and the clock offset are re-estimated from N observations and the correction is applied after f seconds.
If at step 402, it is detected that the first network node is able to access the reference clock, and then at step 418 the method 400 allows the clock synchronization module 310 to designate the clock of the first network node as the master clock. Further, the method 400 allows the clock synchronization module 310 to stamp plurality of packets transmitted from the first network node 102 with the transmit time stamp. The time stamped packets can be received by one or more network nodes to perform the network clock synchronization using the statistical one way packet transmission mechanism. One or more network nodes can identify the clock of the first network node 102 as the master clock based on the predefined criteria for master clock selection.
The method 400 can be easily expanded to any future networks as it does not include any major change at the network level. The various actions in method 400 may be performed in the order presented, in a different order or simultaneously. Further, in some embodiments, some actions listed in FIG. 4 may be omitted.
FIG. 5 illustrates an example network 500 for clock synchronization ripple through the network 500 based on the statistical one way packet transmission mechanism, according to embodiments as disclosed herein. In an embodiment, the network 500 can be a network including an outdoor base station 504 (second network node) having direct access to a GPS 502 (reference clock). Further, an indoor base station 506 (first network node) is located within the coverage of the outdoor base station 504. The network 500 includes a third network node 508 (another network node) that is unable to access the GPS 502 and the outdoor base station 504 but is within the coverage area of the indoor base station 506. The indoor base station 506 is located such that it is unable to access the GPS 502, hence for clock synchronization; the indoor base station 506 designates itself as the slave clock and identifies the clock of outdoor base station 504 as master clock. Further, the network 500 also includes other slave clocks that use the outdoor base station 504 as master clock for clock synchronization. The indoor base station 506 is configured to synchronize the slave clock using the one way statistical clock synchronization using the master clock as reference. However, when the third network node 508 has to perform clock synchronization it cannot access the master clock. The method proposed enables the indoor base station 506 to behave as the master clock for the third network node 508. Once the indoor base station 506 is synchronized, it can be configured to act as the secondary master clock. The indoor base station time stamps the packets with the transmit time stamp during packet transmission, which are then received by the third network node for clock synchronization. Further, once the third network node 508 is synchronized, it can be configured to act as next secondary master clock and transmit time stamped packets for enabling other network nodes in the coverage range to synchronize their slave clocks. Thus, the method includes providing the clock synchronization ripple through the network and enables global synchronization.
FIG. 6 is a graph illustrating simulation results indicating accuracy and stability of the slave clock after clock synchronization of the slave clock based on a clock error, estimated in terms of the clock skew and the clock offset, applied to the slave clock, as disclosed in the embodiments herein. The clock synchronization simulation parameter settings used are as follows:
NIST Clock Model is used with following parameters for = 1us clock sync error considering 4G and 5G systems configurations.
x_0 = 0.45; % Default clock offset in sec
y_0 = 5.0; % Default clock skew in ppm
d = 10.0; % Default clock drift in ppm per year
Zeta = 10^-8; % Constant random noise
Packet collection/observation interval
Results are presented for ? = 100sec
Number of packet used for JML estimation
Results are presented for N = 50000
The graph indicates that residual error without clock correction (602) is higher in magnitude in order of 10-3 seconds. As the clock is synchronized by applying clock error correction such that the factor (f) for the standard deviation (sd) is increased then the residual error decreases.
The clock offset (Ø) phi = mean (v) – f*sd(v), where v = Vk as in equation 2, and f = 1 for 604, 2 for 606 , 3 for 608.
Thus, lesser is the residual error more accurate is the clock synchronization.
The embodiments disclosed herein can be implemented through at least one software program running on at least one hardware device and performing network management functions to control the network elements. The network elements shown in Fig. 1, 3 and 5 include blocks which can be at least one of a hardware device, or a combination of hardware device and software module.
The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the spirit and scope of the embodiments as described herein.
STATEMENT OF CLAIMS
I claim:
A method for a network clock synchronization , the method comprising:
performing, by a first network node in a network, one of designating a clock of the first network node as a master clock, and designating the clock of the first network node as a slave clock based on accessibility of the first network node to a reference clock; and
performing, by the first network node, the network clock synchronization using a statistical one way packet transmission mechanism.
The method as claimed in claim 1, wherein performing the network clock synchronization if the first network node is designated as the master clock, when the first network node is able to access the reference clock, comprises:
stamping plurality of packets transmitted from the first network node with a transmit time stamp for allowing a slave clock of at least one network node in the network to perform the network clock synchronization using the statistical one way packet transmission mechanism, wherein the at least one network node identifies the clock of the first network node as the master clock based on a predefined criteria.
The method as claimed in claim 1, wherein performing the network clock synchronization when the first network node is designated as the slave clock, when the first network node is unable to access the reference clock, comprises:
identifying a clock of a second network node in the network as the master clock, wherein the second network node is able to access the reference clock and is identified based on a predefined criteria;
receiving a plurality of packets transmitted by the second network node, wherein each of the plurality of packets are provided with a transmit time stamp by the second network node;
recording a reception time of each of the plurality of packets;
estimating a clock error for the slave clock with respect to the master clock of the second network node in terms of a clock skew and a clock offset, wherein the clock skew and the clock offset are estimated using the transmit time stamp and the reception time of each of the plurality of packets using a Maximum Likelihood Estimation (MLE) statistical estimation technique that is independent of plurality of distribution parameters corresponding to the plurality of packets received by the first network node; and
applying a correction to the slave clock based on the clock error to synchronize the slave clock with the master clock of the second network node, wherein in the clock error is maintained within predefined clock error range after the synchronization.
The method as claimed in claim 3, wherein the method comprises utilizing the slave clock of the first network node as a secondary master clock for synchronizing a secondary slave clock of at least one third network node in the network after the slave clock of the first network node is synchronized with the master clock of the second network node.
A system for network clock synchronization, wherein the system comprises a network comprising plurality of network nodes, wherein a first network node from said plurality of network nodes is configured to:
perform one of designate a clock of the first network node as a master clock, and designate the clock of the first network node as a slave clock based on accessibility of the first network node to a reference clock; and
perform the network clock synchronization using a statistical one way packet transmission mechanism.
A network node for clock synchronization, wherein the network node comprises:
an integrated circuit further comprising at least one processor;
at least one memory having a computer program code within the circuit;
the at least one memory and the computer program code with the at least one processor cause a clock synchronization module in the network node to:
perform one of designate a clock of the network node as a master clock, and designate the clock of the network node as a slave clock based on accessibility of the network node to a reference clock; and
perform the network clock synchronization using a statistical one way packet transmission mechanism.
The network node as claimed in 6, wherein the network node, where the clock of the network node is designated as the master clock when the network node is able to access the reference clock, is configured to perform the network clock synchronization by:
stamping plurality of packets transmitted from the network node with a transmit time stamp for allowing a slave clock of at least one network node in the network to perform the network clock synchronization using the statistical one way packet transmission mechanism, wherein the at least one network node identifies the clock of the first network node as the master clock based on a predefined criteria.
The network node as claimed in 6, wherein the network node, where the clock of the network node is designated as the slave clock when the network node is able to access the reference clock, is configured to perform the network clock synchronization by:
identifying a clock of other network node among plurality of network nodes in a network as the master clock, wherein the other network node is able to access the reference clock and is identified based on a predefined criteria;
receiving a plurality of packets transmitted by the other network node, wherein each of the plurality of packets are provided with a transmit time stamp by the other network node;
recording a reception time of each of the plurality of packets;
estimating a clock error for the slave clock with respect to the master clock of the other network node in terms of a clock skew and a clock offset, wherein the clock skew and the clock offset are estimated using the transmit time stamp and the reception time of each of the plurality of packets using a Maximum Likelihood Estimation (MLE) statistical estimation technique that is independent of plurality of distribution parameters corresponding to the plurality of packets received by the first network node; and
apply a correction to the slave clock based on the clock error to synchronize the slave clock with the master clock of the other network node, wherein in the clock error is maintained within predefined clock error range after the synchronization.
The method as claimed in claim 8, wherein the method comprises utilizing the slave clock of the network node as a secondary master clock for synchronizing a secondary slave clock of at least one another network node in the network after the slave clock of the first network node is synchronized with the master clock of the second network node.

Dated this 24th September 2015
Signature:
Name: Kalyan Chakravarthy
Patent Agent

ABSTRACT
A method and a system for network clock synchronization are described. The method includes performing one of designating a clock of a first network node in a network as a master clock, and designating the clock of the first network node as a slave clock based on accessibility of the first network node to a reference clock. Further, the method includes performing the network clock synchronization using a statistical one way packet transmission mechanism.
FIG. 4

,CLAIMS:STATEMENT OF CLAIMS
I claim:
1. A method for a network clock synchronization , the method comprising:
performing, by a first network node in a network, one of designating a clock of the first network node as a master clock, and designating the clock of the first network node as a slave clock based on accessibility of the first network node to a reference clock; and
performing, by the first network node, the network clock synchronization using a statistical one way packet transmission mechanism.
2. The method as claimed in claim 1, wherein performing the network clock synchronization if the first network node is designated as the master clock, when the first network node is able to access the reference clock, comprises:
stamping plurality of packets transmitted from the first network node with a transmit time stamp for allowing a slave clock of at least one network node in the network to perform the network clock synchronization using the statistical one way packet transmission mechanism, wherein the at least one network node identifies the clock of the first network node as the master clock based on a predefined criteria.
3. The method as claimed in claim 1, wherein performing the network clock synchronization when the first network node is designated as the slave clock, when the first network node is unable to access the reference clock, comprises:
identifying a clock of a second network node in the network as the master clock, wherein the second network node is able to access the reference clock and is identified based on a predefined criteria;
receiving a plurality of packets transmitted by the second network node, wherein each of the plurality of packets are provided with a transmit time stamp by the second network node;
recording a reception time of each of the plurality of packets;
estimating a clock error for the slave clock with respect to the master clock of the second network node in terms of a clock skew and a clock offset, wherein the clock skew and the clock offset are estimated using the transmit time stamp and the reception time of each of the plurality of packets using a Maximum Likelihood Estimation (MLE) statistical estimation technique that is independent of plurality of distribution parameters corresponding to the plurality of packets received by the first network node; and
applying a correction to the slave clock based on the clock error to synchronize the slave clock with the master clock of the second network node, wherein in the clock error is maintained within predefined clock error range after the synchronization.
4. The method as claimed in claim 3, wherein the method comprises utilizing the slave clock of the first network node as a secondary master clock for synchronizing a secondary slave clock of at least one third network node in the network after the slave clock of the first network node is synchronized with the master clock of the second network node.
5. A system for network clock synchronization, wherein the system comprises a network comprising plurality of network nodes, wherein a first network node from said plurality of network nodes is configured to:
perform one of designate a clock of the first network node as a master clock, and designate the clock of the first network node as a slave clock based on accessibility of the first network node to a reference clock; and
perform the network clock synchronization using a statistical one way packet transmission mechanism.
6. A network node for clock synchronization, wherein the network node comprises:
an integrated circuit further comprising at least one processor;
at least one memory having a computer program code within the circuit;
the at least one memory and the computer program code with the at least one processor cause a clock synchronization module in the network node to:
perform one of designate a clock of the network node as a master clock, and designate the clock of the network node as a slave clock based on accessibility of the network node to a reference clock; and
perform the network clock synchronization using a statistical one way packet transmission mechanism.
7. The network node as claimed in 6, wherein the network node, where the clock of the network node is designated as the master clock when the network node is able to access the reference clock, is configured to perform the network clock synchronization by:
stamping plurality of packets transmitted from the network node with a transmit time stamp for allowing a slave clock of at least one network node in the network to perform the network clock synchronization using the statistical one way packet transmission mechanism, wherein the at least one network node identifies the clock of the first network node as the master clock based on a predefined criteria.
8. The network node as claimed in 6, wherein the network node, where the clock of the network node is designated as the slave clock when the network node is able to access the reference clock, is configured to perform the network clock synchronization by:
identifying a clock of other network node among plurality of network nodes in a network as the master clock, wherein the other network node is able to access the reference clock and is identified based on a predefined criteria;
receiving a plurality of packets transmitted by the other network node, wherein each of the plurality of packets are provided with a transmit time stamp by the other network node;
recording a reception time of each of the plurality of packets;
estimating a clock error for the slave clock with respect to the master clock of the other network node in terms of a clock skew and a clock offset, wherein the clock skew and the clock offset are estimated using the transmit time stamp and the reception time of each of the plurality of packets using a Maximum Likelihood Estimation (MLE) statistical estimation technique that is independent of plurality of distribution parameters corresponding to the plurality of packets received by the first network node; and
apply a correction to the slave clock based on the clock error to synchronize the slave clock with the master clock of the other network node, wherein in the clock error is maintained within predefined clock error range after the synchronization.
9. The method as claimed in claim 8, wherein the method comprises utilizing the slave clock of the network node as a secondary master clock for synchronizing a secondary slave clock of at least one another network node in the network after the slave clock of the first network node is synchronized with the master clock of the second network node.

Dated this 24th September 2015
Signature:
Name: Kalyan Chakravarthy
Patent Agent