Abstract: The present disclosure relates to a Four-Transmit, Four-Receive (4T4R) Fifth Generation (5G) New Radio (NR) Pico Small Cell (PSC). The 4T4R 5G NR PSC includes an Integrated Baseband and Transceiver Board (IBTB) (122) with a clock section including system synchronizers configured based on a GPS, a PTP, a holdover, and an RF Front End Board (RFEB) (124) connected with the IBTB (122). The RFEB (124) includes four transmit chains with a matching Balun, pre-driver amplifier, and RF power amplifier; four receive chains with a low noise amplifier, a band pass SAW filter, and a matching network; and four observation chains for DPD feedback paths. The 4T4R 5G NR PSC is designed to offload heavy traffic from macro cells, providing enhanced signal in high traffic environments. The method involves integrating and configuring the IBTB (122) and RFEB (124), implementing thermal management, and maintaining synchronization with external systems. ( FIG. 1B)
FORM 2
THE PATENTS ACT, 1970 (39 of 1970) THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
CELL (PSC)
APPLICANT
380006, Gujarat, India; Nationality : India
The following specification particularly describes
the invention and the manner in which
it is to be performed
RESERVATION OF RIGHTS
[0001] A portion of the disclosure of this patent document contains material,
which is subject to intellectual property rights such as, but are not limited to, copyright, design, trademark, Integrated Circuit (IC) layout design, and/or trade dress protection, belonging to Jio Platforms Limited (JPL) or its affiliates (herein after referred as owner). The owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all rights whatsoever. All rights to such intellectual property are fully reserved by the owner.
TECHNICAL FIELD
[0002] The present disclosure relates to wireless cellular communications,
and specifically to a system and a method for providing a 5G New Radio (NR) Pico Small Cell (PSC).
BACKGROUND
[0003] The following description of related art is intended to provide
background information pertaining to the field of the disclosure. This section may include certain aspects of the art that may be related to various features of the present disclosure. However, it should be appreciated that this section be used only to enhance the understanding of the reader with respect to the present disclosure, and not as admissions of prior art.
[0004] In prevalent times wireless coverage and capacity inside a building
has substantial importance. As per analytics people spend 80-90% of their time indoors, while 70% of cellular calls and 80% of data connections originate from the indoors, such as in an office, a residence, a mall, a hotel, a hospital, and a school, etc. Many indoor locations are very complicated in structure, and it is very difficult to penetrate a macro cell tower coverage from an outdoor location to an indoor location. A dedicated indoor solution i.e. a Distributed Antenna System (DAS) is recommended for large venues. The DAS is an array of antennas strategically
placed throughout an indoor facility that distributes a coverage area of the large venues into smaller sections using a network of interconnected antennas. A Quality of Service (QoS) based indoor coverage is more significant since most mobile data consumption takes place indoors. However, meeting coverage and capacity requirements comes at a high cost and has serious performance issues.
[0005] There is therefore a need in the art to provide a Pico Small Cell
(PSC) that provides a good network coverage and fulfils capacity requirements at an effective cost.
OBJECTS OF THE PRESENT DISCLOSURE
[0006] It is an object of the present disclosure to provide a 4 Transmitter 4
Receiver (4T4R) Fifth Generation (5G) New Radio (NR) Pico Small Cell (PSC).
[0007] It is an object of the present disclosure to provide a cost-effective
solution that provides good coverage as well as capacity within building environments.
[0008] It is an object of the present disclosure to provide a PSC (i.e., the
4T4R 5G NR PSC) that meets all Radio Frequency (RF) performance requirement mentioned in 3r Generation Partnership project (3GPP) standard (TS 38.141) after integrating Time Division Duplex (TDD) based 4T4R 5G NR PSC with a Crest Factor Reduction (CFR) and a Digital Pre-Distortion (DPD) modules in a digital front-end lineup.
[0009] It is an object of the present disclosure to provide the 4T4R 5G NR
PSC that has a low power consumption and is thermally handled properly by an Ingress Protection (IP) 65 mechanical housing with heat pipes.
[0010] It is an object of the present disclosure to provide the 4T4R 5G NR
PSC that supports a zero touch, a plug-and-play integration process, and a self-organizing network (SON) features.
SUMMARY
[0011] In another exemplary embodiment, a Four-Transmit, Four-Receive
(4T4R) Fifth Generation (5G) New Radio (NR) Pico Small Cell (PSC) for managing network traffic is described. The 4T4R 5G NR PSC includes an Integrated Baseband and Transceiver Board (IBTB) with a clock section including a plurality of system synchronizers configured based on at least one of a Global Positioning System (GPS), a Precision Time Protocol (PTP) and a holdover. The 4T4R 5G NR PSC includes a Radio-Frequency Front End Board (RFEB) configured to connect with the IBTB to provide a pre-defined output. The 4T4R 5G NR PSC includes a heat sink comprising a plurality of heat pipes having high thermal conductivity and vertical fins for enhancing heat dissipation. The 4T4R 5G NR PSC includes a plurality of temperature sensors on the IBTB to measure a temperature of each of a set of sections of the IBTB for thermal management. The 5G NR PSC is configured to offload heavy traffic from a plurality of macro cells and provide an enhanced signal in a high traffic indoor environment and a high traffic outdoor environment.
[0012] In some embodiments, the IBTB integrates an Application-Specific
Integrated Circuit (ASIC) transceiver chipset for processing a first layer and a baseband processor chipset for processing a second layer and a third layer.
[0013] In some embodiments, the clock section includes a plurality of ultra-
low noise clock generation Phase-Locked Loops (PLLs) (306), a plurality of programmable oscillators, and the plurality of system synchronizers (304) to maintain synchronization with one or more external systems.
[0014] In some embodiments, the RFEB includes a pre-defined set of
transmit chains for signal transmission, each with a matching Balun, a pre-driver amplifier, and a RF power amplifier. The REFE further includes a pre-defined set of receive chains for signal reception, each with a low noise amplifier, a band pass Surface Acoustic Wave (SAW) filter, and a matching network. The REFE further includes a pre-defined set of observation chains, each acting as a Digital Pre-Distortion (DPD) feedback path from power amplifiers (PAs) to the ASIC transceiver chipset for linearization.
[0015] In some embodiments, the heat sink incorporating the plurality of
heat pipes are configured to provide a uniform heat distribution and is designed to enhance an overall product size and a weight efficiency.
[0016] In some embodiments, the RFEB in connection with the IBTB is
configured to provide the pre-defined output.
[0017] In an exemplary embodiment, a method for designing a Four-
Transmit, Four-Receive (4T4R) 5G New Radio (NR) Pico Small Cell (PSC) managing network traffic is disclosed. The method includes integrating an Integrated Baseband and Transceiver Board (IBTB) with a clock section including a plurality of system synchronizers configured based on a Global Positioning System (GPS), a Precision Time Protocol (PTP), and a holdover. The method includes connecting a Radio-Frequency Front End Board (RFEB) with the IBTB and to provide a pre-defined output. The method includes implementing a heat sink with a plurality of heat pipes having high thermal conductivity and vertical fins for enhancing heat dissipation. The method includes measuring via a set of temperature sensors integrated on the IBTB (122), a temperature of each of a set of sections of the IBTB for thermal management. The 4T4R 5G NR PSC is configured to offload heavy traffic from a plurality of macro cells and provide an enhanced signal in a pre-defined traffic indoor environment and a pre-defined traffic outdoor environment.
[0018] In some embodiments, the clock section includes a plurality of ultra-
low noise clock generation Phased-Locked Loops (PLLs), a plurality of programmable oscillators, and the plurality of system synchronizers to maintain synchronization with one or more external systems.
[0019] In some embodiments, the RFEB includes a pre-defined set of
transmit chains for signal transmission, each with a matching Balun, a pre-driver amplifier, and a RF power amplifier, a pre-defined set of receive chains for signal reception, each with a low noise amplifier, a band pass Surface Acoustic Wave (SAW) filter, and a matching network, and a pre-defined set of observation chains, each acting as a Digital Pre-Distortion (DPD) feedback paths from power amplifiers (PAs) to the ASIC transceiver chipset for linearization.
[0020] In some embodiments, the heat sink incorporates the plurality of heat
pipes configured to provide a uniform heat distribution and is designed to enhance an overall product size and a weight efficiency.
[0021] In some embodiments, the RFEB in connection with the IBTB is
configured to provide the pre-defined output.
[0022] The foregoing general description of the illustrative embodiments
and the following detailed description thereof are merely exemplary aspects of the teachings of this disclosure and are not restrictive.
BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The accompanying drawings, which are incorporated herein, and
constitute a part of this disclosure, illustrate exemplary embodiments of the disclosed methods and systems which like reference numerals refer to the same parts throughout the different drawings. Components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the
principles of the present disclosure. Some drawings may indicate the components using block diagrams and may not represent the internal circuitry of each component. It will be appreciated by those skilled in the art that disclosure of such drawings includes the disclosure of electrical components, electronic components, or circuitry commonly used to implement such components.
[0024] FIG. 1A illustrates an exemplary network architecture in which or
with which a system for managing for managing network traffic via a Four-Transmit, Four-Receive (4T4R) 5G New Radio (NR) Pico Small Cell (PSC) (4T4R 5G NR PSC) is implemented, in accordance with an embodiment of the present disclosure.
[0025] FIG. 1B illustrates a high-level architecture of the 4T4R 5G NR
PSC, in accordance with an embodiment of the present disclosure.
[0026] FIG. 2 illustrates a high-level architecture of an Integrated Baseband
and Transceiver Board (IBTB), in accordance with an embodiment of the present disclosure.
[0027] FIG. 3 illustrates an architecture of a clock section, in accordance
with an embodiment of the present disclosure.
[0028] FIG. 4 illustrates a block diagram of a single chain of a Radio
Frequency Front End Board (RFEB), in accordance with an embodiment of the present disclosure.
[0029] FIG. 5 illustrates a flow diagram of a method for designing a Four-
Transmit, Four-Receive (4T4R) 5G New Radio (NR) Pico Small Cell (PSC) for managing network traffic, in accordance with an embodiment of the present disclosure.
[0030] FIG. 6 illustrates an exemplary computer system in which or with
which embodiments of the present invention may be implemented, in accordance with an embodiment of the present disclosure.
[0031] The foregoing shall be more apparent from the following more
detailed description of the disclosure.
LIST OF REFERENCES:
100: Network architecture
102-1, 102-2…102-N: Users
104-1, 104-2…104-N: User equipments
106: Network
108: System for managing stale sessions
112: Centralized server
120: Backhaul
122: Integrated Baseband and Transceiver Board (IBTB)
124: Radio-Frequency Front End (RFEB) Board
126: Network processor
128: Baseband and transceiver
130: Layer 2 (L2), Layer 3 (L3), and System Control
132: Layer 1 (L1)
136: Driver amplifier, digital step attenuator, power amplifier, Low Noise
Amplifiers (LNA) circulator, and Time Division Duplex (TDD) switch.
138: Cavity Filter + External Antenna
200: Integrated Baseband and Transceiver Board (IBTB)
202: Power supply section
204: Memory interface
206: Joint Test Action Group (JTAG) Debug Emulator
208: Direct Current (DC)-DC converters
212: Inter-Integrated Circuit (I2C) Device
214: Double Data Rate 4 (DDR4)
216: Secure Digital High Capacity (SDHC)
218: Flash Memories
222: Power (PWR) supply points
224: Clocks
226: 1 Gigabit Fiber Optic interfaces
228: SERDES (Serializer/Deserializer)
232: Global Positioning System (GPS) Module
234: Clock section
236: Copper Active Gain Equalization Small Form-Factor Pluggable (CAGE SFP)
+ 1 Gigabit Connectors
238: High-Speed Data Interface
240: DC-DC power supply (or a Power Management Integrated Chipset (PMIC))
242: Baseband and transceiver
244: Clocks
246: Serdes bank
248: PWR supply points
248: PWR supply points
300: Clock section
302: GPS module
304: System synchronizer
306: Clock generators and ultra-low noise Phase-Locked Loops (PLLs)
308: Network processor
310: Field Programmable Gate Array (FPGA)
400: Radio-Frequency Front End Board (RFEB)
500: Method flowchart
600: Computer system
610: External storage device
620: Bus
630: Main memory
640: Read-only memory (ROM)
650: Mass storage device 660: Communication port(s) 670: Process
DETAILED DESCRIPTION
[0032] In the following description, for the purposes of explanation, various
specific details are set forth in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent, however, that embodiments of the present disclosure may be practiced without these specific details. Several features described hereafter can each be used independently of one another or with any combination of other features. An individual feature may not address all of the problems discussed above or might address only some of the problems discussed above. Some of the problems discussed above might not be fully addressed by any of the features described herein.
[0033] The ensuing description provides exemplary embodiments only, and
is not intended to limit the scope, applicability, or configuration of the disclosure. Rather, the ensuing description of the exemplary embodiments will provide those skilled in the art with an enabling description for implementing an exemplary embodiment. It should be understood that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of the invention as set forth.
[0034] Specific details are given in the following description to provide a
thorough understanding of the embodiments. However, it will be understood by one of ordinary skill in the art that the embodiments may be practiced without these specific details. For example, circuits, systems, networks, processes, and other components may be shown as components in block diagram form in order not to obscure the embodiments in unnecessary detail. In other instances, well-known
circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail in order to avoid obscuring the embodiments.
[0035] Also, it is noted that individual embodiments may be described as a
5 process which is depicted as a flowchart, a flow diagram, a data flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe the operations as a sequential process, many of the operations can be performed in parallel or concurrently. In addition, the order of the operations may be re-arranged. A process is terminated when its operations are completed but could have additional 10 steps not included in a figure. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. When a process corresponds to a function, its termination can correspond to a return of the function to the calling function or the main function.
15 [0036] The word “exemplary” and/or “demonstrative” is used herein to
mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. In addition, any aspect or design described herein as “exemplary” and/or “demonstrative” is not necessarily to be construed as preferred or advantageous over other aspects or
20 designs, nor is it meant to preclude equivalent exemplary structures and techniques known to those of ordinary skill in the art. Furthermore, to the extent that the terms “includes,” “has,” “contains,” and other similar words are used in either the detailed description or the claims, such terms are intended to be inclusive—in a manner similar to the term “comprising” as an open transition word—without precluding
25 any additional or other elements.
[0037] Reference throughout this specification to “one embodiment” or “an
embodiment” or “an instance” or “one instance” means that a particular feature, structure, or characteristic described in connection with the embodiment is included 30 in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout
11
this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
5 [0038] The terminology used herein is for the purpose of describing
particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this
10 specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
15
[0039] FIG. 1A illustrates an exemplary network architecture in which or
with which a system (108) for managing network traffic via a Four-Transmit, Four-Receive (4T4R) 5G New Radio (NR) Pico Small Cell (PSC) (4T4R 5G NR PSC) is implemented, in accordance with embodiments of the present disclosure.
20
[0040] Referring to FIG. 1A, the network architecture (100) includes one or
more computing devices or user equipments (104-1, 104-2…104-N) associated with one or more users (102-1, 102-2…102-N) in an environment. A person of ordinary skill in the art will understand that one or more users (102-1, 102-2…102-25 N) may be individually referred to as the user (102) and collectively referred to as the users (102). Similarly, a person of ordinary skill in the art will understand that one or more user equipments (104-1, 104-2…104-N) may be individually referred to as the user equipment (104) and collectively referred to as the user equipment (104). A person of ordinary skill in the art will appreciate that the terms “computing 30 device(s)” and “user equipment” may be used interchangeably throughout the disclosure. Although three user equipments (104) are depicted in FIG. 1, however
12
any number of the user equipments (104) may be included without departing from the scope of the ongoing description.
[0041] In an embodiment, the user equipment (104) includes smart devices
5 operating in a smart environment, for example, an Internet of Things (IoT) system. In such an embodiment, the user equipment (104) may include, but is not limited to, smart phones, smart watches, smart sensors (e.g., mechanical, thermal, electrical, magnetic, etc.), networked appliances, networked peripheral devices, networked lighting system, communication devices, networked vehicle accessories,
10 networked vehicular devices, smart accessories, tablets, smart televisions (TVs), computers, smart security systems, smart home systems, other devices for monitoring or interacting with or for the users (102) and/or entities, or any combination thereof. A person of ordinary skill in the art will appreciate that the user equipment (104) may include, but is not limited to, intelligent, multi-sensing,
15 network-connected devices, that can integrate seamlessly with each other and/or with a central server or a cloud-computing system or any other device that is network-connected.
[0042] In an embodiment, the user equipment (104) includes, but is not
20 limited to, a handheld wireless communication device (e.g., a mobile phone, a smart phone, a phablet device, and so on), a wearable computer device(e.g., a head-mounted display computer device, a head-mounted camera device, a wristwatch computer device, and so on), a Global Positioning System (GPS) device, a laptop computer, a tablet computer, or another type of portable computer, a media playing 25 device, a portable gaming system, and/or any other type of computer device with wireless communication capabilities, and the like. In an embodiment, the user equipment (104) includes, but is not limited to, any electrical, electronic, electro-mechanical, or an equipment, or a combination of one or more of the above devices such as virtual reality (VR) devices, augmented reality (AR) devices, a laptop, a 30 general-purpose computer, a desktop, a personal digital assistant, a tablet computer, a mainframe computer, or any other computing device, wherein the user equipment (104) may include one or more in-built or externally coupled accessories including,
13
but not limited to, a visual aid device such as a camera, an audio aid, a microphone, a keyboard, and input devices for receiving input from the user (102), or an entity such as a touch pad, a touch enabled screen, an electronic pen, and the like. A person of ordinary skill in the art will appreciate that the user equipment (104) may not be 5 restricted to the mentioned devices and various other devices may be used.
[0043] In FIG. 1A, the user equipment (104) communicates with the system
(108), for example, a network traffic management system, through a network (106). In an embodiment, the network (106) includes at least one of a Fifth Generation
10 (5G) network, 6G network, or the like. The network (106) enables the user equipment (104) to communicate with other devices in the network architecture (100) and/or with the system (108). The network (106) includes a wireless card or some other transceiver connection to facilitate this communication. In another embodiment, the network (106) is implemented as, or include any of a variety of
15 different communication technologies such as a wide area network (WAN), a local area network (LAN), a wireless network, a mobile network, a Virtual Private Network (VPN), the Internet, the Public Switched Telephone Network (PSTN), or the like.
20 [0044] In another exemplary embodiment, the centralized server (112)
includes or comprise, by way of example but not limitation, one or more of: a stand¬alone server, a server blade, a server rack, a bank of servers, a server farm, a hardware supporting a part of a cloud service or a system, a home server, a hardware running a virtualized server, one or more processors executing code to function as
25 a server, one or more machines performing server-side functionality as described herein, at least a portion of any of the above, some combination thereof.
[0045] In order to manage the network traffic in a traffic environment, the
system (108) includes the 4T4R 5G NR PSC. The 4T4R 5G NR PSC may be
30 configured to manage the network traffic within the traffic environment having the
network traffic above a pre-defined threshold. For example, a network
14
administrator may have defined the pre-defined threshold to be 80% utilization of total available bandwidth for the network environment, e.g., an office space (with an area of 4200 square feet). An architecture of the 4T4R 5G NR PSC configured for managing the network traffic is depicted and explained in detail in conjunction 5 with FIG. 1B.
[0046] FIG. 1B illustrates a high-level architecture of the 4T4R 5G NR
PSC, in accordance with an embodiment of the present disclosure. FIG. 1B is explained in conjunction with FIG. 1A. The 4T4R 5G NR PSC is a small power 10 next generation Node B (gNB) which operates in a Pico class (typically ≤ 33 decibel milliwatt (dBm) per antenna port). This is an all-in-one categorized product for fulfilling requirements of all layers. This is not an Open Radio Access Network (ORAN) based product, and hence there is a requirement of a network processor.
15 [0047] The disclosed architecture of the 4T4R 5G NR PSC facilitates a
reduction in an operational cost for a Distributed Antenna System (DAS) application. Further, a power consumption is reduced due to implementation of simplified cables and designs. Furthermore, the disclosed architecture uses a Precision Time Protocol (PTP) in the 4T4R 5G NR PSC. 20
[0048] The disclosed 4T4R 5G NR PSC is an integration of the following
different major sections:
a Network Processor (126)
an IBTB (122)
25 a RFEB (124) including RF Chains (i.e., an RF Chain 1, an RF Chain
2, an RF Chain 3, an RF Chain 4)
a second layer (i.e., a Layer 2 (L2)), a third layer (i.e., Layer 3 (L3)) and System Control (130)
a first layer (i.e., a Layer 1 (L1) Controller) (132)
30 a Cavity Filter + External Antenna (138)
a Heat Pipe Based Mechanical Housing
15
[0049] The network processor (126) is configured to manage an overall
system control and management process. It is responsible for establishing and maintaining network connectivity, processing data packets, and ensuring efficient 5 communication between the IBTB (122) and one or more external networks. The network processor (126) interfaces with a backhaul (120) to provide connectivity to a wider network infrastructure.
[0050] The IBTB (122) integrates a baseband processor chipset for L2 and
10 L3 processing, as well as an ASIC transceiver chipset for L1 processing. The IBTB (122) includes a clock section with a plurality of system synchronizers configured based on at least one of a GPS, the PTP, or a holdover to maintain precise timing and synchronization. The IBTB (122) also includes temperature sensors to measure the temperatures of different sections for thermal management. The IBTB (122) 15 blind mates with the Radio-Frequency Front End Board (124) to provide a robust connection without a need for complex cable routing.
[0051] The baseband processor chipset integrated in the IBTB (122) handles
the L2 and L3 layer processing, which includes functions such as MAC (Medium
20 Access Control) layer processing, scheduling, and data encryption. The ASIC transceiver chipset manages the L1 layer processing, which includes the physical layer operations like modulation, demodulation, error correction, and bit stream generation. The combination of these chipsets on the IBTB (122) ensures efficient handling of data communication processes within the 4R4T 5G NR PSC.
25
[0052] The RFEB (124) includes a predefined set of RF chains (for
example, a set of four RF chains, i.e., the RF Chain 1, the RF Chain 2, the RF Chain 3, and the RF Chain 4). In particular, each of the predefined set of RF chains may include a pre-defined set of transmit chains (e.g., four transmit chains) for signal
30 transmission, a pre-defined set of receive chains (e.g., four receive chains) for signal reception, and a pre-defined set of observation chains (e.g., four observation
16
chains). The pre-defined set of transmit chains and the pre-defined set of receive chains may include components, such as a matching balun, a pre-driver amplifier, and an RF power amplifier (PA), a low noise amplifier (LNA), a band pass Surface Acoustic Wave (SAW) filter, a matching network, a circulator, and a Time-Division 5 Duplexing (TDD) switch depicted as a block (306), for transmission and reception. Further, the pre-defined set of observation chains act as Digital Pre-Distortion (DPD) feedback paths from the power amplifiers (PAs) to the ASIC transceiver chipset for linearization. These RF chains blind mate with the IBTB (122) to avoid RF signal oscillations and ensure a stable connection.
10
[0053] Each transmit chain within the RFEB (124) includes the matching
Balun to convert between balanced and unbalanced signals, the pre-driver amplifier to boost a signal before final amplification stage, and the RF power amplifier, i.e., a final RF power amplifier to ensure the signal is strong enough for transmission.
15 Each receive chain include the LNA to boost weak incoming signals, the band pass SAW filter to filter out unwanted frequencies, and a matching network to ensure impedance matching for an optimal signal transfer. Each observation chain is used for feedback in the DPD feedback path, which corrects nonlinearities in the PAs to improve signal quality.
20
[0054] The L2, L3, and System Control (130) manages operations of the
system (108) and controls the network processor (126). This module handles higher-layer protocols, system configuration, and overall management functions. It ensures that the 4T4R 5G NR PSC operates smoothly and efficiently by
25 coordinating the activities of the various components within the system. The system control module also interfaces with external management systems to facilitate remote monitoring and control of the 4R4T 5G NR PSC.
[0055] The L1 controller (132) performs functions, such as a Physical Layer
30 (PHY) processing, a Digital Up-Conversion (DUC), a Digital Down-Conversion
(DDC), a Crest Factor Reduction (CFR), a Digital Pre-Distortion (DPD), and a
17
Time-Division Duplexing (TDD) control. These functions are integral to the operation of the IBTB (122), ensuring efficient signal processing and transmission. The L1 controller (132) manages a conversion of digital baseband signals to analog RF signals and vice versa, ensuring an accurate and efficient communication 5 between different layers of the 4R4T 5G NR PSC.
[0056] The cavity filter (138) and an integrated or an external antenna is
implemented for signal transmission and reception. The cavity filter (138) provides steeper roll-off outside an operating band, which helps reduce interference and
10 improve overall signal quality. The integrated or the external antenna is connected to the plurality of RF chains to facilitate communication with other network devices. The cavity filter (138) low-loss design ensures that the signal strength is maintained while unwanted frequencies are filtered out, contributing to the overall power efficiency of the 4T4R 5G NR PSC.
15
[0057] Further, the 4T4R 5G NR PSC includes the heat pipe based
mechanical housing. The heat pipe based mechanical housing includes a heat sink that is designed with a plurality of heat pipes of high thermal conductivity and vertical fins to enhance heat dissipation and ensure uniform heat distribution across
20 the heat sink. The plurality of heat pipes in the heat sink enables a reduction in an overall product (i.e., 4T4R5G NR PSC) size and weight, making the 4T4R5G NR compact and power efficient. A design of the 4T4R5G NR PSC ensures that the 4T4R5G NR PSC operates efficiently even in high-temperature environments, maintaining consistent performance and reliability.
25
[0058] Further, the IBTB (122) includes a plurality of temperature sensors.
The plurality of temperature sensors is strategically placed on the IBTB (122) to measure a temperatures of a set of sections of the IBTB (122). This temperature monitoring capability helps in thermal management and ensures reliability of the
30 system (108) including the 4T4R5G NR PSC by preventing thermal failures. This real-time data provided by these temperature sensors allow the system (108) to
18
make decisions in case of thermal anomalies, ensuring longevity and stable operation.
[0059] The overall configuration of the 4T4R5G NR PSC, including the
5 integration of the IBTB (122), the RFEB (124), the cavity filter and the integrated or the external antenna (138), and the heat sink, ensures that the 4T4R 5G NR PSC can effectively offload heavy traffic from a plurality of macro cells and provide enhanced signal quality in the traffic environment with the network traffic above the pre-defined threshold (e.g., 80%), i.e., high traffic indoor and outdoor 10 environments. This compact and lightweight design, combined with advanced thermal management and high-performance RF capabilities of the 4T4R5G NR PSC, makes it an ideal solution for providing an enhanced coverage and capacity in medium to smaller buildings, commercial establishments, and high-traffic areas.
15 [0060] For instance, in a busy shopping mall, where thousands of people
use their mobile devices simultaneously, the 4T4R 5G NR PSC can be deployed to handle a heavy traffic load. The 4T4R 5G NR PSC’s high-power efficiency, compact design, and robust thermal management ensure that it operates reliably under continuous high demand. The ability to provide enhanced indoor coverage
20 ensures that users experience high-quality connectivity, reducing the traffic load on the plurality of macro cells in a network and improving overall network performance.
[0061] The IBTB (122) is designed to meet stringent power and
25 performance requirements. It includes multiple power management integrated circuits (PMICs), DC-DC converters, and Low Dropout (LDO) regulators to efficiently convert an external -48V input DC voltage to various lower voltages needed by different devices on the IBTB (122). The IBTB (122) offers two 1G Fiber Optic interfaces (SFP) for backhaul connections to networks, ensuring high-speed 30 data transfer and connectivity.
19
[0062] A system synchronization and clock operator circuit within a clock
section of the IBTB (122) includes the ultra-low noise PLLs, a plurality of programmable oscillators, and a system synchronizer configured based on at least one of the GPS, the PTP, and the holdover. This setup ensures precise timing and 5 synchronization, which are critical for maintaining seamless communication within the network.
[0063] The plurality of temperature sensors on the IBTB (122) monitor a
thermal profile of the IBTB (122), providing real-time data to a software for making 10 decisions in case of thermal anomalies. This closed-loop thermal management system, i.e., the clock section, ensures longevity and reliability of the 4T4R 5G NR PSC by preventing overheating and associated failures.
[0064] FIG. 2 illustrates a high-level architecture 200 of the IBTB (122), in
15 accordance with an embodiment of the present disclosure. The IBTB (122) integrates various sub-systems to perform multiple essential functions for the operation of the 4T4R 5G NR PSC. FIG. 2 is explained in conjunction with FIGS. 1A – 1B.
20 [0065] The IBTB (122) includes a baseband processor chipset for the L2
and L3 processing and the ASIC transceiver chipset for the L1 processing. The L2 and L3 processing involves tasks such as a Medium Access Control (MAC) layer processing, a scheduling, and data encryption, while the L1 processing involves physical layer operations including a modulation, a demodulation, an error
25 correction, and a bit stream generation.
[0066] The IBTB (122) receives an external -48V input DC voltage, which
is down-converted to various lower voltages, required by different devices on the
IBTB (122), from a power supply section (202). This voltage conversion is
30 achieved through the PMIC, DC-DC converters (208), and Low Dropout (LDO)
20
regulators, ensuring efficient power management and supplying necessary voltages to various sections of the IBTB (122).
[0067] To facilitate high-speed data interface (238) for data transfer to and
5 from the network, the IBTB (122) includes two 1G Fiber Optic interfaces (226), represented by CAGE SFP+1G Connectors (236). These 1G Fiber Optic interfaces (226) act as backhaul connections, linking the 4T4R 5G NR PSC to a broader network infrastructure. A high bandwidth provided by these 1G Fiber Optic interfaces (226) ensures that large amounts of data can be transmitted quickly and 10 reliably, which is essential for maintaining high performance in network operations.
[0068] The IBTB (122) includes a clock section (234), having the system
synchronizer and clock operator circuit, implemented for maintaining precise timing and coordination across all components. The synchronizer and clock 15 operator circuit ensures that all operations within the 4T4R 5G NR PSC are synchronized, preventing timing mismatches that could disrupt communication and data processing. Accurate synchronization is vital for maintaining an integrity and reliability of a data transmission within the network.
20 [0069] A global positioning system (GPS) (232) on the IBTB (122) provides
accurate timing and location information, essential for synchronization and coordination within the network. By aligning operations of the IBTB (122) with GPS data, the 4T4R 5G NR PSC can maintain accurate timing, enhancing overall network performance and reliability.
25
[0070] The IBTB (122) includes the high-speed data interface (238)
managed by the SERDES (Serializer/Deserializer) (228) and SERDES bank (246). This high-speed data interface (238) handles the rapid exchange of data between various components of the IBTB (122), ensuring efficient communication and data
30 processing. The SERDES (228) and the SERDES bank (246) converts data between
21
serial and parallel forms, enabling high-speed data transfer and maintaining the performance of the 4T4R 5G NR PSC, particularly in high-traffic environments.
[0071] The I2C Device (212) on the IBTB (122) is part of the Inter-
5 Integrated Circuit (I2C) interface, facilitating communication between different components on the IBTB (122). The I2C interface (212) is a multi-master, a multi-slave, a packet-switched, a single-ended, a serial communication bus used to attach lower-speed peripheral ICs to processors and microcontrollers. Additionally, the IBTB (122) includes a memory interface (204) interfacing the IBTB (122) with 10 various storage modules, such as Double Data Rate 4 (DDR4), a EEPROM (Electrically Erasable Programmable Read-Only Memory), and eMMC (Embedded Multimedia Card), which provide essential data storage and retention capabilities.
[0072] The JTAG Debug Emulator (206) is used for debugging and testing
15 the functionality of the IBTB (122) during development and troubleshooting phases. The JTAG Debug Emulator (206) provides access to internal registers and memory locations within the IBTB (122), allowing engineers to diagnose issues, verify correct operation, and update firmware.
20 [0073] The DDR4 (214) is a Double Data Rate (DDR) memory module used
for storing data temporarily, providing fast access to the baseband and transceiver (242). The baseband and transceiver (242) may correspond to the ASIC transceiver chipset and baseband processor chipset. The DDR4 (214) memory module enhances a performance of the IBTB (214) by enabling quick read and write
25 operations, crucial for processing high volumes of data in real-time.
[0074] An SDHC (216) is a Secure Digital High Capacity (SDHC) memory
card interface used for additional data storage, enabling large amounts of data to be stored and accessed quickly. The SDHC (216) supports high-capacity memory 30 cards, making it suitable for storing extensive logs, firmware updates, and other critical data.
22
[0075] Flash Memories (218) are non-volatile memory modules used for
storing firmware, configuration data, and other critical information that needs to be retained even when the power is off. The flash memories (218) ensure that essential software and settings are preserved, providing stability and reliability to the IBTB 5 (122).
[0076] The PWR (222, 248) denote power supply points, which are crucial
for providing a necessary power to various components of the IBTB (122). These power supply points ensure that each component receives a stable and regulated 10 power source, supporting their proper functioning and longevity.
[0077] In a high-traffic environment such as a busy shopping mall, the IBTB
(122) enables the 4T4R 5G NR PSC to handle large volumes of data traffic efficiently. The plurality of temperature sensors continuously monitor the thermal 15 profile of the IBTB (122), ensuring it operates within safe temperature limits. The high-speed data interfaces and backhaul connections ensure that data is transmitted quickly and reliably, providing users with high-quality connectivity.
[0078] The PWR (222, 248) ensure the IBTB (122) operates efficiently,
20 converting the external -48V DC voltage to a required lower voltage and supplying them to different devices on the IBTB (122). The synchronization circuit ensures all components operate in harmony, maintaining precise timing and coordination necessary for seamless communication within the network.
25 [0079] Overall, the design of the IBTB (122), with its advanced features and
robust architecture, ensures the 4T4R 5G NR PSC can provide reliable and high-performance connectivity in high-traffic environments, making it an ideal solution for modern telecommunications infrastructure.
30 [0080] FIG. 3 illustrates an architecture of a clock section (300) in
accordance with an embodiment of the present disclosure. The clock section (300)
23
ensures synchronization both within the IBTB (122) and with external systems using a sophisticated clock and the system synchronization. The clock section (300) integrates various components to maintain precise timing across the 4T4R 5G NR PSC. FIG. 3 is explained in conjunction with FIGS. 1A - 2. 5
[0081] A GPS module (302) (same as the GPS module (232)) provides
accurate timing and location information essential for synchronization the 4T4R 5G NR PSC. It receives signals from global positioning satellites, delivering highly precise and reliable time references crucial for network synchronization. The timing
10 information from the GPS module (302) is distributed to various components to ensure the 4T4R 5G NR PSC remains synchronized with global time standards. This is particularly important for maintaining the integrity and timing of data communications, ensuring that all transmitted and received signals are correctly aligned in time.
15
[0082] A system synchronizer (304) utilizes the GPS timing information to
synchronize the 4T4R 5G NR PSC. The system synchronizer (304) is implemented for maintaining precise timing across all components of the IBTB (122). It ensures the system remains synchronized even during temporary GPS signal loss by
20 leveraging the PTP and holdover mechanisms. The PTP allows for network-based time synchronization, ensuring the system can maintain accurate timing even without a direct GPS signal. The holdover mechanism maintains the clock's accuracy using stored timing information, ensuring continuous operation during brief disruptions.
25
[0083] An ultra-low noise Phase-Locked Loops (PLLs) are incorporated
within a clock generator circuit (306) to produce stable and low-jitter clock signals. The ultra-low noise PLLs are vital for high-speed data processing and communication, providing the necessary clock signals with minimal phase noise.
30 Low phase noise is critical in high-frequency applications, as it ensures signal integrity and reduces errors in data transmission and processing. The ultra-low
24
noise PLLs are designed to filter out noise and stabilize the frequency of the clock signals, providing a reliable timing source for the entire system.
[0084] A programmable oscillator allows for flexible frequency
5 adjustments, enabling the system to adapt to various operational requirements and maintain synchronization across all components. The programmable oscillator can be configured to generate different frequencies as needed, allowing the system to dynamically adjust to different network conditions and requirements. This flexibility is essential for supporting a wide range of communication standards and 10 protocols, ensuring the 4T4R 5G NR PSC can operate effectively in diverse environments.
[0085] The network processor (308) is responsible for managing data
communication and processing within the 4T4R 5G NR PSC. It interfaces with the
15 system synchronizer (304) and the clock operator circuit (306) to ensure all data transactions are precisely timed. The network processor (308) handles the scheduling, routing, and management of data packets, working closely with the baseband processor chipset to execute higher-layer protocols. By managing these tasks, the network processor (308) ensures that data is transmitted and received
20 efficiently, minimizing delays and maximizing throughput.
[0086] A Field Programmable Gate Array (FPGA) (310) (same as the ASIC
transceiver chipset) is integrated into the to perform custom logic functions and signal processing tasks. The FPGA (310) operates in sync with the clock signals
25 generated by the ultra-low noise PLLs and coordinated by the system synchronizer (304). It plays a critical role in handling high-speed data operations, such as modulation, demodulation, and error correction, ensuring efficient and accurate data transmission. Reconfigurable nature of the FPGA (310) allows it to be programmed for specific tasks, making it highly versatile and capable of supporting
30 various communication protocols and standards.
25
[0087] Together, these components form a robust and highly synchronized
clock section that is essential for the reliable operation of the 4T4R 5G NR PSC. The GPS module (302) provides the initial timing reference, while the system synchronizer (304) and the clock operator circuit (306) ensure continuous 5 synchronization even in the event of GPS signal loss. The ultra-low noise PLLs and the programmable oscillator generate precise and stable clock signals, which are distributed to the network processor (308) and the FPGA (310) to coordinate data processing and communication tasks.
10 [0088] In practical application, the accurate synchronization provided by
this clock section (300) is crucial for maintaining high-quality communication in high-traffic environments. For example, in a busy urban area with multiple users accessing the network simultaneously, precise timing ensures that data packets are transmitted and received without collision, reducing latency and improving overall
15 network performance. The flexibility provided by the programmable oscillator allows the system to adapt to changing network conditions, ensuring reliable operation even in challenging environments.
[0089] Overall, the design and integration of the clock section in FIG. 3
20 demonstrate a comprehensive approach to managing synchronization, data processing, and signal transmission within the 4T4R 5G NR PSC. By incorporating advanced clock synchronization techniques and flexible, high-performance components, the system ensures reliable and high-quality connectivity, making it an ideal solution for modern telecommunications infrastructure. 25
[0090] FIG. 4 illustrates a block diagram (400) of a single chain of RFEB
(124), in accordance with an embodiment of the disclosure.
[0091] The RFEB) (124) blind mates with the IBTB (122) thus removing
30 complexity of cable routing to avoid RF signal oscillations. The mating bullets
provide a robust connection between the IBTB (122) and the RFEB (124). It is a
26
unique and complexly implemented telecom solution and is configured to provide its target 8W output.
[0092] The FIG. 4 illustrates a block diagram 400 of a single chain of the
5 RFEB (124), in accordance with an embodiment of the present disclosure. FIG. 4 is explained in conjunction with FIGS. 1A – 3. The RFEB (124) is implemented for interfacing with the IBTB (122). The RFEB (124) includes various elements designed for signal transmission, reception, and feedback, which work together to ensure the efficient operation of the 4T4R 5G NR PSC.
10
[0093] The RFEB (124) receives control signals and power supply from the
IBTB (122) through a dedicated connector, integrating seamlessly into the architecture of the 4T4R 5G NR PSC. The RFEB (124) consists of four transmit chains for signal transmission, four receive chains for signal reception, and four
15 observation chains that act as the DPD feedback path from the PAs to the ASIC Transceiver chipset for linearization.
[0094] Each transmit chain includes a filter (402, 416, 426), gain blocks
(404, 422), DSAs (406, 418, 424). Each transmit chain begins with the matching
20 balun, which ensures impedance matching between different components. This matching balun converts unbalanced signals to balanced signals, optimizing the signal for further amplification and minimizing signal reflections and losses. Following the matching balun, a pre-driver amplifier (408) boosts the signal to a level suitable for final stage amplification. The pre-driver amplifier (408) is
25 implemented for maintaining the integrity and strength of a transmitted signal, preparing it for a final amplification stage. A final RF power amplifier (410) then amplifies the signal to the desired transmission power level, ensuring that the signal is strong enough to be transmitted over the required range. The final RF power amplifier (410) is implemented for achieving a pre-defined output, e.g., a target 8W
30 output of the 4T4R 5G NR PSC.
27
[0095] Each receive chain starts with a low noise amplifier (LNA) (428),
which amplifies weak incoming signals while minimizing additional noise. The LNA (428) is implemented for enhancing the signal quality and ensuring accurate reception. The amplified signal then passes through the band-pass SAW filter, 5 which allows only a desired frequency range to pass through, rejecting out-of-band signals and interference. This ensures that the received signal is clean and free from unwanted frequencies. The signal then goes through a matching network, which ensures impedance matching between the components, optimizing the signal transfer and minimizing losses.
10
[0096] Each observation chain includes several key components for
feedback and monitoring. A directional coupler (412) samples a portion of the transmitted signal for feedback purposes. This sampled signal is used for monitoring and controlling the transmit power, ensuring it remains within the
15 desired range. The sampled signal then passes through DSA (418), which adjusts the signal level, allowing precise control over the feedback signal. This ensures that the feedback signal is within the required range for accurate monitoring. The observation chain also includes a matching network similar to the receive chain, ensuring proper impedance matching and facilitating accurate signal feedback for
20 DPD.
[0097] A switch (420), e.g., an RF TDD switch is a component that
combines each transmit-receive pair, allowing the same antenna to be used for both transmission and reception. The switch (420) enables seamless switching between 25 transmit and receive modes, optimizing the use of the antenna and enhancing the system's efficiency.
[0098] Between each RF switch and the antenna port, a circulator (414) and
cavity filter play important roles. The circulator (414) directs the signal flow
30 between a transmitter, a receiver, and an antenna, ensuring that the transmitted and
received signals do not interfere with each other and maintaining signal integrity.
28
The cavity filter provides additional filtering to ensure signal purity and reduce interference, with a steep roll-off outside the operating band. This enhances the overall signal quality, ensuring that the transmitted and received signals are clear and free from unwanted frequencies. 5
[0099] The RFEB (124) is designed to blind mate with the IBTB (122),
removing the complexity of cable routing and avoiding RF signal oscillations. The mating bullets provide a robust connection between the IBTB (122) and the RFEB (124), ensuring reliable signal transmission and reception. This innovative design 10 is configured to provide its target 8W output (i.e., the pre-defined output), optimizing the power consumption of the 4T4R 5G NR PSC. The efficient design of the PAs further enhances the overall performance, ensuring that the 4T4R 5G NR PSC operates within its optimal parameters.
15 [00100] Additionally, the RFEB (124) incorporates advanced cooling
techniques to manage the heat generated by the high-power components. Heat pipes with high thermal conductivity are implemented to distribute localized heat across a heat sink with vertical fins. This enhances heat dissipation, ensuring that the components operate within safe temperature ranges. The integration of the plurality
20 of heat pipes into the heat sink reduces the overall size and weight, making it a compact and power-efficient solution. The 4T4R 5G NR PSC is thus quick to deploy and delivers high performance with low power consumption.
[00101] As may be appreciated, power consumption of the disclosed 4T4R
25 5G NR PSC is optimum owing to its unique design of the PAs which has better efficiency.
[00102] The cavity filter consists of 4-port cavity filter for 4T4R
configuration which provides steeper roll-off outside an operating band. The cavity 30 filter design of low loss cavity filter also contributes to reduction of overall power consumption of the product.
29
[00103] The plurality of heat pipes of highly effective thermal conductivity
is implemented in the 4T4R 5G NR PSC to distribute localized heat across the heat sink. The heat sink with vertical fins enhances the heat dissipation. Thus, the plurality of heat pipes into the heat sink enables reduction in overall size and weight 5 of the 4T4R 5G NR PSC. Thus, making it a compact and power efficient solution. The 4T4R 5G NR PSC is quick to deploy and delivers high performance with low power consumption.
[00104] Differentiating features of the 4T4R 5G NR PSC with respect to the
10 Optical Domain Service Channel (ODSC) or the Integrated Media Gateway (IMG) include: (a) primary timing synchronization may be based on the PTP due to usage in the indoor which is not there in the ODSC and IMG since both are used primarily in an outdoor application, where the GPS source is a primary timing reference, (b) necessary embedded software addition and updated configurations may be done in 15 a clock synchronization circuitry and board support package of the 4T4R 5G NR PSC, (c) have added wall mounting provision for indoor applications, and (d) cost and weight efficient.
[00105] Disclosed system and method provide developed complete array of
20 5G radio products in different frequency bands which complies with a 3rd Generation Partnership Project (3GPP) standards together with its own indigenous 5G core. The disclosed radio products have been successfully tested at 100 MHz channel bandwidth in 3.5 GHz with peak data rates of 1.0 Gbps.
25 [00106] The disclosed 4T4R 5G NR PSC solutions provide increased indoor
coverage and performance which may enhance user experience in data download rates. The usage of the 4T4R 5G NR PSC may be implemented in a hyper local architecture where each floor may be served by a low power radio and may lead to a major reduction in the DAS’s cost. The disclosed 4T4R 5G NR PSC solutions
30 address consumer and enterprise customers in a wide range of indoor environments. Combined with a low weight compact form-factor, it may also offer deployment
30
flexibility across a wide range of use cases. As the 5G use cases increase, the need for improved coverage, capacity and performance arises. This disclosed solution will facilitate to serve a vast customer base and deliver superior connectivity.
5 [00107] FIG. 5 illustrates a flow diagram of a method for designing a Four-
Transmit, Four-Receive (4T4R) 5G New Radio (NR) Pico Small Cell (PSC) for managing network traffic, in accordance with some embodiments of the present disclosure. FIG. 5 is explained in conjunction with FIGS. 1A – 4.
10 [00108] Initially, at step 502, the IBTB (122) is integrated with the clock
section 300 including a plurality of system synchronizers (same the system synchronizer (304)) configured based on the GPS, the PTP, and the holdover. In an embodiment, the IBTB (122) may integrate the ASIC transceiver chipset for processing the first layer (i.e., the L1) and the baseband processor chipset for
15 processing the second layer (i.e., the L2) and the third layer (i.e., the L3). In addition, a plurality of ultra-low noise clock generation PLLs (i.e., the ultra-low noise clock generation PLLs), a plurality of programmable oscillators, i.e., the programmable oscillators, and the plurality of system synchronizers (same as the system synchronizer (304)) to maintain synchronization with one or more external
20 systems.
[00109] Further, at step 504, the RFEB (124) may be connected with the
IBTB (122) and to provide a pre-defined output, i.e., the target 8Watt output. The RFEB may include the pre-defined set of transmit chains (i.e., the four transmit 25 chains) for signal transmission. Each transmit chain includes the matching Balun, the pre-driver amplifier, and the RF power amplifier. Further, the RFEB (124) may include the pre-defined set of receive chains (i.e., the four receive chains) for signal reception. Each receive chain includes the low noise amplifier, the band pass SAW filter, and the matching network. Further, the RFEB (124) may include the pre-30 defined set of observation chains (i.e., the four observation chains). Each
31
observation chain acts as the DPD feedback paths from the PAs to the ASIC transceiver chipset for linearization.
[00110] Further, at step 506, the heat sink may be implemented. The heat
5 sink may include the plurality of heat pipes having high thermal conductivity and vertical fins for enhancing heat dissipation. In an embodiment, the heat sink incorporates the plurality of heat pipes configured to provide a uniform heat distribution and is designed to enhance an overall product (i.e., the 4T4R 5G NR PSC) size and weight efficiency. Furthermore, at step 508, the temperature of each
10 of the set of sections of the IBTB (122) may be measured via the set of temperature sensors integrated on the IBTB (122), for thermal management. In an embodiment, the 4T4R 5G NR PSC is configured to offload heavy traffic from the plurality of macro cells and provide an enhanced signal in the traffic environment above the pre-defined threshold (e.g., 70% above the total bandwidth available).
15
[00111] FIG. 6 illustrates an example computer system (600) in which or
with which the embodiments of the present disclosure may be implemented.
[00112] As shown in FIG. 5, the computer system (600) may include an
20 external storage device (610), a bus (620), a main memory (630), a read-only
memory (640), a mass storage device (650), communication port(s) (660), and a
processor (670). A person skilled in the art will appreciate that the computer system
(600) may include more than one processor and communication ports. The
processor (670) may include various modules associated with embodiments of the
25 present disclosure. The communication port(s) (660) may be any of an RS-232 port
for use with a modem-based dialup connection, a 10/100 Ethernet port, a Gigabit
or 10 Gigabit port using copper or fiber, a serial port, a parallel port, or other
existing or future ports. The communication ports(s) (660) may be chosen
depending on a network, such as a Local Area Network (LAN), Wide Area Network
30 (WAN), or any network to which the computer system (600) connects.
32
[00113] In an embodiment, the main memory (630) may be Random Access
Memory (RAM), or any other dynamic storage device commonly known in the art. The read-only memory (640) may be any static storage device(s) e.g., but not limited to, a Programmable Read Only Memory (PROM) chip for storing static 5 information e.g., start-up or basic input/output system (BIOS) instructions for the processor (670). The mass storage device (650) may be any current or future mass storage solution, which can be used to store information and/or instructions. Exemplary mass storage solutions include, but are not limited to, Parallel Advanced Technology Attachment (PATA) or Serial Advanced Technology Attachment 10 (SATA) hard disk drives or solid-state drives (internal or external, e.g., having Universal Serial Bus (USB) and/or Firewire interfaces).
[00114] In an embodiment, the bus (620) may communicatively couple the
processor(s) (670) with the other memory, storage, and communication blocks. The
15 bus (620) may be, e.g. a Peripheral Component Interconnect PCI) / PCI Extended (PCI-X) bus, Small Computer System Interface (SCSI), Universal Serial Bus (USB), or the like, for connecting expansion cards, drives, and other subsystems as well as other buses, such a front side bus (FSB), which connects the processor (670) to the computer system (600).
20
[00115] In another embodiment, operator and administrative interfaces, e.g.,
a display, keyboard, and a cursor control device may also be coupled to the bus (620) to support direct operator interaction with the computer system (600). Other operator and administrative interfaces can be provided through network
25 connections connected through the communication port(s) (660). Components described above are meant only to exemplify various possibilities. In no way should the aforementioned-exemplary computer system (600) limit the scope of the present disclosure.
30 [00116] While the foregoing describes various embodiments of the
invention, other and further embodiments of the invention may be devised without
33
departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and 5 knowledge available to the person having ordinary skill in the art.
ADVANTAGES OF THE PRESENT DISCLOSURE
[00117] The present disclosure provides a system and a method to provide a
5G NR Pico Small Cell (PSC) including 4T4R. 10
[00118] The present disclosure provides a cost-effective solution that
provides good coverage as well as capacity within building environments.
[00119] The present disclosure provides a PSC (i.e., the 4T4R 5G NR PSC)
15 that meets all Radio Frequency (RF) performance requirement mentioned in 3GPP standard (TS 38.141) after integrating TDD based 5G NR PSC with the CFR and the DPD modules in the digital front-end line-up.
[00120] The present disclosure provides the 4T4R 5G NR PSC that has the
20 low power consumption and is thermally handled properly by the IP65 mechanical housing with heat pipes.
[00121] The present disclosure provides the 4T4R 5G NR PSC that supports
the zero touch, the plug-and-play integration process, and the self-organizing 25 network (SON) features.
34
We Claim:
1. A Four-Transmit, Four-Receive (4T4R) Fifth Generation (5G) New Radio
(NR) Pico Small Cell (PSC) for managing network traffic, the 4T4R 5G NR PSC
comprising:
an Integrated Baseband and Transceiver Board (IBTB) (122) with a clock section including a plurality of system synchronizers configured based on at least one of a Global Positioning System (GPS), a Precision Time Protocol (PTP) and a holdover;
a Radio-Frequency Front End Board (RFEB) (124) configured to connect with the IBTB (122) to provide a pre-defined output;
a heat sink comprising a plurality of heat pipes having high thermal conductivity and vertical fins for enhancing heat dissipation; and
a plurality of temperature sensors on the IBTB (122) to measure a temperature of each of a set of sections of the IBTB (122) for thermal management,
wherein the 4T4R 5G NR PSC is configured to offload heavy traffic from a plurality of macro cells and provide an enhanced signal in traffic environment above pre-defined threshold.
2. The 4T4R 5G NR PSC as claimed in claim 1, wherein the IBTB (122) integrates an Application-Specific Integrated Circuit (ASIC) transceiver chipset for processing a first layer and a baseband processor chipset for processing a second layer and a third layer.
3. The 4T4R 5G NR PSC as claimed in claim 1, wherein the clock section includes a plurality of ultra-low noise clock generation Phase-Locked Loops (PLLs) (306), a plurality of programmable oscillators, and the plurality of system synchronizers (304) to maintain synchronization with one or more external systems.
4. The 4T4R 5G NR PSC as claimed in claim 1, wherein the RFEB (124)
comprises:
a pre-defined set of transmit chains for signal transmission, each with a matching Balun, a pre-driver amplifier, and a RF power amplifier;
a pre-defined set of receive chains for signal reception, each with a low noise amplifier, a band pass Surface Acoustic Wave (SAW) filter, and a matching network; and
a pre-defined set of observation chains, each acting as a Digital Pre-Distortion (DPD) feedback path from power amplifiers (PAs) to the ASIC transceiver chipset for linearization.
5. The 4T4R 5G NR PSC as claimed in claim 1, wherein the heat sink incorporating the plurality of heat pipes are configured to provide a uniform heat distribution and is designed to enhance an overall product size and weight efficiency.
6. The 4T4R 5G NR PSC as claimed in claim 1, wherein the RFEB (126) in connection with the IBTB (122) is configured to provide the pre-defined output.
7. A method (500) of designing a Four-Transmit, Four-Receive (4T4R) 5G New Radio (NR) Pico Small Cell (PSC) for managing network traffic, the method comprising:
integrating (502) an Integrated Baseband and Transceiver Board (IBTB) (122) with a clock section including a plurality of system synchronizers configured based on a Global Positioning System (GPS), a Precision Time Protocol (PTP), and a holdover;
connecting (504) a Radio Frequency Front End Board (RFEB) (126) with the IBTB (122) and to provide a pre-defined output;
implementing (506) a heat sink with a plurality of heat pipes having high thermal conductivity and vertical fins for enhancing heat dissipation; and
measuring (508) via a set of temperature sensors integrated on the IBTB (122), a temperature of each of a set of sections of the IBTB (122) for thermal management,
wherein the 4T4R 5G NR PSC is configured to offload heavy traffic from a plurality of macro cells and provide an enhanced signal in a traffic r environment above a pre-defined threshold.
8. The method (500) as claimed in claim 7, further comprising integrating in the IBTB (122), an Application-Specific Integrated Circuit (ASIC) transceiver chipset for processing a first layer and a Baseband Processor chipset for processing a second layer and a third layer.
9. The method (500) as claimed in claim 7, wherein the clock section includes a plurality of ultra-low noise clock generation Phased-Locked Loops (PLLs) (306), a plurality of programmable oscillators, and the plurality of system synchronizers (304) to maintain synchronization with one or more external systems.
10. The method (500) as claimed in claim 7, wherein the RFEB (124) comprises:
a pre-defined set of transmit chains for signal transmission, each with a matching Balun, a pre-driver amplifier, and a RF power amplifier;
a pre-defined set of receive chains for signal reception, each with a low noise amplifier, a band pass Surface Acoustic Wave (SAW) filter, and a matching network; and
a pre-defined set of observation chains, each acting as a Digital Pre-Distortion (DPD) feedback paths from power amplifiers (PAs) to the ASIC transceiver chipset for linearization.
11. The method (500) as claimed in claim 7, wherein the heat sink incorporates
the plurality of heat pipes configured to provide a uniform heat distribution and is
designed to enhance an overall product size and weight efficiency.
12. The method (500) as claimed in claim 7, wherein the RFEB (126) in connection with the IBTB (122) is configured to provide the pre-defined output.
| # | Name | Date |
|---|---|---|
| 1 | 202321044729-STATEMENT OF UNDERTAKING (FORM 3) [04-07-2023(online)].pdf | 2023-07-04 |
| 2 | 202321044729-PROVISIONAL SPECIFICATION [04-07-2023(online)].pdf | 2023-07-04 |
| 3 | 202321044729-FORM 1 [04-07-2023(online)].pdf | 2023-07-04 |
| 4 | 202321044729-DRAWINGS [04-07-2023(online)].pdf | 2023-07-04 |
| 5 | 202321044729-DECLARATION OF INVENTORSHIP (FORM 5) [04-07-2023(online)].pdf | 2023-07-04 |
| 6 | 202321044729-FORM-26 [13-09-2023(online)].pdf | 2023-09-13 |
| 7 | 202321044729-FORM-26 [05-03-2024(online)].pdf | 2024-03-05 |
| 8 | 202321044729-FORM 13 [08-03-2024(online)].pdf | 2024-03-08 |
| 9 | 202321044729-AMENDED DOCUMENTS [08-03-2024(online)].pdf | 2024-03-08 |
| 10 | 202321044729-Request Letter-Correspondence [03-06-2024(online)].pdf | 2024-06-03 |
| 11 | 202321044729-Power of Attorney [03-06-2024(online)].pdf | 2024-06-03 |
| 12 | 202321044729-Covering Letter [03-06-2024(online)].pdf | 2024-06-03 |
| 13 | 202321044729-CORRESPONDANCE-WIPO CERTIFICATE-07-06-2024.pdf | 2024-06-07 |
| 14 | 202321044729-ENDORSEMENT BY INVENTORS [12-06-2024(online)].pdf | 2024-06-12 |
| 15 | 202321044729-DRAWING [12-06-2024(online)].pdf | 2024-06-12 |
| 16 | 202321044729-CORRESPONDENCE-OTHERS [12-06-2024(online)].pdf | 2024-06-12 |
| 17 | 202321044729-COMPLETE SPECIFICATION [12-06-2024(online)].pdf | 2024-06-12 |
| 18 | 202321044729-ORIGINAL UR 6(1A) FORM 26-020724.pdf | 2024-07-05 |
| 19 | Abstract1.jpg | 2024-07-12 |
| 20 | 202321044729-FORM-9 [01-10-2024(online)].pdf | 2024-10-01 |
| 21 | 202321044729-FORM 18A [04-10-2024(online)].pdf | 2024-10-04 |
| 22 | 202321044729-FORM 3 [07-11-2024(online)].pdf | 2024-11-07 |
| 23 | 202321044729-FER.pdf | 2024-12-02 |
| 24 | 202321044729-Proof of Right [16-12-2024(online)].pdf | 2024-12-16 |
| 25 | 202321044729-ORIGINAL UR 6(1A) FORM 26-191224.pdf | 2024-12-24 |
| 26 | 202321044729-ORIGINAL UR 6(1A) FORM 1-181224.pdf | 2024-12-24 |
| 27 | 202321044729-ORIGINAL UR 6(1A) FORM 1-191224.pdf | 2024-12-28 |
| 28 | 202321044729-FORM 3 [16-01-2025(online)].pdf | 2025-01-16 |
| 29 | 202321044729-FER_SER_REPLY [16-01-2025(online)].pdf | 2025-01-16 |
| 30 | 202321044729-PatentCertificate30-05-2025.pdf | 2025-05-30 |
| 31 | 202321044729-IntimationOfGrant30-05-2025.pdf | 2025-05-30 |
| 1 | SearchstrategyE_02-12-2024.pdf |
| 2 | 202321044729_SearchStrategyAmended_E_SearchstrategyamendedstageAE_24-01-2025.pdf |