CLIAMS:We Claim:

1. A system for tripping (200) of a circuit breaker (150) to protect a load (190) having at least one conductive line (160), a power supply source (180) being connected to the load (190) via a switch (170) to send a supply current to the at least one conductive line (140), the circuit breaker (150) being connected between the load (190) and the switch (170) to monitor the supply current flowing through the at least one conductive line (160), the system (200) comprising
at least one sensor (140) having a current transformer (CT) and a Rogowski coil (RC) adapted to sense the supply current in the at least one conductive line (160) and generate an output in response thereto;
a trip circuit (130) having
• a rectifier (100) connected to receive an input in form of alternating current (AC) from the current transformer (CT) and to rectify the AC to a direct current (DC) bus voltage;
• a capacitor (C1) connected to store and build up the DC bus voltage (50);
• a DC- DC regulator (90) adapted to stepping down the DC bus voltage (50) to supply a lower voltage (40) therefrom;
• a switch (S3) connected to regulate the DC bus voltage (50);
• signal conditioning circuit (80) connected to receive an output from the Rogowski coil (RC) and generate an output in response thereto;
a controller (310) connected to the trip circuit (130) adapted to analyze the outputs received from the trip circuit, to detect a fault condition and to issue a trip signal (60) upon detecting the fault condition, wherein an external crystal clock (110) being connected to the controller (310) is used for supplying a clock to the controller (310);
a trip mechanism (120) connected to the controller (310) to receive the trip signal (60) from the controller (310) and to disconnect the load (190) from the power supply source (180) by activating the switch (170) via a signal (70);
wherein fast tripping of the circuit breaker (150) during the fault condition is achieved by using an internal crystal clock (low frequency) at start-up and switching the crystal from internal to the external crystal clock (high frequency) (110) during fault free condition.

2. The system (200) as claimed in claim 1, wherein the circuit breaker (150) is self powered as the circuit breaker (150) derives its power from the at least one conductive line (160).

3. The system (200) as claimed in claim 1, wherein the Rogowski coil (RC) includes primary windings to receive the supply current and secondary windings to generate an output in response to the supply current flowing therethrough.

4. The system (200) as claimed in claim 1, wherein the current transformer (CT) includes primary windings to receive the supply current and secondary windings to generate two outputs in response to the supply current flowing therethrough.

5. The system (200) as claimed in claim 1, wherein the rectifier (100) is a diode bridge rectifier including four rectifying diodes (D1, D2, D3 and D4).

6. The system (200) as claimed in claim 1, wherein the secondary windings of the CT send a first output to an anode of the D1 and a cathode of the D4 and a second output to an anode of the D2 and a cathode of the D3.

7. The system (200) as claimed in claim 1, wherein the cathodes of the D1 and the D2 are both connected to the DC bus voltage (50) and the anodes of the D3 and the D4 are both connected to a common ground.

8. The system (200) as claimed in claim 1, wherein the controller (130) is any one of a microcontroller, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) and another electronic device suitable for receiving signals indicative of an electrical characteristic (current or voltage) of the power supply source (180).
,TagSPECI:Field of the invention:

The present invention relates to a trip unit for a circuit breaker and more specifically, relates to system and a method for a fast tripping of a self powered circuit breaker during critical faults like short circuits and ground faults.

Background of the invention:

A self powered circuit breaker consists of electronic trip unit that comprises of various blocks like power supply, signal sensing, signal conditioning, data processing, memory management, user interface, data communication, configuration switches for setting adjustment parameters of the electronic trip unit and tripping mechanism.

The circuit breaker protects a load from fault events by monitoring current drawn by the load and disconnecting the load from its power source upon detecting a fault event. As the circuit breaker is powered from the current that is monitored by the circuit breaker; hence, it is called as a self-powered circuit breaker. The self-powered circuit breakers are conventionally powered from a rectified secondary winding of a current transformer (CT), with the monitored current sent through a primary winding of the current transformer.

Conventional current sensing systems for the electronic trip units employ a pair of current transformer and Rogowski coil in each phase of supply current and in a neutral phase of the supply current, if the neutral phase is used. Outputs of the current transformer are applied to respective full-wave bridge rectifiers for self powering a trip circuit. The rectified output of each line is then filtered by storage capacitor and Rogowski outputs are applied to signal conditioning circuits for current measurement. A signal related to the measured RMS current is then applied to the trip circuit that causes circuit breaker tripping when the measured current of a given magnitude exists for given times above set threshold.

The electronic trip units for the circuit breakers are used to automatically operate the circuit breakers under fault current conditions. The time required to open the circuit breakers depends on fault current magnitude and nature. Ground fault current magnitudes depend on a system used for grounding method. Solidly and low impedance grounded systems have high levels of ground fault currents. These high levels typically require line tripping to remove the fault from the system which can be easily achieved. However, high-impedance ground fault tripping is critical in the self powered circuit breakers because the time taken to trip this fault at the instant of closing the circuit breaker depends on the storage capacitor voltage. At lower currents, the storage capacitor takes more time to charge and delayed tripping of the fault. Hence, there is a need of inexpensive solution for fast tripping of the circuit breaker during low current ground fault condition at the instant of closing the breaker.

However, it should be recalled that as soon as the circuit breaker is closed, for the trip unit with microcontroller to be able to function properly, it is necessary to wait for a short but significant start-up time. During this start-up time, the electrical and electronic parts are subject to a transient that brings them up to steady-state conditions. Once the start-up time has elapsed, the trip unit is able to perform the normal functions of protection and to control opening of the circuit by the circuit-breaker. Hence, the start-up time Tst of the trip unit is an essential feature of the trip unit.

The start-up time Tst depends upon different factors as listed below:
a) A power-supply start-up time (Tps) of the supply device of the trip unit defined above, said supply device having as input the stretch of electrical network protected by the circuit-breaker and as output a supply adequate for the characteristics of the trip unit
b) Characteristic time of stabilization of the hardware components of the trip unit (Thw) necessary for operation of the microcontroller (for example, the oscillator)
c) Characteristic time of initialization of the software (Tsw) present in the microcontroller
d) Time for calculating the currents (Tc) that means the time necessary for processing the signal coming from the current sensors in a form useful for generating the signal for actuation of the protections.

The start-up time Tst is given by the sum of these partial times, namely, Tst=Tps+Thw+Tsw+Tc. Hence, any failure or fault that may occur in the part of the system protected by the circuit-breaker during this time Tst cannot be adequately interpreted by the trip unit.

In the known art, progressively more rapid systems and components have been studied and introduced, capable of reducing the time Tst to values in region of few mill seconds like 5 ms. But, just the reduction of Tst is insufficient to set the circuit-breaker in conditions of safety in the case of instantaneous short circuits that require tripping in times in the region of 2 ms.

In a conventional circuit breaker, an internal oscillation circuit generates a low speed internal clock in a low power consumption mode. A microcomputer in the conventional circuit breaker is capable of performing an operation in the low power consumption mode. An external oscillation circuit starts oscillation in reply to the low speed clock supplied from the internal oscillation circuit. A high speed clock from the external oscillation circuit is supplied to the microcomputer as an operation clock after elapse of an oscillation stable time. Thus, when power supply gets on, the microcomputer starts an over current detecting function. Therefore, there arises a problem that detection delay of approx 1.4 ms causes an increase in the interrupting current at a time of interruption and the passing energy due to the interrupting current in an instantaneous tripping operation when a short circuit happens in the turn-on mode of the circuit breaker. This disadvantageously affects the interruption performance of the circuit breaker.

A graph in figure 1A shows a relation of the interrupting currents when the operation delay of 1.4 ms occurs in the over current detection with the estimated short-circuit current Ip defined as 30 kA. The short-circuit current is 17 kA, in the case of a 2 ms operating time without the 1.4 ms delay from the short-circuit current starting up to the interruption after an over current is detected, while the short circuit current is 26 kA in the case of a 3.4 ms operating time with the 1.4 ms delay. The difference there between is about 9 kA.

In order to solve the above-mentioned problem in the conventional circuit breaker, according to the prior art DE19726639A1, in addition to quartz crystal oscillator (Q), a free running (auxiliary) oscillator is provided. The additional free-running oscillator is immediately effective in the circuit-breaker after start up. The free-running oscillator is formed by a Schmitt trigger (S) in conjunction with a capacitance (C) and a feedback resistor (R) as shown in figure 1B. If the crystal oscillator (Q) has started up, the free running oscillator is ineffective. Hence, a microprocessor (M) receives the clock signals provided by the crystal oscillator (Q).

In order to solve the above-mentioned problem in the conventional circuit breaker, according to the prior art EP2254214A2, after the power coming through the current transformer from the current flowing in the AC circuit is supplied from the power supply circuit to the microcomputer, the timing circuit (15) as shown in figure 1C is used in order to perform the waiting processing for the oscillation stable time of an external clock, and hence to switch from an internal clock to the external clock in the minimum waiting time. The timing circuit (15) is formed by a CR delay circuit including a resistor (15a) and a condenser (15b) for performing the oscillation stable time waiting processing and a comparator (15c) for comparing an output signal of the CR delay circuit with a direct current reference voltage (15d). Therefore, it is possible to perform the over current detection processing speedily after power-on and to reduce the interrupting current at a time of interruption and the passing energy due to the interrupting current.

In general, a circuit breaker includes an external oscillation circuit that generates a high speed external clock for operating a microcomputer at a high speed, a timing circuit that sets a timing corresponding to an oscillation stable time from start-up of the external oscillation circuit up to a time when the oscillation of the external oscillation circuit gets stable, and an operation clock selecting circuit that selectively supplies a low speed internal clock from the internal oscillation circuit as an operation clock of the microcomputer at start-up of the microcomputer and a high speed external clock from the external oscillation circuit as the operation clock of the microcomputer after elapse of the timing set by the timing circuit.

Above method needs additional timing circuits as shown in figures 1B and 1C that add to component count and board space. Also, incorporation of these additional timing circuits in existing compact modules of the trip unit is highly difficult.

Also, during the operation of the microprocessor, when faults in the oscillator and defects in the installation of the oscillating element cause termination in the oscillation of the oscillator, supply of the machine clock to the microprocessor stops. For example, the oscillation of the oscillator stops while the circuit breaker is ON, and thus, it is likely that the microprocessor will not be able to issue the trip command in case of fault. Hence, there is a need of detecting the status of an external clock.

Accordingly, there is a need of to develop a system and a method of tripping in self powered circuit breakers to alleviate above mentioned prior art problems thereby ameliorating performance during fault conditions like a short circuit condition and a low current ground fault condition.

Objects of the invention:

An object of the present invention is to achieve faster tripping of self powered circuit breakers during short circuit and ground fault conditions.

Another object of the present invention is to detect a status of an external clock thereby sending a reliable clock input to a controller.

Summary of the invention:

Accordingly, the present invention provides a system and a method for tripping of a circuit breaker to protect a load. The load includes any of a single conductive line/wire system, three conductive lines and multi conductive lines. The power supply source is connected to the load via a switch to send a supply current to the conductive lines. The circuit breaker is connected between the load and the switch to monitor the supply current flowing through the conductive lines. The system for tripping comprises of at least one sensor, a trip circuit, a controller and a trip mechanism. The sensor monitors the supply current and sends an output to the controller via the trip circuit. The controller analyzes the input received from the sensor and determines whether a fault condition has occurred. The controller is connected to the trip mechanism and is configured to actuate the trip mechanism responsive to detecting the fault condition by issuing a trip signal. After receiving the trip signal, the trip mechanism disconnects the load from the power supply source by activating the switch.

The controller brings an external crystal clock into operation once measured currents indicate a fault free condition. In this way, the stabilization time and power consumption are reduced. Fast tripping of the circuit breaker during the fault condition is achieved by using an internal crystal clock (low frequency) at start-up and switching the crystal from internal to the external crystal clock (high frequency) during fault free condition.
Brief description of the drawings:

Figure 1A is a waveform diagram showing a relation of interrupting current values when an operation start delay happens in an over current detecting circuit, in accordance with a prior art;

Figure 1B is a block diagram showing a structure of an external crystal and a free running oscillator, in accordance with a prior art;

Figure 1C is a block diagram of a timing circuit, in accordance with a prior art;

Figure 2 shows a block diagram of a system of tripping of a circuit breaker, in accordance with the present invention;

Figure 3 illustrates a block diagram of a trip circuit for tripping of the circuit breaker, in accordance with the present invention;

Figure 4 illustrates a graph of current consumption of a controller with respect to clock frequency, in accordance with the present invention; and

Figure 5 illustrates a flow chart of a method of tripping of the circuit breaker, in accordance with the present invention.

Detailed description of the embodiments:

The foregoing objects of the present invention are accomplished and the problems and shortcomings associated with the prior art, techniques and approaches are overcome by the present invention as described below in the preferred embodiments.

The present invention provides a system and a method for fast tripping in self powered circuit breakers during short circuit and ground fault conditions. The fast tripping of the circuit breaker is achieved by using at start-up internal crystal clock (low frequency) during the short circuit and the ground fault conditions and switching the crystal from internal to the external crystal clock (high frequency) during fault free condition.

The present invention is illustrated with reference to the accompanying drawings, throughout which reference numbers indicate corresponding parts in the various figures. These reference numbers are shown in bracket in the following description.

Referring to figures 2 to 3, in one aspect, a system of tripping (200) (hereinafter referred as “the system (200)”) in a circuit breaker (150) to protect a load (190) in accordance with the present invention is shown. In an embodiment, the system (200) is applicable to protect the load (190) including any of a single conductive line/wire system, three conductive lines and multi conductive lines. In a preferred embodiment, the load (190) is an inductive motor load including three conductive lines (160, 162, 164).

The load (190) is connected to a power supply source (180) via a switch (170). In the embodiment, the power supply source is a polyphone alternating current (AC) power source selected from any of single phase power source, three phase power source and multiphase power source based on a type of the load (190) to be protected. The power supply source (180) includes three conductors (not numbered) carrying a supply current for supplying to the three conductive lines (160, 162, 164) of the load (190). The power supply source (180) is arranged for supplying the three phases of the supply current in a configuration selected from any one of a delta configuration and wye configuration.

The circuit breaker (150) is connected to provide protective functions to the load (190) by monitoring the supply current flowing through the conducive lines (160, 162, 164). In the embodiment, the circuit breaker (150) is self-powered as all electronic components of the circuit breaker (150) are powered by the same current or voltage that the circuit breaker (150) is monitoring. The circuit breaker (150) derives its power from the three conductive lines (160, 162, 164).

The system (200) includes three sensors (140, 142, 144), a trip circuit (130), a controller (310), an external crystal clock (110) and a trip mechanism (120).

The three sensors (140, 142, 144) are connected respectively with the three conductive lines (160, 162, 164) to monitor the supply current flowing therethrough. Each of the three sensors (140, 142, 144) includes a current transformer (CT) and a Rogowski coil (RC). The supply current carried by the conductive line (160) flows through the primary windings of the CT and the RC of the sensor (140) such that the current flowing through the secondary windings of the CT and RC is proportional to the current flowing through the conductive line (160).

The secondary windings of the CT generate two outputs in response to the current flowing therethrough. The outputs of the secondary windings of the CT of each of the three sensors (140, 142, 144) is an alternating current (AC) and is connected to the rectifier (100).

The trip circuit (130) comprises of a rectifier (100), a capacitor (C1), a switch (S3), a DC-DC regulator (90), resistors (R1, R2) and a signal conditioning circuit (80). Specifically, the rectifier (100) of the trip circuit (130) receives the output of the CT of the sensor (140). In the embodiment, the rectifier (100) is a diode bridge rectifier for rectifying AC current of the sensor (140). The rectifier (100) includes four rectifying diodes (D1, D2, D3 and D4). The secondary winding of the CT sends a first output to an anode of the D1 and a cathode of the D4 and a second output to an anode of the D2 and a cathode of the D3. The cathodes of the D1 and the D2 are both connected to a DC bus voltage / actuator voltage (50) (herein after ‘the DC bus voltage (50)’) and the anodes of the D3 and the D4 are both connected to a common ground (not numbered). The rectifier (100) rectifies the outputs of the secondary winding of the CT from AC to a direct current (DC) bus voltage (50) for powering the trip mechanism (120) and DC- DC regulator (90).

The DC bus voltage (50) is built by charging a storage capacitor (C1). The DC- DC regulator (90) is used for stepping down the DC bus voltage (50) to supply lower voltage (40) to the controller (310), communication section (not shown) and display section (not shown).

The switch (S3) is used to regulate the DC bus voltage (50) of the trip mechanism (120). Closing of the switch (S3) causes the rectified current to flow back to the anode of the rectifier (100). The controller (310) allows closing and opening the switch (S3) periodically by issuing a switch signal to provide the desired DC bus voltage (50) preferred for the trip mechanism (120). The output of the RC of the sensor (140) is connected to the controller (310) via signal conditioning circuit (80).

The controller (310) is adapted to receive and analyze the outputs received from the sensor (140) to determine occurrence of a fault condition like short circuit and ground fault conditions. The controller issues a trip signal (60) upon detecting the fault condition. In an embodiment, the controller (310) is selected from any one of a microcontroller, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) and another electronic device suitable for receiving signals indicative of an electrical characteristic (current or voltage) of the power supply source (180). An external crystal clock (110) is used for supplying a clock to the controller (310). The controller (310) is connected to the trip mechanism (120).

The trip mechanism (120) receives the trip signal (60) from the controller (310) to disconnect the load (190) from the power supply source (180) by activating the switch (170) via a signal (70).

The trip mechanism (120) is connected to an actuator coil (not shown). The current sent through the actuator coil for actuating the trip mechanism (120). The current is sent through the actuator coil by discharging storage capacitor C1 by biasing a transistor (not shown) to complete a circuit including the energy storage and the actuator coil. In an embodiment, the actuator coil is a portion of a solenoid so that mechanical movement due to the actuation of the solenoid causes any one from a mechanical lever, a rod, a linkage and a rotating element to open electrical contacts in the trip mechanism (120), either directly or indirectly.

Opening of the circuit breaker (150) is accomplished by a conventional mechanical mechanism that is activated by an electromagnetic latching mechanism (not shown) triggered by the trip mechanism (120).

Referring again to figures 2 to 5, in another aspect, a method (400) of tripping in circuit breakers in accordance with the present invention is shown. Specifically, the method (400) is illustrated in conjunction with the system (200) of the present invention. The method (400) starts at step (210).

At step (220), the method (400) involves starting an operation with an internal crystal (low frequency) clock by the controller (310). At the instant of closing the circuit breaker (150), the trip mechanism generates required supply voltage to the controller (310) and the controller (310) starts operating with the internal crystal clock.

At step (230), the method (400) involves measuring the supply current (Imeasured). Since the internal crystal clock takes less time of an order of 10µs for stabilization, the controller (310) starts sampling the supply currents and computes the current values.

At step (240), the method (400) involves determining whether the measured current (Imeasured) is greater than threshold current (IHTh) value.

At step (250), the method (400) involves issuing a trip signal (60). If the measured current (Imeasured) is greater than threshold current (IHTh) value, then the controller (310) issues the trip signal (60).

At step (260), the method (400) involves determining whether the measured current (Imeasured) is less than threshold current (ILTh) value.

At step (270), the method (400) involves determining whether DC bus voltage (50) is built up or not. If the measured current (Imeasured) is less than threshold current (ILTh) value, then the controller (310) checks whether the DC bus voltage (50) is built up or not. If the DC bus voltage (50) is available then the controller (310) issues the trip signal (60). If the DC bus voltage (50) is not available then the controller (310) waits till the DC bus voltage (50) is available.

At step (280), the method (400) involves selecting an external crystal clock. If the measured current (Imeasured) is not less than threshold current (ILTh) value, then the controller (310) selects the external crystal clock (110) for run mode.

At step (290), the method (400) involves monitoring status of the external crystal clock. The controller (310) checks whether a fault has occurred on the external crystal clock (110). If the fault is detected on the external crystal clock (110), the controller (310) selects the internal crystal clock for run mode.

The method ends at step (300).

The system (200) uses the internal crystal clock at start that leads to reduce power consumption of the controller (310). As shown in the figure 4, the current drawn by the controller (310) is 2 mA at 1MHz and 9 mA at 12.5MHz. Since, the load current is reduced with the internal crystal clock, the storage capacitor (C1) charges faster to achieve faster tripping as compared to the conventional method during low current ground fault condition at the instant of closing the breaker.

The method (400) also monitors the status of the external crystal clock that adds to the reliability of a clock input to the controller (310). The controller (310) brings the external crystal clock into operation once measured currents indicate a fault free condition. Hence, stabilization time and extra component count are reduced.

Thus, fast tripping of the circuit breaker (150) during critical faults like short circuit and ground faults at the instant of closing the circuit breaker (150) is achieved by using at start-up internal crystal clock (low frequency) and switching the crystal from internal to the external crystal clock (high frequency) during fault free condition.

Advantages of the invention:
1. The system (200) and the method (400) use internal crystal (low frequency) during starting to reduce power consumption of the controller (310) for achieving fast tripping.
2. The method (400) switches the crystal from internal to the external once measured currents indicate a fault free condition to reduce stabilization time for achieving fast tripping.
3. The system (200) and the method (400) achieve faster tripping as compared to the conventional method during the short circuit fault condition and the low current ground fault condition at the instant of closing the circuit breaker (150).
4. The reliability of the clock input to the controller (310) is achieved, as the method (400) involves monitoring the status of the external crystal clock (110).

The foregoing descriptions of specific embodiments of the present invention have been presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the present invention to the precise forms disclosed, and obviously many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the present invention and its practical application, and to thereby enable others skilled in the art to best utilize the present invention and various embodiments with various modifications as are suited to the particular use contemplated. It is understood that various omissions and substitutions of equivalents are contemplated as circumstances may suggest or render expedient, but such omissions and substitutions are intended to cover the application or implementation without departing from the spirit or scope of the claims of the present invention.