Description:SYSTEM AND METHOD TO CALIBRATE ANALOG-TO-DIGITAL (A/D) CONVERTER

TECHNICAL FIELD
[0001] The present disclosure pertains to calibration systems, more specifically calibration of integrated analog-to-digital converter (ADC) to enhance measurement accuracy, ensuring optimal performance and safety in the electrical systems.
BACKGROUND
[0002] The description in the Background section includes general information related to the field of the present application. The background is only meant to provide context to a reader in understanding the present invention. It is neither to be taken as an admission that any of the provided information relates to prior art for the presently claimed invention nor that any publication explicitly or implicitly referenced within this section relates to prior art. The background section is merely meant to be illustrative rather than exhaustive and is primarily intended to identify problems associated with the present state of the art.
[0003] The measurement of electrical parameters is imperative in ensuring the optimum performance and secure operation of intelligent systems. Such significance emanates from the requirement to translate electrical quantities into a digital form for subsequent processing and control, particularly within the scope of electrical systems, where such measurements forge a pathway toward achieving a robust control over the evaluated system. Consider, for instance, the analog-to-digital converter (ADC), an electronic circuit used explicitly to transmute a real-world signal whether be temperature, pressure, acceleration, or speed into a digital replica of that signal. Engaging in the conversion is not merely a technological exercise; it is an operational necessity, since the ADC measurement accuracy intrinsically influences the stability and the robustness of the overarching system.
[0004] In an ideal scenario, ADCs embedded in chips would accurately convert electrical quantities into the corresponding digital values. However, the inherent non-linear characteristics of ADCs—which comprise diodes, notable for the non-linear operation and propensity for offset error—inevitably induce deviations from the true values. The propensity for error within ADCs underscores the vital necessity to engage in calibration, ensuring that the ICs deliver accurate measurements of the electrical quantities and parameters in question.
[0005] Within a practical context, considering systems such as the Battery Management System (BMS), Motor Controller Unit (MCU), and electrical chargers, it becomes clear that circumventing measurement errors is not only prudent but also integral to the proper utilization of available energy. The current traversing the ADC, for instance, is instrumental in estimating the battery State of Charge (SoC) and in implementing suitable protection mechanisms against both overcharge and over-discharge. On a similar note, temperature measurements, obtained and processed with exactitude, serve to avert operational conditions that veer into the extremes of excessive heat or hypothermia, thus safeguarding both the system and its user.
[0006] Therefore, to position the accuracy of the measurements as a lynchpin upon which hangs the efficacy of range and SoC estimations and the provision of safety to the user, wherein the need of safety accentuates the criticality of calibrating the ADCs, ensuring that accurate measurements of electrical system quantities or parameters are established even before progressing to subsequent stages of system development.
[0007] Reflecting further upon the aforesaid principles, delving into the multidimensional repercussions of imprecise measurements within electrical systems is important, underscoring that the implications are not confined to theoretical or isolated incidents. Rather, they can cascade through the system, compromising not only its operational efficiency but also its safety and reliability. Within a BMS, for instance, an error in the measurement of ADC could result in inaccurate SoC estimation, which could in turn jeopardize the energy management and safety of the battery system, culminating in scenarios of premature energy depletion or, conversely, dangerous overcharging.
[0008] Similarly, within an MCU, inaccuracies in measurements can translate to suboptimal motor control, affecting not only the performance but also the longevity and operational safety of the motor. In the context of an electrical charger, measurement discrepancies could manifest as inefficient charging cycles, undermining the lifespan of the batteries involved and, by extension, the reliability of the devices that depend upon them.
[0009] Given the tangible, multifaceted risks that originate from a seemingly minute source of error within the ADC, ensuring the precision of the conversions is a stringent necessity. Calibration of ADCs, therefore, materializes as a crucial preliminary step within the development of intelligent systems, forging a foundational bedrock upon which the reliability, efficacy, and safety of the systems are inexorably built. The calibration facilitates the smooth, effective operation of the system, but it also forestalls the cascade of issues that might emanate from imprecise measurements, thus underpinning both the immediate performance and the long-term reliability of intelligent electrical systems. Consequently, the calibration is not merely a technical endeavor but a cardinal, indispensable action to ensure that subsequent developments within the system are constructed upon a reliable, accurate base of electrical measurements.

SUMMARY
[0010] The aim of the present disclosure is to provide a system and method to calibrate an analog-to-digital (A/D) converter to overcome the non-linearity of the integrated ADC using low-cost voltage reference. The aim of the disclosure is achieved by the system and method to calibrate an analog-to-digital (A/D) converter for utilization in electronics applications involving humans where safety and risk of human life is involved.
[0011] In an embodiment, the system is disclosed for the calibration of an analog-to-digital (A/D) converter. The system includes a first voltage reference integrated circuit (IC) that receives a first reference electrical signal (Vref1) and generates a first output signal (ADCOut1); a second voltage reference IC that receives a second reference electrical signal (Vref2) and generates a second output signal (ADCOut2), wherein the second reference electrical signal (Vref2) is different from the first electrical reference signal (Vref1); and a microcontroller coupled with the first voltage reference IC and the second voltage reference IC, wherein the microcontroller determines a gain factor (ADCGain) and an off-set factor (ADCOffset) based on the ADCOut1, the ADCOut2, the Vref1 and the Vref2, wherein the determined ADCGain and the ADCOffset are utilized to calibrate the A/D converter.
[0012] In an embodiment, the microcontroller determines the ADCGain and the ADCOffset using a technique selected from: a linear regression algorithm, a polynomial regression algorithm and a look-up table.
[0013] In an embodiment, the microcontroller triggers calibration by an occurrence of at least one of: a detection of a power-on event, a predetermined period, and a demand from a user.
[0014] In an embodiment, the first voltage reference IC and the second voltage reference IC are integrated on the same substrate or different substrates.
[0015] In an embodiment, the microcontroller is coupled with an external A/D converter that generates an output digital signal in response to an input analog signal, wherein the internal A/D converter utilizes the output digital signal and the input analog signal to calibrate the external A/D converter.
[0016] In an embodiment, a third voltage reference IC provides additional reference voltages for use in the calibration process.
[0017] In an embodiment, the method includes the steps: receiving a first reference electrical signal (Vref1) at a first voltage reference integrated circuit (IC); generating a first output signal (ADCOut1) based on said first reference electrical signal (Vref1) using said first voltage reference IC; receiving a second reference electrical signal (Vref2) at a second voltage reference IC, wherein said second reference electrical signal (Vref2) is distinct from said first reference electrical signal (Vref1); generating a second output signal (ADCOut2) based on said second reference electrical signal (Vref2) using said second voltage reference IC; coupling a microcontroller with said first voltage reference IC and said second voltage reference IC; determining a gain factor (ADCGain) and an off-set factor (ADCOffset) using said microcontroller, based on said ADCOut1, said ADCOut2, said Vref1, and said Vref2; and utilizing the determined ADCGain and ADCOffset to calibrate said analog-to-digital converter.

BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The following Brief Description of Drawings section will be better understood when read in conjunction with the appended drawings. Although exemplary embodiments of the present invention are illustrated in the drawings, the embodiments are not limited to the specific features shown in the drawings. The drawings illustrate simplified views of the claimed invention and are therefore, not made to scale. Identical numbers in the drawings indicate like elements in the drawings.
[0019] The embodiments of the present invention will now be briefly described by way of example only with reference to the drawings in which:
[0020] FIG. 1 illustrates a system to calibrate an internal analog-to-digital (A/D) converter, in accordance with an embodiment of the present disclosure;
[0021] FIG. 2 illustrates a method for calibrating an internal analog-to-digital converter, in accordance with embodiments of present disclosure.;
[0022] FIG. 3 depicts a measurement procedure for a lithium-ion battery, in accordance with an embodiment of the present disclosure;
[0023] FIG. 4 showcases a voltage-current (V-I) characteristic graph pertaining to electronic elements employed in internal analog-to-digital converters (iADCs), in accordance with an embodiment of the current disclosure;
[0024] FIG. 5 depicts a process flow diagram for the calibration of a microcontroller (µC) iADC, employing voltage references, in accordance with embodiments of the present disclosure; and
[0025] FIG. 6 presents a process flow diagram detailing the calibration procedure for external ADCs by leveraging calibrated µC iADCs, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION OF EMBODIMENTS
[0001] The following is a detailed description of exemplary embodiments to illustrate the principles of the invention. The embodiments are provided to illustrate aspects of the invention, but the invention is not limited to any single embodiment. The scope of the invention encompasses without limitation numerous alternatives, modifications and combinations.
[0002] It shall be noted that as used within the current section as well as in the appended claims, the singular forms “a”, “an”, and “the” include plural referents unless the context clearly dictates otherwise. Further, the use of words such as “first”, “second”, “third” and the like does not represent any particular order. Such words have been merely employed to distinguish one individual component from another. Moreover, “each” refers to each member of a set or each member of a subset of a set.
[0003] An arrangement of two or more components, unless stated specifically, can be done without limitation in any manner relative to a three-dimensional coordinate system. Thus, a second component arranged underneath a first component may also be taken to mean that the first component is arranged underneath the second component.
[0026] FIG. 1 illustrates a system 100 (interchangeably referred as calibration system 100) to calibrate an internal analog-to-digital (A/D) converter (interchangeably referred as iADC), in accordance with an embodiment of the present disclosure. The system 100 comprises a first voltage reference integrated circuit (IC) 102, a second voltage reference integrated circuit (IC) 104, a microcontroller 106 and other known components of a calibration device/apparatus. Term "calibrate" refers to the act of evaluating and adjusting the precision and accuracy of measurement equipment under test. In the context of equipment or instrumentation, calibration ensures that device performs in specified parameters and delivers results that are traceable to standards. Calibration of any device can be executed by comparing the output of the device (that needs to be calibrated) with a known standard or reference.
[0027] In one embodiment, the calibration system 100 is configured to calibrate iADC to counteract and rectify possible errors due to factors such as component aging, temperature drift, external interference, or manufacturing variances. Calibration of iADC is essential to rectify such discrepancies, ensuring that the digital output accurately represents the analog input. Post calibration, the A/D converter provides output closer to the true values, ensuring a more accurate representation of the analog signals. The calibration system 100 is equipped with the modular components, which are arranged to process reference signals, subsequently determining the calibration coefficients. Once the calibration coefficients are ascertained, said calibration system 100 enables the iADC to produce a digital output. Notwithstanding the non-linearities of the iADC, the output is aligned substantially with the provided analog input. Therefore, the calibration system 100 ensures that the digital representation rendered by the iADC can be precise, reliable, and consistent, thereby diminishing discrepancies and enhancing the fidelity of the converted signals (analog to digital).
[0028] In one exemplary embodiment, said first voltage reference integrated circuit (IC) 102 is configured to receive a first reference electrical signal Vref1 and, in response thereto, generate a first output signal ADCOut1 The Vref1 can be generated from various sources, depending on the application, such as from an external voltage source, battery, or another suitable energy storage device. The first voltage reference IC 102 is configured to process the said Vref1. The reception of Vref1 by said first voltage reference IC 102 is executed to established electrical standards, ensuring that the converted output signal, ADCOut1, is derived with minimal susceptibility to external perturbations or interferences. Thus, in synthesizing ADCOut1, the first voltage reference IC 102 inherently considers the idiosyncrasies and variations of Vref1, ensuring that the generated output signal, ADCOut1, is a robust and reliable representation of the initially received reference signal, thereby establishing a foundation for accurate and dependable analog-to-digital conversion in subsequent operational stages.
[0029] In a disclosed embodiment, the second voltage reference IC 104 is structured to receive a second reference electrical signal Vref2 (from a power source) and in response thereto, generate a second output signal, labeled as ADCOut2 (the Vref2 is distinctly differentiated from the Vref1). The second voltage reference IC 104 comprises precise internal circuitry to ensure that the Vref2 is accurately referenced. Subsequent processing stages within said second voltage reference IC 104 are architected to convert the received Vref2 into the corresponding digital representation, resulting in the generation of ADCOut2. The conversion, achieved through structural attributes of said second voltage reference IC 104, emphasizes the preservation of signal integrity and minimization of aberrations. Furthermore, calibration and feedback mechanisms embedded within said second voltage reference IC 104 ensure that the generated ADCOut2 accurately reflects the characteristics of the provided Vref2, thereby establishing reliable and consistent signal translation. It would be appreciated that Vref2 is distinct/different from Vref1. The term “different” indicates values or quality or characteristic are distinguishable in nature and not identical. The difference between Vref2 can be 5 to 90 % greater than Vref1, alternatively Vref2 can be 5 to 90 % lesser than Vref1.
[0030] In an aspect, the first IC 102 and/or second IC 104 receives an input signal (e.g., voltage, a current, or even a digital signal). The received signal may undergo various stages of conditioning such as amplification to amplify the signal, noise removal, buffering to provide isolated subsequent inputs to ensure received signal loaded down or altered, and the like. After processing the received signal, the first IC 102 and/or second IC 104 produce corresponding output signals ADCOut1 and ADCOut2, respectively.
[0031] In a particular embodiment, the microcontroller 106 is operatively coupled with the first voltage reference IC 102 and the second voltage reference IC 104. Based on the output signals ADCOut1 and ADCOut2 as well as reference electrical signals Vref1 and Vref2, said microcontroller 106 is configured to determine a gain factor, denoted as ADCGain, and an offset factor, referred to as ADCOffset. Upon determination of the aforesaid factors, the ADCGain and the ADCOffset are used to calibrate the iADC. Through the calibration system 100, the analog-to-digital conversion process is finetuned, thereby ensuring that the output of such iADC is an accurate representation of the analog input signal, in spite of inherent factors (e.g., aging, external influence etc.) of iADC. Thus, the coupling of the microcontroller 106 with the first voltage reference IC 102 and the second voltage reference IC 104, and the subsequent determination of ADCGain and ADCOffset, stands as an essential aspect for the calibration procedure, enhancing the overall integrity and fidelity of the analog-to-digital conversion.
[0032] In an embodiment, subsequent to the generation of respective output signals ADCOut1 and ADCOut2 by the first voltage reference IC 102 and the second voltage reference IC 104, the generated ADCOut1 and ADCOut2 are fed to the microcontroller 106. A comparison between ADCOut1 and ADCOut2 and the reference electrical signals Vref1 and Vref2, is executed by said microcontroller 106. Through a computational process initiated by said microcontroller 106, the extent of deviation from anticipated digital values is ascertained. Said deviation is, in essence, construed as a manifestation of the non-linearity and the inherent error invariably introduced by the iADC. Such deviation quantification facilitates the delineation of requisite corrective measures, thereby empowering said microcontroller 106 to proficiently modulate subsequent digital outputs from the iADC, ensuring a markedly augmented accuracy and reliability in data conversion processes, despite intrinsic non-linear characteristic impediments. Such calibrated management of the output of iADC, as orchestrated by such microcontroller 106, exemplifies an integration of precision and corrective methodology and mitigating traditional conversion discrepancies.
[0033] In a particular embodiment, discrepancies between anticipated digital values and actual received digital values are observed. Considering such discrepancies, said microcontroller 106 is configured to compute the ADCGain. Said ADCGain is representative of the requisite scaling factor or amplification determined to correct the signal in question. By means of the calculated ADCGain, the output proffered by the iADC is aligned substantially with the anticipated digital value corresponding to a specified analog input. Such alignment facilitated by said microcontroller 106 serves to optimize the fidelity of the conversion, enhancing the precision and reliability of the digital representation of iADC in relation to the analog precursor. The inclusion of such a computational procedure within said microcontroller 106 elucidates an advanced methodological approach, aiming to bridge the gap between expected and realized digital outcomes inherent to analog-to-digital conversion processes.
[0034] In another embodiment, in addition to the ADCGain, said microcontroller 106 is configured to ascertain the ADCOffset. The ADCOffset is determined as a corrective value, indicative of the necessary shift in the output to achieve congruence with a predetermined desired value. Such a shift, as delineated by said microcontroller 106, can manifest either in a positive or negative direction. The directionality of the shift is contingent upon whether the ADCOut1 and the ADCOut2, as produced by the iADC, are consistently registered above or below the expected value. The determination of the corrective shift, whether additive or subtractive, is integral for ensuring that the outputs from the iADC align with the established reference standards, thereby optimizing the calibration process executed by such microcontroller 106.
[0035] In a particular embodiment, once both the ADCGain and ADCOffset values are ascertained, integration of the values into the operational framework of the iADC is performed by the microcontroller 106. Through such integration, calibration of the iADC is executed in a manner whereby subsequent measurements are aligned with expected digital outputs. The calibration, offering a conduit through which systematic and replicable adjustments to the operational parameters of iADC are afforded, ensures enhanced accuracy and fidelity in the conversion of analog signals to the digital counterparts. Said calibration is enabled to be repeated periodically or, alternatively, whenever necessitated, as determined by performance metrics or operational exigencies, ensuring that a consistent performance of the iADC is maintained over temporal spans. The embodiment thus facilitates an adaptive, dynamically calibratable environment wherein the operational integrity of such iADC is preserved and optimized, ensuring the delivery of digital outputs that are both reliable and reflective of the analog inputs received, thereby substantiating the operational efficacy and reliability of the calibration system 100.
[0036] In another embodiment, said calibration system 100 is further characterized by the integration of a feedback mechanism that is arranged to assess the performance of the iADC subsequent to the calibration process. In case of discrepancies, or the iADC deviates from the calibrated state due to externalities such as component aging, temperature variances, or other ambient conditions, a recalibration process is initiated by said calibration system 100. Through the feedback mechanism, the iADC is maintained at an optimal performance threshold, irrespective of detrimental factors that may influence the operational precision.
[0037] In an exemplary embodiment, said system 100 is configured to support integration with a plurality of voltage reference ICs. Through the inclusion of extended reference signals, a wider spectrum of outputs is made attainable. Consequently, the microcontroller 106 is provided with a richer, more extensive dataset. By virtue of the enhanced dataset, the determination

of the ADCGain and ADCOffset factors can be achieved with heightened accuracy. Such precise determination of factors aids in refining and augmenting the efficacy of the calibration process associated with said iADCs.
[0038] In another embodiment, the calibration system 100 is not limited exclusively to the quantity of voltage reference integrated circuits (ICs). The algorithm within the microcontroller 106 can be updated. Through the modification of said algorithm, assurance is provided that the calibration process maintains the relevance and efficacy across varied industries and diverse use-case scenarios.
[0039] In a disclosed embodiment, the robustness of said calibration system 100 is enhanced by integration with external interfaces, whereby real-time monitoring is facilitated. Through the external interfaces, computed values of microcontroller 106 are made accessible. Furthermore, the performance of the iADC over extended periods is monitored and documented. Consequently, based on the data retrieved and the evaluations presented by the system 100, informed decisions regarding recalibration or upgrades of said iADC are enabled. The configuration provides a mechanism to maintain the integrity and efficiency of the iADC and offers professionals, such as technicians and engineers, the requisite tools and insights to ensure that the iADC operates at its optimal parameters and remains aligned with evolving technological standards.
[0040] In an embodiment, the microcontroller 106 can ascertain the ADCGain and the ADCOffset by utilizing diverse techniques. Amongst the various techniques that can be deployed, a linear regression algorithm, a polynomial regression algorithm, or utilization of a look-up table may be selectively employed by said microcontroller 106. The linear regression algorithm is employed for the purpose of delineating a direct linear relationship between input and output, thus affording simplicity and computational ease. Conversely, the polynomial regression algorithm can accommodate more intricate, non-linear relationships, thereby addressing the inherent complexities associated with the iADCs. Lastly, the look-up table, providing a predefined mapping, affords expedited and streamlined calibration processes by delivering direct correlation values to said microcontroller 106, thereby facilitating an efficient determination of calibration parameters and ensuring integrity in the resulting iADC output. In said embodiment, therefore, said microcontroller 106 acts as an essential tool, integrating diverse algorithms and methodologies to effectuate accurate and efficient calibration of the iADC.
[0041] In another embodiment, the microcontroller 106 may be configured to possess advanced triggers to initiate the calibration process for the iADC. Several events or conditions have been identified under which the calibration may be instigated. Upon detection of a power-on event, calibration by said microcontroller 106 is activated, ensuring that the system 100 is subjected to calibration immediately upon energization. In another configuration, said microcontroller 106 is set to commence the calibration process at predetermined intervals, ensuring that consistent accuracy of system 100 is maintained throughout the operational duration. Furthermore, for enabling human interaction with the calibration process, a provision is made wherein the microcontroller 106 can be actuated to initiate calibration based on a specific request from a user, thereby ensuring adaptability and immediate responsiveness to operational exigencies.
[0042] In a further embodiment, the first voltage reference integrated circuit (IC) 102 and the second voltage reference IC 104 may be arranged to facilitate both integration and separation in the calibration system 100. Integration of the first voltage reference IC 102 and the second voltage reference IC 104 onto a singular substrate is enabled, thereby optimizing spatial utility and ensuring proximate communication between the said first voltage reference integrated circuit (IC) 102 and the said second voltage reference IC 104. Such integration may mitigate external interferences and amplify operational efficiency by virtue of minimized physical and electrical distances therein. Conversely, in instances demanding spatial distribution or in the presence of unique layout constraints, provision is made for the first voltage reference IC 102 and the second voltage reference IC 104 to be situated on disparate substrates. Such arrangement ensures flexibility in system design and preserves the integral fidelity of the calibration process, offering an adaptable architecture that is congruent with varied system topologies and operational prerequisites. Thus, said first voltage reference IC 102 and said second voltage reference IC 104 proffer a versatile framework, adaptable to distinct design exigencies while steadfastly maintaining calibration process integrity.
[0043] In another embodiment, the microcontroller 106 may be coupled with a Battery Management System (BMS) IC. Through such integration, enhanced synergy is achieved, wherein said microcontroller 106 is enabled to calibrate the iADC and is also facilitated to extend the calibration capabilities to the BMS IC. The accurate measurement within the BMS can be directly instrumental in influencing the efficiency, longevity, and safety of the battery.
[0044] In a subsequent embodiment, said calibration system 100 may be characterized by the inclusion of an additional component namely, a third voltage reference IC. Such integration is implemented to bestow heightened granularity upon the calibration process. With the introduction of an additional reference voltage, said calibration system 100 is rendered capable of deriving an expanded spectrum of outputs. The augmentation, facilitated by the additional component, enriches the calibration depth and guarantees that a dataset is presented to the microcontroller 106. From the dataset, precise values for ADCGain and ADCOffset are more accurately computed and determined by said microcontroller 106. It would be appreciated that a person ordinarily skilled in the art can deploy multiple reference ICs such as 4, 5, 6, 7, 8 and the like.
[0045] In an embodiment, the microcontroller 106 can be coupled with an external A/D converter that generates an output digital signal in response to an input analog signal. The iADC receives (through wired or wireless network) the output digital signal and input analog signal from the external ADC to calibrate the external ADC. By analyzing any differences between the expected output (based on the input analog signal) and the actual output from the external ADC, the iADC can determine how the external ADC needs to be adjusted or calibrated. For example, This external ADC is connected to various sensors in the battery pack. For instance, as the battery discharges and charges, a state of charge (SOC) sensor may output analog voltage changes corresponding to SOC. The external ADC, connected to the SOC sensor converts analog reading and outputs a digital value that it corresponds to. The iADC can use the analog reading and output digital value to calibrate the external ADC.
[0046] FIG. 2 illustrates a method 200 for calibrating an internal analog-to-digital converter, in accordance with embodiments of present disclosure. At step 202, a first reference electrical signal (Vref1) is received by a first voltage reference integrated circuit (IC). The Vref1 serves as the initial reference for the calibration procedure. At step 204, the first voltage reference IC processes the received Vref1 to generate a corresponding first output signal ADCOut1, which is representative of the characteristics of the received signal. At step 206, a distinct second reference electrical signal (Vref2) is received by a second voltage reference integrated circuit (IC). The Vref2 is different from the Vref1 and forms a distinct reference point for the calibration process. At step 208, the second voltage reference IC processes the received Vref2 to generate a corresponding second output signal ADCOut2, reflecting the characteristics of the received signal. At step 210, utilizing the generated output signals (ADCOut1 and ADCOut2) and corresponding reference electrical signals (Vref1 and Vref2), the microcontroller calculates and determines the gain factor (ADCGain) and off-set factor (ADCOffset). The aforesaid factors are essential for aligning the response of ADC with the desired accuracy. At step 212, the determined ADCGain and ADCOffset are subsequently applied to calibrate the iADC, ensuring accurate and reliable conversion of analog signals into digital values.
[0047] FIG. 3 depicts a measurement procedure for a lithium-ion battery, in accordance with an embodiment of the present disclosure. As demonstrated, the voltages of individual cells are aligned in a series configuration. To capture the desired parameter, external differential integrated circuits (ICs) are set alongside a microcontroller (µC) iADC. iADCs external to the silicon wafer housing of the µC iADC are responsible for relaying the voltage, current, and temperature readings to a microcontroller unit. As discernible from the provided diagram, the highlighted black block, which encompasses one or more iADCs, constitutes an Application-Specific Integrated Circuit (ASIC) system-on-chip (SOC) for the Battery Management System (BMS). Such external ADCs, specifically the iADCs within the IC, relay key electrical parameters or quantities, encompassing the voltage, current, and temperature associated with the battery cells, to the µC.
[0048] FIG. 4 showcases a voltage-current (V-I) characteristic graph pertaining to electronic elements employed in internal analog-to-digital converters (iADCs), in accordance with an embodiment of the current disclosure. The presented V-I traits of the incorporated electronic elements demonstrate a non-linear behavior. Consequently, both standalone iADCs and those integrated with the µC deviate from the authentic input values. Such discrepancies in gauging the genuine value of electrical metrics (like voltage, current, temperature) can lead to misinterpretations of subsequent derived metrics, including range computation, SoC assessment, and more. Such misalignment in gauging electrical metrics can be attributed to the ADCGain and ADCOffset intrinsic to the iADCs. Hence, there is a pressing need to calibrate or rectify the attributes (specifically, ADCGain and ADCOffset) of iADCs before being deployed in vital applications. For the sake of clarity, a 2nd order non-linearity is considered in the diagram, though the degree of non-linearity might vary depending on the specific iADC in use and the precision of measurement sought. The 2nd order non-linearity of iADC can be described by the following equation:
Actual Output Voltage (Digital Count) = ADCGain * Input Voltage (Analog Input ) + ADCOffset
[0049] To overcome the non-linearity, all iADCs can be calibrated. To calibrate iADC, knowledge of ADCGain and ADCOffset of all the iADCs of µC are necessary. To calculate the quantities (i.e., ADCGain and ADCOffset), two precise voltage reference ICs are used. Further, the two voltage reference ICs are connected to the common iADC channel pins of the µC, to find two unknown variables ADCGain and ADCOffset for which two equations are required.
[0050] FIG. 5 depicts a process flow diagram for the calibration of a microcontroller (µC) iADC, employing voltage references in accordance with an embodiment of the present disclosure. The procedure initiates with the resetting of the µC, followed by the actuation of voltage reference iADC channel reading. After the aforesaid stage, the µC retrieves the true value of the reference voltage directly from the associated memory. Thereafter, a linear system is utilized to ascertain both gain and offset values. Predicated upon the thus acquired gain and offset, a calibration of the µC iADC is consummated. The aforementioned phases within the FIG. 5 ensure that the µC iADC, through structured steps involving authentic reference voltage retrieval and the application of a linear system for gain and offset determination, achieves calibration, thereby enhancing the performance and accuracy in consequent operational scenarios.
[0051] FIG. 6 presents a process flow diagram detailing the calibration procedure for external ADCs by leveraging calibrated µC iADCs, in accordance with an embodiment of the present disclosure. An initial verification step ensures the µC iADC has undergone calibration. Once confirmed as calibrated, the µC iADC proceeds to extract data from the external IC ADC. Subsequently, using the extracted data, the gain and offset values pertinent to the external IC ADC are determined. With the determined gain and offset values, a precision-driven calibration of the external IC ADC is executed. The flow ensures that the external ADCs achieve a high degree of accuracy and reliability by capitalizing on the pre-calibrated parameters of the µC iADC, demonstrating an integrated approach to enhancing the fidelity of data conversion processes across both internal and external ADC systems.
[0052] The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the spirit and scope of the embodiments as described herein.
[0053] It should be apparent to those skilled in the art that many more modifications besides those already described are possible without departing from the inventive concepts herein. The inventive subject matter, therefore, is not to be restricted except in the spirit of the appended claims. Moreover, in interpreting both the specification and the claims, all terms should be interpreted in the broadest possible manner consistent with the context. In particular, the terms “comprises” and “comprising” should be interpreted as referring to elements, components, or steps in a non-exclusive manner, indicating that the referenced elements, components, or steps may be present, or utilized, or combined with other elements, components, or steps that are not expressly referenced. Where the specification claims refer to at least one of something selected from the group consisting of A, B, C … and N, the text should be interpreted as requiring only one element from the group, not A plus N, or B plus N, etc.

CLAIMS
What is claimed is:
1. A system to calibrate an internal analog-to-digital (A/D) converter, the system comprises:
a first voltage reference integrated circuit (IC) which receives a first reference electrical signal (Vref1) and generates a first output signal (ADCOut1);
a second voltage reference IC which receives a second reference electrical signal (Vref2) and generates a second output signal (ADCOut2), wherein the second reference electrical signal (Vref2) is different from the first electrical reference signal (Vref1); and
a microcontroller coupled with the first voltage reference IC and the second voltage reference IC, wherein the microcontroller determines a gain factor (ADCGain) and an off-set factor (ADCOffset) based on the ADCOut1, the ADCOut2, the Vref1 and the Vref2, wherein the determined ADCGain and the ADCOffset are utilized to calibrate the internal A/D converter.
2. The system as claimed in claim 1, wherein the microcontroller determines the ADCGain and the ADCOffset using a technique selected from: a linear regression algorithm, a polynomial regression algorithm and a look-up table.
3. The system as claimed in claim 1, wherein the microcontroller triggers calibration by an occurrence of at least one of: a detection of a power-on event, a predetermined period, and a demand from a user.
4. The system as claimed in claim 1, wherein the first voltage reference IC and the second voltage reference IC are integrated on the same substrate or different substrates.
5. The system as claimed in claim 1, wherein the microcontroller is coupled with an external A/D converter that generates an output digital signal in response to an input analog signal, wherein the internal A/D converter utilizes the output digital signal and the input analog signal to calibrate the external A/D converter.
6. The system of claim 1, further comprising a third voltage reference IC for providing additional reference voltages for use in the calibration process.
7. A method for calibrating an internal analog-to-digital (A/D) converter, the method comprising the steps of:
receiving a first reference electrical signal (Vref1) at a first voltage reference integrated circuit (IC);
generating a first output signal (ADCOut1) based on said first reference electrical signal (Vref1) using said first voltage reference IC;
receiving a second reference electrical signal (Vref2) at a second voltage reference IC, wherein said second reference electrical signal (Vref2) is distinct from said first reference electrical signal (Vref1);
generating a second output signal (ADCOut2) based on said second reference electrical signal (Vref2) using said second voltage reference IC;
determining a gain factor (ADCGain) and an off-set factor (ADCOffset) using said microcontroller, based on said ADCOut1, said ADCOut2, said Vref1, and said Vref2; and
utilizing the determined ADCGain and ADCOffset to calibrate said analog-to-digital converter.

ABSTRACT
A system is disclosed for calibrating an internal analog-to-digital converter (iADC). The system includes a first voltage reference integrated circuit (IC) to receive a primary reference electrical signal (Vref1) and produce a first output signal (ADCOut1). A second voltage reference IC receives a distinct second reference electrical signal (Vref2) and generates a secondary output signal (ADCOut2). Second reference signal (Vref2) diverges from the initial reference signal (Vref1). A microcontroller interfaces with both voltage reference ICs. The microcontroller deduces both a gain factor (ADCGain) and an offset factor (ADCOffset), based on the collated output signals and initial reference signals. The system leverages the discerned ADCGain and ADCOffset values to fine-tune and calibrate the iADC, thereby ensuring accurate digital representation of analog inputs. The calibrated iADC can be used to calibrate an external A/D converter that generates an output digital signal in response to an input analog signal.
Fig. 1 , Claims:CLAIMS
What is claimed is:
1. A system to calibrate an internal analog-to-digital (A/D) converter, the system comprises:
a first voltage reference integrated circuit (IC) which receives a first reference electrical signal (Vref1) and generates a first output signal (ADCOut1);
a second voltage reference IC which receives a second reference electrical signal (Vref2) and generates a second output signal (ADCOut2), wherein the second reference electrical signal (Vref2) is different from the first electrical reference signal (Vref1); and
a microcontroller coupled with the first voltage reference IC and the second voltage reference IC, wherein the microcontroller determines a gain factor (ADCGain) and an off-set factor (ADCOffset) based on the ADCOut1, the ADCOut2, the Vref1 and the Vref2, wherein the determined ADCGain and the ADCOffset are utilized to calibrate the internal A/D converter.
2. The system as claimed in claim 1, wherein the microcontroller determines the ADCGain and the ADCOffset using a technique selected from: a linear regression algorithm, a polynomial regression algorithm and a look-up table.
3. The system as claimed in claim 1, wherein the microcontroller triggers calibration by an occurrence of at least one of: a detection of a power-on event, a predetermined period, and a demand from a user.
4. The system as claimed in claim 1, wherein the first voltage reference IC and the second voltage reference IC are integrated on the same substrate or different substrates.
5. The system as claimed in claim 1, wherein the microcontroller is coupled with an external A/D converter that generates an output digital signal in response to an input analog signal, wherein the internal A/D converter utilizes the output digital signal and the input analog signal to calibrate the external A/D converter.
6. The system of claim 1, further comprising a third voltage reference IC for providing additional reference voltages for use in the calibration process.
7. A method for calibrating an internal analog-to-digital (A/D) converter, the method comprising the steps of:
receiving a first reference electrical signal (Vref1) at a first voltage reference integrated circuit (IC);
generating a first output signal (ADCOut1) based on said first reference electrical signal (Vref1) using said first voltage reference IC;
receiving a second reference electrical signal (Vref2) at a second voltage reference IC, wherein said second reference electrical signal (Vref2) is distinct from said first reference electrical signal (Vref1);
generating a second output signal (ADCOut2) based on said second reference electrical signal (Vref2) using said second voltage reference IC;
determining a gain factor (ADCGain) and an off-set factor (ADCOffset) using said microcontroller, based on said ADCOut1, said ADCOut2, said Vref1, and said Vref2; and
utilizing the determined ADCGain and ADCOffset to calibrate said analog-to-digital converter.