Abstract: In one embodiment, a processor includes: a plurality of cores each comprising a multi-threaded core to concurrently execute a plurality of threads; and a control circuit to concurrently enable at least one of the plurality of cores to operate in a single-threaded mode and at least one other of the plurality of cores to operate in a multi-threaded mode. Other embodiments are described and claimed.
| # | Name | Date |
|---|---|---|
| 1 | 202047055051-FORM 1 [17-12-2020(online)].pdf | 2020-12-17 |
| 2 | 202047055051-DRAWINGS [17-12-2020(online)].pdf | 2020-12-17 |
| 3 | 202047055051-DECLARATION OF INVENTORSHIP (FORM 5) [17-12-2020(online)].pdf | 2020-12-17 |
| 4 | 202047055051-COMPLETE SPECIFICATION [17-12-2020(online)].pdf | 2020-12-17 |
| 5 | 202047055051-FORM-26 [17-03-2021(online)].pdf | 2021-03-17 |
| 6 | 202047055051-FORM 3 [17-06-2021(online)].pdf | 2021-06-17 |
| 7 | 202047055051.pdf | 2021-10-18 |
| 8 | 202047055051-FORM 3 [16-12-2021(online)].pdf | 2021-12-16 |
| 9 | 202047055051-FORM 18 [12-04-2022(online)].pdf | 2022-04-12 |
| 10 | 202047055051-FER.pdf | 2022-08-17 |
| 11 | 202047055051-FORM 3 [17-10-2022(online)].pdf | 2022-10-17 |
| 12 | 202047055051-Information under section 8(2) [19-10-2022(online)].pdf | 2022-10-19 |
| 13 | 202047055051-Proof of Right [08-02-2023(online)].pdf | 2023-02-08 |
| 14 | 202047055051-PETITION UNDER RULE 137 [17-02-2023(online)].pdf | 2023-02-17 |
| 15 | 202047055051-OTHERS [17-02-2023(online)].pdf | 2023-02-17 |
| 16 | 202047055051-FORM 13 [17-02-2023(online)].pdf | 2023-02-17 |
| 17 | 202047055051-FER_SER_REPLY [17-02-2023(online)].pdf | 2023-02-17 |
| 18 | 202047055051-CLAIMS [17-02-2023(online)].pdf | 2023-02-17 |
| 19 | 202047055051-ABSTRACT [17-02-2023(online)].pdf | 2023-02-17 |
| 1 | SearchHistory(103)E_16-08-2022.pdf |