FORM 2
THE PATENT ACT 1970
& T
he Patents Rules, 2003
COMPLETE SPECIFICATION
(See section 10 and rule 13)
1. TITLE OF THE INVENTION:
"System for Enabling/ Disabling Digital Instantaneous Override Protection and
Method Therfor"
2. APPLICANT:
(a) NAME: Larsen & Toubro Limited
(b) NATIONALITY: Indian Company registered under the
provisions of the Companies Act-1956.
(c) ADDRESS: LARSEN & TOUBRO LIMITED,
L&T House, Ballard Estate, P. 0. Box: 278, Mumbai 400 001, India
3. PREAMBLE TO THE DESCRIPTION:
COMPLETE
The following specification particularly describes the invention and the manner in which it is to be performed.

System for Enabling/ Disabling Digital Instantaneous Override Protection and
Method Therfor
Field of the invention
The present invention relates to circuit breakers, and more particularly, enabling/ disabling digital instantaneous override protection in circuit breakers.
Background of the invention
Instantaneous override protection is used to avoid switch weld in case of arcing. In some applications, there is inherent high current/inrush current which lead to trip during instantaneous override protection. To avoid such unwanted tripping, there is need to disable the instantaneous override protection. An approach used currently to disable the instantaneous override protection is through the two state switches. But these switches are bulky and take space in the front slot of the circuit breaker.
EP1230741 patent discloses a data communication interface for transferring at least one data bit to a host processor. The interface includes a one-wire data line, and a slave processor connected to the data line and including a pull-down circuit for varying voltage on the data line. The slave processor is passive and incapable of sampling data from the data line. The slave processor is programmed to vary voltage on the data line when the data line is energined, to signal of at least one data bit. Specifically, the EP patent EP1230741 claims the data communication over single wire through passive device. However, the EP1230741 patent use a pin (High or low) for data representation.
Accordingly, there exists a need to provide a system and method enabling/ disabling digital instantaneous override protection which overcomes drawbacks of the prior art.

Objects of the invention
An object of the present invention is use only one GPIO pin to enable/disable instantaneous override protection.
Another object of the present invention is to state of the port pin to toggle the setting of the instantaneous override protection.
Summary of the invention
Accordingly, in one aspect, the present invention provides a system for enabling/disabling digital instantaneous override protection. The system includes a test kit for providing Vcc, ground reset and an input pin. wherein the test kit makes the input pin low. The system further includes a microcontroller connected to the test kit. The microcontroller sense the input pin made low by the text kit, wherein the input pin is made low for specified amount of time to toggle the state of instantaneous override.
In another aspect, the present invention provides method for enabling/disabling digital instantaneous override protection, the method includes reading and checking state of instantaneous override from non volatile memory (NVM). The state of instantaneous override decides whether number of samples to be considered before issuing a trip are to be increased or not. The number of samples that are to be checked are increased, if the state of instantaneous override is 'DISABLE'. Further, the number of samples are set to default value if the state of instantaneous override is 'ENABLE'. The condition of instantaneous override is checked with the number of samples to be considered and a trip command is issued if the fault condition is detected.
Brief description of the drawings

Figure 1 shows a block diagram of a system for enabling/ disabling digital instantaneous override protection, in accordance with the present invention.
Figure 2 shows a flowchart for test kit connection for instantaneous override protection; and
Figure 3 shows a flowchart of a method for instantaneous override protection, in accordance with the present invention.
Detailed description of the invention
The foregoing objects of the present invention are accomplished and the problems and shortcomings associated with the prior art, techniques and approaches are overcome by the present invention as described below in the preferred embodiments.
Referring now to figure 1, there is shown a block diagram for a system (100) for enabling/disabling digital instantaneous override protection, in one aspect of the present invention. The system (100) includes a test kit (10) and a microcontroller (20).
The test kit (10) provides Vcc (IC power supply pin), ground reset and an input pin to the microcontroller (10). The test kit is connected to a board of the circuit breaker panel. The input pin is made low for specified amount of time to toggle the state of instantaneous override. When the input pin is made LOW, the microcontroller (20) detects the condition. After the condition is detected, microcontroller (20) checks whether the input is low for specified amount of time and then takes necessary action. Specifically, the microcontroller detects this input pin low and monitors the input pin for some time to ensure that the input pin low. The monitoring for some time is done to avoid any glitch being detected as low on input.
The state of instantaneous override defines the number of samples to be taken before considering instantaneous override fault. In an embodiment, the state of instantaneous is written in non volatile memory. After the toggling, the state of instantaneous override

is completed, and the test kit (10) is disconnected. When power is up, the microcontroller checks the state of instantaneous override. After reading from non volatile memory the state of instantaneous override, the number of samples to be considered is decided.
Referring to figure 2, there is shown a flowchart for a method (200) of connecting the test kit (10) to the microcontroller (20) for enabling/disabling digital instantaneous override protection, in another aspect of the present invention. The method (200) is described in conjunction with system (100). The method (200) includes checking whether the input pin at the microcontroller (20) is pulled low by the test kit (10) for desired amount of time. If the input is not made low for the given amount of time, then a LED starts blinking normally, interrupts are enabled and program exits the loop.
The interrupts are disabled if the input pin at microcontroller (20) is pulled low by the test kit (10) for desired amount of time. At the same time, the LED is made ON to show that instantaneous state is being changed, and the state of instantaneous override is toggled. The instantaneous override state is then stored in a non volatile memory (NVM). The stored data in the NVM is then verified.
If the data is written properly in the NVM, the LED starts blinking normally, the interrupts are enabled and the program exits loop. However, if data is not properly written to the NVM, the LED is made OFF.
Referring now to figure 3, there is shown a flowchart for method (300) for enabling/disabling digital instantaneous override protection, in accordance with yet another aspect of the present invention. The method (300) is described in conjunction with the method (200) and the system (100). The method includes reading state of instantaneous override from non volatile memory (NVM). The state of instantaneous override decides whether number of samples to be considered before issuing a trip are to be increased or not. The state of instantaneous override is checked then. If the state of instantaneous override is 'DISABLE', then the number of samples are increased that are to be checked. However, if the state of instantaneous override is 'ENABLE', the

number of samples are set to default value. The condition of instantaneous override is then checked with the number of samples to be considered. A trip command is issued if the fault condition is detected.
Advantages of the invention
1. The system (100) uses only 1 I/O line for communication between the microcontroller and the test kit.
2. The system (100) enables digital instantaneous override disabling.
3. The system (100) provides a test kit with passive components
The foregoing descriptions of specific embodiments of the present invention have been presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the present invention to the precise forms disclosed, and obviously many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the present invention and its practical application, to thereby enable others skilled in the art to best utilize the present invention and various embodiments with various modifications as are suited to the particular use contemplated. It is understood that various omission and substitutions of equivalents are contemplated as circumstance may suggest or render expedient, but such are intended to cover the application or implementation without departing from the spirit or scope of the present invention.

We claim
1. A system for enabling/disabling digital instantaneous override protection, the system comprising:
a test kit for providing Vcc, ground reset and an input pin, wherein the test kit makes the input pin low; and
a microcontroller connected to the test kit, the microcontroller sensing the input pin made low by the text kit, wherein the input pin is made low for specified amount of time to toggle the state of instantaneous override.
2. The system as claimed in claim 3, wherein the state of instantaneous is written in non volatile memory.
3. The system as claimed in claim 3, the state of instantaneous override defines the number of samples to be taken before considering instantaneous override
fault.
4. A method of connecting a test kit to a microcontroller for
enabling/disabling digital instantaneous override protection, the method comprising:
checking whether an input pin at microcontroller is pulled low by the test kit for desired amount of time, wherein if the input is not made low for the given amount of time then a LED starts blinking normally, interrupts are enabled and program exits the loop;
disabling the interrupts if the input pin at microcontroller is pulled low by the test kit for desired amount of time;
making the LED ON to show that instantaneous state is being changed;
toggling the state of instantaneous override;
storing the instantaneous override state in a non volatile memory (NVM);
verifying the stored data, wherein if the data is written properly in the NVM, the LED starts blinking normally, the interrupts are enabled and the program exits loop;
making the LED OFF if data is not properly written to NVM.

5. A method for enabling/disabling digital instantaneous override protection, the method comprising:
reading state of instantaneous override from non volatile memory (NVM), wherein the state of instantaneous override decides whether number of samples to be considered before issuing a trip are to be increased or not;
checking the state of instantaneous override;
increasing the number of samples that are to be checked, if the state of instantaneous override is 'DISABLE';
setting the number of samples to default value if the state of instantaneous override is 'ENABLE';
checking the condition of instantaneous override with the number of samples to be considered; and
issuing a trip command if the fault condition is detected.