DESC:TECHNICAL FIELD
[0001] The present disclosure relates to the field of rectifier and control systems. More particularly, the present disclosure relates to a system for reducing total harmonic distortion and active power factor correction in a six-switch boost type rectifier.

BACKGROUND
[0002] Background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
[0003] An ideal power supply is required by electrical power systems, which is characterized by perfect sinusoidal waveforms of input voltage and current. The presence of harmonics causes many harmful effects on the power supply and power system components. THD is one of the important power quality parameters describes how much of the distortion of a voltage or current is due to harmonics in the signal. THD is an important aspect in audio, communications, and power systems and should typically be as low as possible. Lower THD in power systems means higher power factor, lower peak currents and lower harmonic currents and higher efficiency. Low THD is such an important feature in power systems that international standards such as IEC 61000-3-2 set limits on the harmonic currents of various classes of power equipment.
Power Factor = = Displacement factor × Distortion Factor
THD = = ×100%

[0004] Power system harmonics are introduced into the system in the form of currents whose frequencies are the integral multiples of the fundamental power system frequency. Harmonic currents are produced by non-linear loads connected to electric power systems such as static power converters, arc discharge devices, saturated magnetic devices. AC-DC power converters are one of the largest source of harmonics generators used in most of the appliances. The harmonic currents interact with the supply system impedance causing distortions in supply output voltage and current, which affect all other loads connected to the system and the power supply itself.
[0005] The power factor correction has become very important in AC-DC converters to reduce power pollution. The international standards such as IEC 61000-3-2 set limits on the harmonic currents of various classes of power equipment. In high power AC-DC converter power factor become very important because with power, harmonic component power also will increase. Since 3 phase AC-DC converters are meant for high power applications power factor correction become must in 3 phase AC-DC converters.
[0006] Passive and active methods are available for power factor correction. Passive power factor correction methods are bulky in nature and not possible to get low values of THD. Active power factor correction methods are shaping the input current by switching MOSFET or IGBTs at high frequency. Different topologies are available for active power factor correction.
[0007] The prior art document “The Essence of Three-Phase PFC Rectifier Systems - Part I(Johann W. Kolar, Fellow, IEEE, and Thomas Friedli, Member, IEEE), The Essence of Three-Phase PFC Rectifier Systems—Part II(Thomas Friedli, Member, IEEE, Michael Hartmann, Member, IEEE, and Johann W. Kolar, Fellow, IEEE)” discusses the active six-switch boost-type PFC rectifier, the VIENNA Rectifier (VR), the active six-switch buck-type PFC rectifier, and the SWISS Rectifier and provided comparative analysis of these rectifiers, it also mentioned concepts of third order harmonic component injection into control system for cancelling third order harmonic component and discussed control loop in general. But not specified any method to implement control method for achieving low THD value.
[0008] Comparative Analysis of Space Vector Pulse-Width Modulation and Third Harmonic Injected Modulation on Industrial Drives (C.O. Omeje*; D.B. Nnadi; and C.I. Odeh) paper presents the detailed MATLAB analysis of the comparative advantage of space vector pulse width modulation (SVPWM) over the existing third order harmonic injected pulse width modulation and concluded a carrier-based modulation injected with a third harmonic produces the same result with space vector pulse-width modulation at the same modulation index. But paper not provided details about how to implement.
[0009] The United States Patent Document Number US20030128563A1discuss the new control method for Vienna rectifier. The proposed control method can reduce the input ripple current without increasing the switching frequency. The control method used two triangle waveforms namely trg1 and trg2 for fixed frequency modulation and both are 180° phase shifted with respect to each other. During positive half cycle of input trg1 is used for modulation and during negative half cycle of input trg2 is used for modulation. Switching from trg1 to trg2 is done with the help of analog circuit. The control method fully implemented in analog. The invention is rectifying both inputs and current references before giving to current loop compensator. Rectification of current references will introduce harmonics into system, it is difficult to get Low THD value and control system designed fully in analog it doesn’t provide mechanism for introducing harmonics into control loop for achieving low THD value and the invention doesn’t talk about possible achievable value of THD.
[0010] Therefore, there is a need in the art for a system for reducing harmonic distortion and power factor correction in three phase rectifiers, which has simplified design, maintains the balanced input current and regulated output voltage and capable of meeting THD (Total Harmonic Distortion) value less than 3%.

OBJECTS OF THE PRESENT DISCLOSURE
[0011] Some of the objects of the present disclosure, which at least one embodiment herein satisfies are as listed herein below.
[0012] It is an object of the present disclosure to reduce total harmonic distortion in a six-switch boost type rectifier.
[0013] It is an object of the present disclosure to improve power factor of electric power being supplied to the six-switch boost type rectifier.
[0014] It is an object of the present disclosure to provide a simple and efficient system and control method to reduce total harmonic distortion and active power factor correction in the six-switch boost type rectifier.

SUMMARY
[0015] The present disclosure relates to the field of rectifier and control systems. More particularly, the present disclosure relates to a system and control method for reducing total harmonic distortion and active power factor correction in a six-switch boost type rectifier.
[0016] An aspect of the present disclosure pertains to a system for reducing total harmonic distortion in a six switch boost type rectifier, the system comprising: an output voltage control (OVC) unit operatively coupled to the rectifier, and which may be configured to sense one or more parameters associated with the rectifier, and may correspondingly generate: a set of unity current reference signals, which may be phase and frequency synchronized with input phase voltage being supplied to the OVC unit; and a set of sine modulated current reference signals, based on the set of unity current reference signals and current reference generated from voltage loop compensator; a PWM controller operatively coupled to the sine PWM converter and the OVC unit, the PWM controller may be configured to generate the set of sine modulated current reference signals, and correspondingly generate and transmit a sine modulated PWM current references to current control unit; and a current control unit operatively coupled to the rectifier and the OVC unit, wherein the current control unit may be configured to: receive the set of current reference signals from the sine PWM converter and currents parameters associated with the rectifier from current amplifier, and correspondingly generate a first set of signals; generate a set of common mode output signals based on the first set of signals; add the set of common mode output signals with the first set of signals to remove harmonic components, and correspondingly generate a set of space vector modulated signals; and wherein the current control unit may be configured to generate and transmit a set of modulated signals to each of the six switches of the rectifier by shifting the set of space vector modulated signals to mid-point of triangle and compared with a fixed frequency triangle waveform of predefined frequency.
[0017] In an aspect. the OVC unit may comprise a Delfino floating point controller configured with sensors, and which may be configured to: sense the one or more parameters associated with the rectifier, and generate the set of current reference signals for the current control unit, wherein the set of current reference signals are phase and frequency synchronized with input phase voltage being supplied to the rectifier.
[0018] In an aspect. the one or more parameters associated with the rectifier may comprise current, voltage, phase, frequency, and power, at any or a combination of input side, switches, and output side of the rectifier.
[0019] In an aspect. the OVC unit may comprise a power limiter to limit the electric power allowed through the rectifier to a predefined power level, and wherein the OVC unit may comprise a current limiter to limit the current allowed through the rectifier to a predefined current level.
[0020] In an aspect. the OVC unit may comprise a digital PWM circuit configured to generate the set of sine modulated current reference signals, based on the set of unity current reference signals and the current reference from the voltage loop compensator, and wherein an analog sine PWM converter converts the set of sine modulated current reference signals into analog signals.
[0021] In an aspect. the current control unit may comprise a compensator circuit to receive the set of current reference signals from the sine PWM convertor, and currents parameters associated with the rectifier from the current amplifier, and correspondingly generate the first set of signals, and wherein the current control unit may comprise a common mode component generation circuit operatively coupled to the compensator unit, and which may be configured to generate the set of common mode output signals based on the first set of signals.
[0022] In an aspect. the current control unit may comprise an adder circuit operatively coupled to the common mode component generation unit, and configured to add the set of common mode output signals with the first set of signals to remove harmonic components, and correspondingly generate the set of space vector modulated signals.
[0023] In an aspect. the current control unit may comprise a level shifter circuit operatively coupled to the adder unit, and configured to shift the set of space vector modulated signals to mid-point of triangle and compared with the fixed frequency triangle waveform of predefined frequency, and correspondingly generate the set of modulated signals for each of the six switches of the rectifier.
[0024] In an aspect. the current control unit may transmit the set of modulated signals to each of the six switches using a set of buffers and isolators.
[0025] In an aspect. the system may comprise a set of inductors configured with input phases of the rectifier, and configured to reduce ripple from input current, and facilitate boost action of the rectifier.

BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
[0027] The diagrams are for illustration only, which thus is not a limitation of the present disclosure, and wherein:
[0028] FIG. 1 illustrates a schematic diagram of a six-switch boost type rectifier, in accordance with an embodiment of the present invention.
[0029] FIG. 2 illustrates a schematic diagram of an embodiment of the six-switch boost type rectifier with six-pack MOSFET module, in accordance with an embodiment of the present invention
[0030] FIG. 3 illustrates an exemplary block diagram of the proposed system to reduce harmonic distortion in the six-switch boost type rectifier, in accordance with an embodiment of the present invention.
[0031] FIG. 4 illustrates an exemplary block diagram of the digital voltage control loop of the proposed system, in accordance with an embodiment of the present invention.
[0032] FIG. 5 illustrates an exemplary block diagram of the current control loop of the proposed system with common mode component generation circuit, in accordance with an embodiment of the present invention.
[0033] FIG. 6 illustrates results of generation of common mode component by the current loop compensator output of the proposed system.
[0034] FIG. 7 illustrates results of generation of space vector modulation with injection of common mode component by the proposed system.
[0035] FIG. 8 illustrates test results of THD measurement of R,Y,B phases and phasor representation of phase currents with respect to phase voltages at 10.7kw input power and with electromagnetic interference (EMI) filter.
[0036] FIG. 9 illustrates test result of power factor measurement at 10.7kw input power and with EMI filter.
[0037] FIG. 10 illustrates test results of input current at 10.7kw input power and with EMI filter.

DETAILED DESCRIPTION
[0038] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure as defined by the appended claims.
[0039] Various terms as used herein are shown below. To the extent a term used in a claim is not defined below, it should be given the broadest definition persons in the pertinent art have given that term as reflected in printed publications and issued patents at the time of filing.
[0040] In some embodiments, the numerical parameters set forth in the written description and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by a particular embodiment. In some embodiments, the numerical parameters should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of some embodiments of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as practicable. The numerical values presented in some embodiments of the invention may contain certain errors necessarily resulting from the standard deviation found in their respective testing measurements.
[0041] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0042] The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[0043] Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all groups used in the appended claims.
[0044] The present disclosure relates to the field of rectifier and control systems. More particularly, the present disclosure relates to a system for reducing total harmonic distortion and active power factor correction in a six-switch boost type rectifier.
[0045] According to an aspect, the present disclosure elaborates upon a system for reducing total harmonic distortion in a six switch boost type rectifier, the system including: an output voltage control (OVC) unit operatively coupled to the rectifier, and which can be configured to sense one or more parameters associated with the rectifier, and can correspondingly generate: a set of current reference signals, which can be phase and frequency synchronized with input phase voltage being supplied to the current control unit; and a set of sine modulated current reference signals, based on the set of unity current reference signals and a current reference from voltage loop compensator; a PWM controller operatively coupled to the sine PWM converter and the OVC unit, the PWM controller can be configured to generate the set of sine modulated current reference signals, , and correspondingly generate and transmit a sine modulated PWM current references to current control unit; and a current control unit operatively coupled to the rectifier and the OVC unit, wherein the current control unit can be configured to: receive the set of current reference signals from sine PWM converter, and currents parameters associated with the rectifier from current amplifier, and correspondingly generate a first set of signals; generate a set of common mode output signals based on the first set of signals; add the set of common mode output signals with the first set of signals to remove harmonic components, and correspondingly generate a set of space vector modulated signals; and wherein the current control unit can be configured to generate and transmit a set of modulated signals to each of the six switches of the rectifier by shifting the set of space vector modulated signals to mid-point of triangle and compared with a fixed frequency triangle waveform of predefined frequency.
[0046] In an embodiment. the OVC unit can include a Delfino floating point controller configured with sensors, and which can be configured to: sense the one or more parameters associated with the rectifier, and generate the set of current reference signals for the current control unit, wherein the set of current reference signals can be phase and frequency synchronized with input phase voltage being supplied to the rectifier.
[0047] In an embodiment. the one or more parameters associated with the rectifier can include current, voltage, phase, frequency, and power, at any or a combination of input side, switches, and output side of the rectifier.
[0048] In an embodiment. the OVC unit can include a power limiter to limit the electric power allowed through the rectifier to a predefined power level, and wherein the OVC unit can include a current limiter to limit the current allowed through the rectifier to a predefined current level.
[0049] In an embodiment. the OVC unit can include a digital PWM circuit configured to generate the set of sine modulated current reference signals, based on the set of unity current reference signals and the current reference from the voltage loop compensator, and wherein an analog sine PWM converter to convert the set of sine modulated current reference signals into analog signals.
[0050] In an embodiment. the current control unit can include a compensator circuit to receive the set of current reference signals from sine PWM convertor, and currents parameters associated with the rectifier from the current amplifier, and correspondingly generate the first set of signals, and wherein the current control unit can include a common mode component generation circuit operatively coupled to the compensator unit, and which can be configured to generate the set of common mode output signals based on the first set of signals.
[0051] In an embodiment. the current control unit can include an adder circuit operatively coupled to the common mode component generation unit, and configured to add the set of common mode output signals with the first set of signals to remove harmonic components, and correspondingly generate the set of space vector modulated signals.
[0052] In an embodiment. the current control unit can include a level shifter circuit operatively coupled to the adder unit, and configured to shift the set of space vector modulated signals to mid-point of triangle and compared with the fixed frequency triangle waveform of predefined frequency, and correspondingly generate the set of modulated signals for each of the six switches of the rectifier.
[0053] In an embodiment. the current control unit can transmit the set of modulated signals to each of the six switches using a set of buffers and isolators.
[0054] In an embodiment. the system can include a set of inductors configured with input phases of the rectifier, and configured to reduce ripple from input current, and facilitate boost action of the rectifier.
[0055] In an embodiment, the implementation of the voltage control loop with power and current limiting feature in digital make the system ruggedized against various faults and the implementation of the current loop compensator in analog without disturbing sensed input currents of rectifier can help in achieving low THD value.
[0056] In an embodiment, the system can be applied to single phase active power factor correction, and wherein voltage loop can be implemented in digital and generate single current reference which is phase and frequency synchronized with the input voltage and current control loop can be implemented in analog which can help in achieving low THD value.
[0057] In an embodiment, the system can be implemented in other 3phase rectifier topologies to achieve low THD values
[0058] FIG. 1 illustrates a schematic diagram of a six-switch boost type rectifier, in accordance with an embodiment of the present invention.
[0059] FIG. 2 illustrates a schematic diagram of an embodiment of the six-switch boost type rectifier with six-pack MOSFET module, in accordance with an embodiment of the present invention.
[0060] As illustrated in FIGs. 1 and 2, in an embodiment, the six-switch boost type rectifier is disclosed. The six switches can be replaced with MOSFET or IGBTs the basic operating principle is same. In an implementation, when the switches S11, S12 are switched complementary to each other. Similarly, other switches S21, S22 and S31 and S32 are complementary to each other. During start up condition body diode of the MOFET will conduct and the rectifier will act like normal three phase rectifier. Controller sense the output voltage of rectifier, after reaching required voltage level controller will start power factor correction.
Table 1 Switch modes for the six-switch boost type rectifier
S.NO S11 S21 S31
1 0 0 0
2 0 0 1
3 0 1 0
4 0 1 1
5 1 0 0
6 1 0 1
7 1 1 0
8 1 1 1

[0061] A total 8 switch modes are possible for six-switch boost type rectifier, but only six modes can be used in synchronizing an output voltage and are called active stages. The two states 1 and 8 are do not results in an output dc voltage so these two states are called null states
When S11 is activated, the node voltage “u” is clamped to P and,
Vdc = E1+E2

When S12 is activated the node voltage “u” is clamped to N and,

If the converter output is considered as constant, the rectifier can be voltage source connected to the input voltages through the inductors. The following relations can be written from the switching actions
S11+ S12 =1 (1)
S21 + S22 =1 (2)
S31 + S32 =1 (3)
VRn = (4)
VYn = (5)
VBn = (6)
The above equations can be re-written as
VRn = (7)
VYn = (8)
VBn = (9)
Where Vun, Vvn, Vwn are the respective node voltages of each phase with respect to neutral.
[0062] From equations (7) ~ (9) it is clear that is possible to control the input current by taking control action on the rectifier input node voltage. From the fundamental theory of KVL (Kirchhoff’s Voltage Low) for the input current to be sinusoidal, the input node voltages must be sinusoidal as well. Using the concept of sine modulated PWM, node voltages can be switched to generate sinusoidal input currents.
[0063] In an embodiment. the system can include a set of inductors 201 configured with input phases of the rectifier 202, and configured to reduce ripple from input current, and facilitate boost action of the rectifier.
[0064] FIG. 3 illustrates an exemplary block diagram of the proposed system to reduce harmonic distortion in the six-switch boost type rectifier, in accordance with an embodiment of the present invention.
[0065] As illustrated in FIG. 3, the proposed system can include a set of current sensors 308 operatively coupled to each phase (a, b, c) of the input power supply line of the rectifier 302. The current sensors 308 can be configured to sense the input current of the rectifier 302. The system can include a current amplifier 304 operatively coupled to the current sensor 308, which can amplify the sensed input currents.
[0066] In an embodiment, the system can include an analog circuit 305 (also referred to as line sync pulse, and voltage sensor circuit 305, herein). The analog circuit 305 can be configured to sense voltage associated with each line of the input power supply lines. The analog circuit can generate two synchronized pulses VRYSYC and VYBSYC, which are frequency and phase synchronized with the input lines. These sync pulses can be given to a controller 306 for synchronizing digital phase locked loop (PLL) with input frequency and phase. The analog circuit 305 can include a set of voltage sensors to sense and transmit the sensed line voltages, to the controller 306 for measurement and protection.
[0067] In an embodiment, the controller 306 can be a 32-bit Delfino floating point controller used for sensing and monitoring of various parameters associated with the rectifier 302. The output voltage loop compensator can be implemented digitally in the controller 306. The compensator can be designed in such a way that it can limit the power and current drawn from the rectifier. This feature can make the rectifier more ruggedized against various failures in the rectifier.
[0068] In an embodiment, the controller 306 (also referred to as Delfino controller, herein) can be configured to generate a set of unity current reference signals, which are phase and frequency synchronized with input phase voltage being supplied to the rectifier; and further generate a set of sine modulated current reference signals, based on the set of unity current reference signals and a current reference from the voltage loop compensator.
[0069] In an embodiment, the system can include a sine wave PWM convertor 307 configured between the controller and the rectifier, to receive the set of sine modulated current reference signals, and correspondingly generate and transmit a sine wave electrical power to the rectifier 302.
[0070] In an implementation, the proposed system and method can be implemented digitally in the voltage loop compensator, and current loop compensator is implemented in analog, and space vector modulation implemented analog.
[0071] In an embodiment. the system can include a set of inductors 301 configured with input phases of the rectifier 302, and configured to reduce ripple from input current, and facilitate boost action of the rectifier 302.
[0072] As shown in FIGs. 2 and 3, output bulk capacitors and bleeder resistors (collectively designated as 303, herein) can be configured on output side of the rectifier 302, where E1 and E2 are the output voltages upper and lower half of the rectifier output.
[0073] FIG. 4 illustrates an exemplary block diagram of the digital voltage control loop of the proposed system, in accordance with an embodiment of the present invention.
[0074] As illustrated in FIG. 4, the digital control loop (also referred to as output voltage control (OVC) unit, herein) can include a digital circuit 401 to add the sensed output voltages E1 and E2 from Vref (Voltage reference signal) and send to a PI digital output voltage compensator. Assigning power to digital compensator output Imax can be obtained according to equation (12)
(10)
(11)
If (12)
[0075] In an embodiment, the OVC unit can include a power limiter 402 to limit the electric power allowed through the rectifier to a predefined power level, where K1 decides the maximum power allowed through the rectifier. The OVC unit can further include a current limiter 402 to limit the current allowed through the rectifier to a predefined current level, where K2 decides the maximum current allowed through the rectifier.
[0076] In an embodiment, the controller can generate a set of unity current reference signals , , , which are phase and frequency synchronized with input phase voltage being supplied to the rectifier. The unity current references , , can be multiplied with Imax current given to a PWM controller 407 (also referred to as Digital PWM block 407, herein), to generate sine modulated current references. The sine modulated current references can be given to the sine PWM convertor 307, which can convert the sine modulated PWM to sine wave.
[0077] In another embodiment, the sine PWM convertor 307 and the Digital PWM block 407 together can be replaced with a DAC (Digital to Analog Converter) which can generate both positive and negative half cycles.
[0078] FIG. 5 illustrates an exemplary block diagram of the current control loop of the proposed system with common mode component generation circuit, in accordance with an embodiment of the present invention.
[0079] As illustrated in FIG. 5, in an embodiment, the current control unit can receive the set of current reference signals, as well as the currents parameters associated with the rectifier, from the OVC unit, and correspondingly generate a first set of signals. The current control unit can further generate a set of common mode output signals based on the first set of signals; add the set of common mode output signals with the first set of signals to remove harmonic components, and correspondingly generate a set of space vector modulated signals; The current control unit can be configured to generate and transmit a set of modulated signals to each of the six switches of the rectifier by shifting the set of space vector modulated signals to mid-point triangle and compared with a fixed frequency triangle waveform of predefined frequency.
[0080] In an embodiment. the current control unit can include a compensator circuit 502 to receive the set of current reference signals from sine PWM convertor, and current parameters associated with the rectifier from current amplifier, and correspondingly generate the first set of signals. The current control unit can further include a common mode component generation circuit 501 operatively coupled to the compensator unit 502, and which can be configured to generate the set of common mode output signals based on the first set of signals.
[0081] In an exemplary embodiment, the compensator circuit can include a set of compensators realized using Operation Amplifiers (OpAmp). Each of the OpAmp can individually receive the set of current reference signals (IRREF, IYREF, IBREF), from 307, and current parameters (IR, IY, IB) associated with the rectifier, from current amplifiers 304, and correspondingly generate and transmit the first set of signals to the common mode component generation circuit 501.
[0082] In an exemplary embodiment, the common mode component generation circuit 501 can be realized using a set of Diodes D1 to D6, set of resistors R1 and R2, and an OpAmp.
[0083] In an exemplary implementation, the simulation results of generation of common mode component by the current loop compensator output of the proposed system is shown in FIG. 6.
[0084] In an embodiment. the current control unit can include an adder circuit 503 operatively coupled to the common mode component generation unit 501, and configured to add the set of common mode output signals with the first set of signals to remove harmonic components, and correspondingly generate the set of space vector modulated signals.
[0085] In an embodiment. the current control unit can include a level shifter circuit 504 operatively coupled to the adder unit 503, and configured to shift the set of space vector modulated signals by mid-point of triangle and compared with the fixed frequency triangle waveform of predefined frequency, and correspondingly generate the set of modulated signals for each of the six switches of the rectifier.
[0086] In an exemplary implementation, the simulation results of generation of space vector modulation with injection of common mode component by the proposed system is shown in FIG. 7.
[0087] The implementation of space vector modulation adding common mode component, can facilitate cancellation of harmonic components and to achieve low THD value and also helps in regulating at lower output voltage.
[0088] In an exemplary embodiment, the level shifter circuit 504 can shift the modulated waveform symmetric about midpoint of triangle, output of level shifter compared with fixed frequency 30kHz triangle waveform to generate modulated signals, given to buffers and through isolators given to each MOSFET gate.
[0089] In an embodiment. the current control unit can transmit the set of modulated signals to each of the six switches using a set of buffers and isolators (collectively designated as 505, herein).
[0090] Further, the generation of synchronizing pulse sensing line voltages instead of phase voltage, as well as shifting current references by 30º inside the controller make the control system compatible to work with both star and delta types of input.
[0091] The implementation of voltage loop compensator in digital gives full control of the rectifier, and implementing current loop in analog can help in achieving low THD value, overall the system makes the rectifier more ruggedized system.
[0092] In an embodiment, the generation of synchronized sine modulated current references and converting it to sine current reference signals with both positive and negative half cycle and giving to compensator without rectifying helps in achieving low THD value
[0093] As shown in FIG. 8, the test results of THD measurement of R,Y,B phases and phasor representation of phase currents with respect to phase voltages at 10.7kw input power and with electromagnetic interference (EMI) filter, by using the proposed system are shown.
[0094] As shown in FIG. 9, the test result of power factor measurement at 10.7kw input power and with EMI filter, by using the proposed system is shown.
[0095] As shown in FIG. 10, the test results of input current at 10.7kw input power and with EMI filter, using the proposed system is shown.
[0096] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention can be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.

ADVANTAGS OF THE INVENTION
[0097] The proposed invention reduces total harmonic distortion in a six-switch boost type rectifier.
[0098] The proposed invention improves power factor of electric power being supplied to the six-switch boost type rectifier.
[0099] The proposed invention provides a simple and efficient system to reduce total harmonic distortion and active power factor correction in the six-switch boost type rectifier.
[00100] The proposed invention limits inrush current in the six-switch boost type rectifier.
,CLAIMS:1. A system for reducing total harmonic distortion in a six-switch boost type rectifier, the system comprising:
an output voltage control (OVC) unit operatively coupled to the rectifier, and configured to sense one or more parameters associated with the rectifier, and correspondingly generate:
a set of current reference signals, which are phase and frequency synchronized with input phase voltage being supplied to the rectifier; and
a set of sine modulated current reference signals, based on the set of unity current reference signals and a current reference from a voltage loop compensator;
a PWM controller operatively coupled to a sine PWM convertor and the OVC unit, the PWM controller configured to transmit the set of sine modulated current reference signals, and correspondingly generate sine modulated PWM current references; and
a current control unit operatively coupled to the rectifier and the OVC unit, wherein the current control unit is configured to:
receive the set of current reference signals from the sine PWM convertor, and currents parameters associated with the rectifier from a current amplifier, and correspondingly generate a first set of signals;
generate a set of common mode output signals based on the first set of signals;
add the set of common mode output signals with the first set of signals to remove harmonic components, and correspondingly generate a set of space vector modulated signals; and
wherein the current control unit is configured to generate and transmit a set of modulated signals to each of the six switches of the rectifier by shifting the set of space vector modulated signals to mid-point of triangle and compared with a fixed frequency triangle waveform of predefined frequency.
2. The system as claimed in claim 1, wherein the OVC unit comprises a Delfino floating point controller configured with sensors, and which are configured to:
sense the one or more parameters associated with the rectifier, and
generate the set of unity current reference signals for the current control unit, wherein the set of unity current reference signals are phase and frequency synchronized with input phase voltage being supplied to the rectifier.
3. The system as claimed in claim 1, wherein the one or more parameters associated with the rectifier comprises current, voltage, phase, frequency, and power, at any or a combination of input side, switches, and output side of the rectifier.
4. The system as claimed in claim 1, wherein the OVC unit comprises:
a power limiter to limit the electric power allowed through the rectifier to a predefined power level, wherein the OVC unit comprises a current limiter to limit the current allowed through the rectifier to a predefined current level; and
a digital PWM circuit configured to generate the set of sine modulated current reference signals, based on the set of unity current reference signals and the current reference from the voltage loop compensator, and wherein the OVC comprises an analog sine PWM converter to convert the set of sine modulated current reference signals into analog signals
5. The system as claimed in claim 1, wherein the current control unit comprises a compensator circuit to receive the set of current reference signals from the sine PWM convertor, and currents parameters associated with the rectifier from the current amplifiers, and correspondingly generate the first set of signals, and wherein the current control unit comprises a common mode component generation circuit operatively coupled to the compensator unit, and configured to generate the set of common mode output signals based on the first set of signals.
6. The system as claimed in claim 1, wherein the current control unit comprises an adder circuit operatively coupled to the common mode component generation unit, and configured to add the set of common mode output signals with the first set of signals to remove harmonic components, and correspondingly generate the set of space vector modulated signals.
7. The system as claimed in claim 1, wherein the current control unit comprises a level shifter circuit operatively coupled to the adder unit, and configured to shift the set of space vector modulated signals to mid-point of tringle and compared with the fixed frequency triangle waveform of predefined frequency, and correspondingly generate the set of modulated signals for each of the six switches of the rectifier.
8. The system as claimed in claim1, wherein implementing voltage control loop with power and current limiting feature in digital make the system ruggedized against various faults and implementing current loop compensator in analog without disturbing sensed input currents of rectifier helps in achieving low THD value.
9. The system as claimed in claim1, wherein the system is configured to be applied to single phase active power factor correction, and wherein voltage loop is implemented in digital and generate single current reference which is phase and frequency synchronized with the input voltage and current control loop can be implemented in analog which helps in achieving low THD value.
10. The system as claimed in calim1, wherein the system is configured to be implemented in other 3phase rectifier topologies to achieve low THD values.