Claims:1. A system for measuring frequency of signals using delay lines of an instantaneous frequency measurement (IFM) receiver, the system comprising: a plurality of dual channel analog to digital convertors (ADCs) adapted to be operatively coupled to a plurality of delay lines of the IFM receiver, wherein the dual channel ADCs are configured to: receive continuous signals from the plurality of delay lines of the IFM receiver; and generate digital signals in response to the received continuous signals; a Field Programmable Gate Array (FPGA) operatively coupled to the plurality of dual channel ADC, and configured to: receive the digitized signals from the plurality of dual channel ADC; and extract a first set of data packets from the digitized signals, wherein the extracted first set of data packets corresponds to instantaneous phase of each of the plurality of delay lines; wherein the extracted first set of data packets are sequentially passed through a plurality of digital resolvers to generate a final resolved phase of each of the plurality of delay lines; and wherein the FPGA is configured to measure a raw frequency data based on the final resolved phase. 2. The system as claimed in claim 1, wherein the FPGA is configured to perform asymmetric mapping on the sequence of data packets to decrypt the instantaneous phase value associated with each of the plurality of delay lines. 3. The system as claimed in claim 1, wherein the FPGA is configured to perform inverse frequency mapping on the measured raw frequency data to compensate effect of non-linearity, and provide precise frequency output. 4. The system as claimed in claim 1, wherein the plurality of delay lines has a delay lines ratio selected from any of an integral or a non-integral value. 5. The system as claimed in claim 1, wherein the hysteresis circuit comprises a comparator provided with a positive feedback to a non-inverting input of the comparator. 6. The system as claimed in claim 1, wherein the continuous signal at the plurality of delay lines comprises a set of In-phase and Quadrature (I and Q) signals, and an Extended Dynamic Range Log Video Amplifier (EDLVA) signal, corresponding to the set of incoming signals received by the IFM receiver. 7. The system as claimed in claim 1, wherein the system comprises a clock generation unit operatively coupled to the plurality of dual channel ADC and the FPGA, and configured to transmit a set of clock pulses having predefined frequencies to each of the plurality of dual channel ADC, and the FPGA, and wherein the set of clock pluses having the predefined frequencies are based on clock inputs required for synchronized operation of each of the plurality of dual channel ADC, and the FPGA. 8. The system as claimed in claim 7, wherein the clock generation unit comprises a clock synthesizer operatively coupled to a clock oscillator, and wherein the clock synthesizer is configured to the dual channel ADCs, and the FPGA. 9. The system as claimed in claim 7, wherein components of the system comprising at least the plurality of dual channel ADCs, the FPGA, the hysteresis circuit, and the clock generation unit, are configured on a Printed Circuit Board. 10. The system as claimed in claim 1, wherein the hysteresis circuit is a programmable binary threshold hysteresis circuit configured with an average amplitude correction feature for detection of various signals in noisy environment. , Description:TECHNICAL FIELD [0001] The present disclosure relates to the field of Instantaneous frequency measurement receiver and systems. More particularly, the present disclosure relates to a system for resolving and measuring frequency of an incoming signal from delay lines of an IFM receiver, which can also work for any non-integer delay line ratios. BACKGROUND [0002] Background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art. [0003] In mission critical airborne systems and other communication sectors, the precise frequency measurement of received signal is very important. Delay line based digital Instantaneous frequency measurement (DIFM) receivers are utilized to get the frequency parameters instantaneously in wide dynamic range with higher sensitivity. DIFM receivers are not frequency dependent, but they are bandwidth dependent. These receivers measure the instantaneous frequency of unknown incoming signals by comparing the phases of an unknown signal with the phase of a time delayed replica of the same signal. This time delayed replica of the incoming signal has been achieved by passing the incoming signal through a physical transmission line of extra known length. This extra length transmission line is called the delay line. This is implemented as shown in FIG.1. The measured frequency output of the DIFM receivers broadly depends on quality of the phase output at the delay lines and the frequency algorithm used to resolve the output at the delay lines. [0004] Various systems and methods are available in the art to measure frequency output of the DIFM receiver. United States Patent Document US4859934 discloses an apparatus for measuring frequency of Microwave signals. The apparatus includes a microwave frequency detection receiver utilizing a pre-scalar comprised of one or a plurality of cascaded analog frequency dividers for down-converting received microwave signals to a predetermined compressed radio frequency bandwidth, connected to a combined frequency discriminator and quantizer processor. The frequency discriminator can be either a single or multiple delay line discriminator or a two-stage feed forward digital instantaneous frequency measurement device. The receiver is characterized by wide radio frequency input bandwidth as well as accurate frequency measurement capability on short single pulse signals. Delay line discriminators can operate with a high data rates and in a dense signal environment with a high probability of accurate signal frequency detection and measurement, and are thus suitable for use in electronics warfare systems. [0005] The above prior art document uses single delay line with frequency discriminator, Complete band of operation is divided into three bands achieving different accuracy. The best achieved accuracy is ± 4 MHz for 1 us pulse width and for narrow pulse i.e. 100 ns, the accuracy reduces drastically to ± 40 MHz [0006] Further, the United States Patent Document US20090237070 method of instantaneously determining or estimating the frequency of an input signal includes mixing a digitally sampled and quantized input signal by a time shifted replica of the input signal, where the time shift equals an integer multiple of a sampling period of the input signal, thereby producing a mixed signal. The mixed signal is filtered with a low-pass filter producing a filtered signal, which is used to obtain an estimate of the frequency of the input signal. The invention extends to an apparatus for implementing the method in accordance with the invention. The invention also extends to a method of determining or estimating the amplitude of an input signal. In this prior art document, a digital delay technique is used, where band of operation is restricted from 50 MHz – 550 MHz with RMS error of 1MHZ. [0007] The United States Patent Document US19904963816 discloses an IFM receiver employs only two delay lines, thereby simplifying the IFM receiver design. The basic principle is to use two delay lines to provide fine frequency resolution, and at the same time cover a wide input bandwidth. The two delay line lengths must be relatively prime. The algorithm for achieving frequency resolution is based on the Chinese remainder theorem. That theorem states that if an unknown number X is divided by ‘a’ with a remainder ‘r1’ and also divided by ‘b’ with a remainder ‘r2’, where ‘a’ and ‘b’ are relatively prime numbers, the number ‘X’ can be determined from a, b, r1 and r2 is X