Abstract: ABSTRACT THREE-LEVEL BOOST CONVERTER WITH ANTI-PID & LEAKAGE-CURRENT SUPPRESSION FILTER FOR HIGH POWER SOLAR PV APPLICATIONS Three-level boost coverter with anti-PID & leakage-current suppression filter is disclosed. The three-level boost converter comprises at least two inductive energy storage elements (L1, L2), at least two switching elements (S1, S2), at least two capacitive energy storage elements (CO1, CO2), at least two diodes (D1, D2) and at least two filter elements (Cf1, Cf2). Parasitic capacitors (CPV1, CPV2) formed between the output terminals and metallic frame of the PV string. The filter elements (Cf1, Cf2) reduce common-mode leakage current by filtering out high frequency voltages.
DESC:
FIELD
The present disclosure generally relates to DC- DC converters. More particularly, the present disclosure relates to a three-level boost converter for large scale utility power plants.
BACKGROUND
The background information herein below relates to the present disclosure but is not necessarily prior art.
Use of solar energy as an alternative source of energy is constantly increasing. Since the solar energy is intermittent in nature, the solar Photovoltaic (PV) system is integrated either with utility grid or energy storage elements such as batteries to store excess solar energy. The most critical piece in a grid connected solar system is the Solar Power conditioning unit (PCU) or a Solar Inverter. Typically, these inverters are classified as central inverter, string inverters, multi-string inverters and micro-inverters. The central inverter is commonly used in high power PV solar system, where several strings constituting of PV modules are connected in parallel, and integrated into utility grid through the inverter. In this case, the central inverter is configured to perform maximum power point tracking for PV modules. The central inverter based system has a limitation of ineffective power extraction due to module mismatch among PV modules, which is unavoidable due to the factors such as partial shading, uneven soiling level and uneven voltage drop in cables. The limitation associated with the use of central inverters is addressed by the multi-string inverter configuration as shown in Figure 1.
The existing central inverter configuration can be upgraded to multi-string inverter configuration by adding DC-DC converters. The DC-DC converter is realized using a two level boost converter. Conventional two level boost converters are employed at 1000 V DC system. However, in current scenario, PV plants have been adopting 1500 V DC system in place of 1000 V DC systems. Accordingly, the boost converters with higher voltage ratings are required.
To upgrade the two level boost converter to 1500 V DC system, the Silicon Carbide (SiC) Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) with a voltage rating of at least 1700 V should be used. However, the SiC MOSFETs with such a high voltage rating are not widely available as those of the lower voltage ratings. Hence, a typical three-level boost converter shown in Figure 2 (a) is, selected to bring down the voltage ratings of MOSFETs S1 and S2 to 900V.
An electric equivalent circuit of existing three-level boost converter with the parasitic capacitance of PV panel is shown in Figure 2(b). In the three-level boost converter shown in Figure 2(b), the negative terminal of PV array (node N1) is not directly connected to the negative terminal of the output (node N). This means that the negative terminals of the PV panels in the PV array (i.e. PV string) are not grounded even if the terminal N is connected to ground as shown in Figure 2(b). This creates the possibility for flow of common-mode leakage current and occurrence of potential induced degradation (PID) of PV modules.
Potential-induced degradation (PID) of PV modules occurs when the output terminals of the PV module experience a negative voltage with respect to the ground. To overcome this limitation, the negative terminal of PV array is typically connected to the ground. This arrangement is made by grounding the negative terminal of dc-link of the inverter, as shown in Fig. 1.
In PV system, there exists a path for the flow of leakage current due to the presence of system parasitic capacitance in the PV panels. The parasitic capacitance is formed between the output terminals and metallic frame of the PV panel, which is connected to earth. The nature of the leakage current is common-mode and it interferes with the operation of Ground Fault Detector & Interrupter (GFDI) of the central inverter shown in Fig. 1. The GFDI is a relay operated switch (contactor/ breaker) that connects the DC-link negative terminal to ground and detects ground faults in the PV field.
To overcome the aforementioned problems and limitations of the existing DC-DC converter in the solar system, there is felt need of a three-level boost converter which alleviates potential induced degradation of PV modules and reduces common-mode leakage current.
OBJECTS
Some of the objects of the present disclosure, which at least one embodiment herein satisfies, are as follows:
It is an object of the present disclosure to ameliorate one or more problems of the prior art or to at least provide a useful alternative.
An object of the present disclosure is to provide a three-level boost converter which reduces potential induced degradation (PID) of PV modules.
Another object of the present disclosure is to provide a three-level boost converter which reduces common mode leakage current in a solar PV system.
Yet another object of the present disclosure is to provide a three-level boost converter with reduced PID and leakage current but having simple configuration.
Other objects and advantages of the present disclosure will be more apparent from the following description when read in conjunction with the accompanying figures, which are not intended to limit the scope of the present disclosure.
SUMMARY
The present disclosure envisages a three-level boost converter for high power solar photovoltaic (PV) applications.
The three-level boost converter comprises at least two inductive energy storage elements, at least two switching elements, at least two capacitive energy storage elements, at least two diodes and at least two filter elements. One inductive energy storage element is connected to a positive terminal of a PV string and the other inductive energy storage element is connected to a negative terminal of the PV string. Each of the at least two switching elements is connected to one of the inductive energy storage elements. The capacitive storage elements are connected across terminals of a DC link. Each of the diodes is connected between one of the switching elements and one of the capacitive energy storage elements. One of the at least two filter elements is connected between the positive terminal of the PV string and positive terminal of the DC link and other filter element is connected between negative terminal of the PV string and negative terminal of the DC link.
In an embodiment, the boost converter includes an input filter element connected between the inductive storage elements across the output terminals of the PV string. The metallic frame of the PV string is connected to the ground. In another embodiment, at least two parasitic capacitors are formed between the output terminals and the metallic frame of the PV string. The switching action of two diodes results in generation of high frequency voltages across the parasitic capacitors.
In an embodiment, the filter elements reduce common mode leakage current by filtering out the high frequency voltages across the parasitic capacitors. The filter elements further reduce the potential induced degradation (PID) of the PV string by maintaining positive voltage at negative terminal (node N1) of the PV string with respect to the ground.
BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWING
The three-level boost converter of the present disclosure will now be described with the help of the accompanying drawing, in which:
Figure 1 illustrates a typical PV system having solar panels, DC-DC converters and an inverter;
Figures 2 (a) - (b) illustrate a conventional three-level boost converters;
Figure 3 (a) illustrates a modified three-level boost converter of the present disclosure;
Figure 3 (b) illustrates an AC equivalent circuit of the three-level boost converter of Figure 3 (a);
Figure 4 (a) illustrates simulated results of voltages across the parasitic capacitors and the leakage current associated from each booster, and total leakage current flowing through GFDI in case of (a) conventional three-level boost converter of Figure 2; and
Figure 4 (b) illustrates simulated results of voltages across the parasitic capacitors and the leakage current associated from each booster, and total leakage current flowing through GFDI in case of three-level boost converter with proposed filter configuration shown in Figure 3.
LIST OF REFERENCE NUMERALS
100 – three-level boost converter
L1, L2 - inductive energy storage elements
S1, S2 - switching elements
CO1, CO2 – capacitive energy storage elements
D1, D2- diodes
Cf1, Cf2- filter elements
Ci - input filter element
VDC – voltage across the input filter element
PV- photovoltaic string
P, N- terminals of DC link
P1, N1- output terminals of PV string
DETAILED DESCRIPTION
Embodiments, of the present disclosure, will now be described with reference to the accompanying drawing.
Embodiments are provided so as to thoroughly and fully convey the scope of the present disclosure to the person skilled in the art. Numerous details are set forth relating to specific components, and methods, to provide a complete understanding of embodiments of the present disclosure. It will be apparent to the person skilled in the art that the details provided in the embodiments should not be construed to limit the scope of the present disclosure. In some embodiments, well-known processes, well-known apparatus structures, and well-known techniques are not described in detail.
The terminology used, in the present disclosure, is only for the purpose of explaining a particular embodiment and such terminology shall not be considered to limit the scope of the present disclosure. As used in the present disclosure, the forms "a,” "an," and "the" may be intended to include the plural forms as well, unless the context clearly suggests otherwise. The terms "comprises," "comprising," “including,” and “having,” are open ended transitional phrases and therefore specify the presence of stated features, integers, steps, operations, elements, modules, units and/or components, but do not forbid the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. When an element is referred to as being "connected to" or "coupled to" another element, it may be directly on, connected or coupled to the other element. As used herein, the term "and/or" includes any and all combinations of one or more
As used herein, "circuit" is, for example a printed circuit, programmable circuitry, state machine circuitry, and / or programs contained in the single firmware or combination to store the instruction execution by the available circuit.
The present disclosure discloses a three-level boost converter with anti-PID & leakage-current suppression filter for high power solar PV applications.
The three-level boost converter (100) with anti-PID & leakage-current suppression filter (herein after referred to as “boost converter 100), of the present disclosure, is now described with reference to Figure 3 (a) through Figure 4 (b).
Figure 3 (a) illustrates a three-level boost converter (100) in accordance with an embodiment of the present disclosure. The three-level boost converter (100) comprises at least two switching elements (S1, S2), at least two first energy storage elements (L1, L2), at least two second energy storage elements (CO1, CO2), at least two diodes (D1, D2) and at least two filter elements (Cf1, Cf2). One inductive storage element (L1) is connected to a positive terminal (P1) of a PV string (PV) and the other energy storage element (L2) is connected to a negative terminal (N1) of the PV string (PV). Each of the switching elements (S1, S2) is connected to one of the inductive energy storage elements (L1, L2). The capacitive energy storage elements (CO1, CO2) are connected across terminals (P, N) of a DC link. Each of the diodes (D1, D2) is connected between one of the at least two switching elements (S1, S2) and one of the at least two capacitive energy storage elements (CO1, CO2). One filter element (Cf1) is connected between positive terminal (P1) of the PV string (PV) and positive terminal (P) of the DC link and the other filter element (Cf2) is connected between negative terminal (N1) of the PV string and negative terminal (N) of the DC link. The metallic frame of the PV string is connected to the ground. Therefore, at least two parasitic capacitors (CPV1, CPV2) are formed between the output terminals and metallic frame of the PV panel as shown in Figure 3 (a). These parasitic capacitances (CPV1, CPV2) provide path for the flow of leakage current in the PV panels. The nature of this leakage current is common-mode and it interferes with the Ground fault detector (GFD) instrument of an inverter as shown in Fig. 1. The GFD instrument is located inside the inverter, and it connects the negative terminal of the DC-link to ground.
In an embodiment, the boost converter includes an input filter element (Ci) connected between the inductive storage elements (L1, L2) across the output terminals (P1, N1) of the PV string (PV). The switching action of two diodes (D1, D2) results in the generation of high frequency voltages (VD1, VD2) across the parasitic capacitors (CPV1, CPV2). These high frequency voltages cause a negative voltage to appear across the terminals (P1, N1) of the PV string with respect to ground, thereby leading to Potential induced degradation (PID) of the PV string.
In one embodiment of the three level boost converter, the filter capacitors (Cf1, Cf2) are used to reduce the common-mode leakage current by filtering out the high frequency voltages across the parasitic capacitors (CPV1, CPV2). The high frequency voltages across the diodes (D1, D2) are given as:
VDi = gi * VOi
where, gi (i= 1, 2) is the switching function for the MOSFET Si.
gi = 1, if Si is in ON state;
gi = 0, if Si is in OFF state; and
VOi (i= 1, 2) is Voltage across output capacitor COi.
VD1 and VD2 are the sources of high-frequency voltages in the converter. Thus, using the filter capacitors (Cf1, Cf2), the high-frequency voltage across parasitic capacitors (CPV1, CPV2) are filtered out, and only a DC voltage appears across them.
Figure 3(b) illustrates AC equivalent circuit of the boost converter of Figure 3(a). By applying Kirchhoff’s law to the AC equivalent circuit shown in Figure 3(b), the voltage across the parasitic capacitors CPV1 and CPV2 are given as
VCPV1 = VP1G = -0.5 (VDC -VPV)
VCPV2 = VN1G = 0.5 (VDC -VPV)
where VP1G and VN1G are voltages of positive and negative terminals (P1, N1) of the PV string with respect to ground and VDC is a DC voltage across the input filter element (Ci).
The aforementioned equations indicate that VN1G > 0, which means that the voltage of the negative terminal (N1) of the grid-connected PV module is always greater than the ground voltage. The positive voltage at negative terminal (N1) of the grid-connected PV module indicates less potential induced degradation (PID) of the PV module.
The present disclosure is further described in light of the following experiments which are set forth for illustration purpose only and not to be construed for limiting the scope of the disclosure. The following simulation work can be scaled up to industrial/commercial scale and the results obtained can be extrapolated to industrial scale.
A simulation work was carried out using the three level boost converter in accordance with the present disclosure in MATLAB/Simulink software. PV array of 1.2 MWp was considered with total number of 27 DC-DC converters used to interface the PV array to a single DC/AC converter of 1 MVA. Using the parameters given in Table 1, the conventional DC-DC converter as shown in figure 2(b) and the three level boost converter in accordance with the present disclosure as shown in figure 3(a) were simulated. In both cases, the simulated results of VCPV1, VCPV2; leakage current associated with a single booster (iCPV) and the total leakage current flowing through the GFD instrument (iGFD) are shown in Figure 4(a) and Figure 4 (b), respectively. From Figure 4 (a), it can be observed that in the conventional three-level boost converter, a high-frequency voltage appears across the CPV1 and CPV2, and the RMS value of leakage current associated with a single booster is measured as 2.73 A, and the total current flowing through the GFDI of inverter is 72.25 A. However, according to industry practice, the allowable current through GFDI is 5A for DC/AC converters rated over 100 kW. By using the three level boost converter as disclosed in the present disclosure, the high-frequency components of VCPV1 and VCPV2 are filtered out. Figure 4(b) shows VCPV1, VCPV2, total current through GFDI and the leakage current are shown. It can be seen from Figure 4(b) that the leakage current is reduced to 90 mA. In this case, the total current flowing through the GFDI of inverter is 2.37 A, which is significantly less as compared to conventional three-level boost converter. Advantageously, the value of total current flowing through the GFDI of inverter is complying to the aforementioned industry practice.
Table 1: Simulation Parameters
Parameter Value
Input voltage 925 V
Output voltage, VDC 1125 V
Output power 37500 W
Switching frequency 35000 Hz
L1, L2 0.136 mH
Cin 0.352 uF
Co1, Co2 3.18 uF
CPV1, CPV2 0.1 uF/kW
Cf1, Cf2 30 uF
In addition, any disclosure of components contained within other components or separate from other components should be considered exemplary because multiple other architectures may potentially be implemented to achieve the same functionality, including incorporating all, most, and/or some elements as part of one or more unitary structures and/or separate structures.
In addition, any disclosure of components contained within other components or separate from other components should be considered exemplary because multiple other architectures may potentially be implemented to achieve the same functionality, including incorporating all, most, and/or some elements as part of one or more unitary structures and/or separate structures.
TECHNICAL ADVANCEMENTS AND ECONOMICAL SIGNIFICANCE
The technical advancements offered by the system of the present disclosure which add to the economic significance of the disclosure include the realization of a three-level boost converter that:
• obviates potential induced degradation of PV modules;
• reduces common mode leakage current in a solar PV system; and
• is simple in configuration.
Throughout this specification the word “comprise”, or variations such as “comprises” or “comprising”, will be understood to imply the inclusion of a stated element, integer or step, or group of elements, integers or steps, but not the exclusion of any other element, integer or step, or group of elements, integers or steps.
The use of the expression “at least” or “at least one” suggests the use of one or more elements or ingredients or quantities, as the use may be in the embodiment of the invention to achieve one or more of the desired objects or results.
The numerical values mentioned for the various physical parameters, dimensions or quantities are only approximations and it is envisaged that the values higher/lower than the numerical values assigned to the parameters, dimensions or quantities fall within the scope of the invention, unless there is a statement in the specification specific to the contrary.
The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the scope of the embodiments as described herein.
,CLAIMS:WE CLAIM:
1. A three-level boost converter for high power solar photovoltaic (PV) applications, said boost converter comprising:
• at least two inductive energy storage elements (L1, L2), one inductive storage element (L1) connected to a positive terminal (P1) of a PV string (PV) and the other energy storage element (L2) connected to a negative terminal (N1) of said PV string (PV);
• at least two switching elements (S1, S2), each switching element connected to one of said inductive energy storage elements (L1, L2);
• at least two capacitive energy storage elements (CO1, CO2) connected across terminals (P, N) of a DC link;
• at least two diodes (D1, D2), each of said diodes (D1, D2) connected between one of said at least two switching elements (S1, S2) and one of said at least two capacitive energy storage elements (CO1, CO2); and
• at least two filter elements (Cf1, Cf2), one filter element (Cf1) connected between positive terminal (P1) of said PV string (PV) and positive terminal (P) of said DC link and the other filter element (Cf2) connected between negative terminal (N1) of said PV string and negative terminal (N) of said DC link.
2. The boost converter as claimed in claim 1, wherein said boost converter includes an input filter element (Ci) connected between said inductive storage elements (L1, L2) across the output terminals (P1, N1) of said PV string (PV).
3. The boost converter as claimed in claim 1, wherein the metallic frame of said PV string is connected to the ground.
4. The boost converter as claimed in claim 1, wherein at least two parasitic capacitors (CPV1, CPV2) are formed between the output terminals (P1, N1) of said PV string and the metallic frame of said PV string.
5. The boost converter as claimed in claim 4, wherein switching action of said at least two diodes (D1, D2) results in the generation of high frequency voltages (VD1, VD2) across said parasitic capacitors (CPV1, CPV2).
6. The boost converter as claimed in claim 5, wherein said high frequency voltages (VD1, VD2) across the diodes (D1, D2) are given by:
VD1 = g1 * Vo1
VD2 = g2 * Vo2
where Vo1 and Vo2 are voltages across said capacitive energy storage elements (CO1, CO2) and gi (i=1,2) is the switching function for the MOSFET Si.
7. The boost converter as claimed in claim 5, wherein said filter elements (Cf1, Cf2) reduce common-mode leakage current by filtering out the high-frequency voltages (VD1, VD2) across said parasitic capacitors (CPV1, CPV2).
8. The boost converter as claimed in claim 7, wherein the filtered voltage across said parasitic capacitors (CPV1, CPV2) is given by:
VCPV1 = VP1G = -0.5 (VDC -VPV)
VCPV2 = VN1G = 0.5 (VDC -VPV),
where VP1G and VN1G are voltages of positive and negative terminals (P1, N1) of the PV string with respect to ground and VDC is a DC voltage across said input filter element (Ci).
9. The boost converter as claimed in claim 8, wherein said filter elements (Cf1, Cf2) reduce the potential induced degradation (PID) of said PV string by maintaining positive voltage (VN1G) at negative terminal (node N1) with respect to the ground.
Dated this 9th Day of September, 2019
_______________________________
MOHAN DEWAN, IN/PA - 25
of R.K.DEWAN & CO.
Authorized Agent of Applicant
TO,
THE CONTROLLER OF PATENTS
THE PATENT OFFICE, AT MUMBAI
| # | Name | Date |
|---|---|---|
| 1 | 201821033928-STATEMENT OF UNDERTAKING (FORM 3) [10-09-2018(online)].pdf | 2018-09-10 |
| 2 | 201821033928-PROVISIONAL SPECIFICATION [10-09-2018(online)].pdf | 2018-09-10 |
| 3 | 201821033928-PROOF OF RIGHT [10-09-2018(online)].pdf | 2018-09-10 |
| 4 | 201821033928-FORM 1 [10-09-2018(online)].pdf | 2018-09-10 |
| 5 | 201821033928-DRAWINGS [10-09-2018(online)].pdf | 2018-09-10 |
| 6 | 201821033928-DECLARATION OF INVENTORSHIP (FORM 5) [10-09-2018(online)].pdf | 2018-09-10 |
| 7 | 201821033928-FORM-26 [11-09-2018(online)].pdf | 2018-09-11 |
| 8 | 201821033928-ORIGINAL UR 6(1A) FORM 1-161018.pdf | 2019-03-27 |
| 9 | 201821033928-ENDORSEMENT BY INVENTORS [09-09-2019(online)].pdf | 2019-09-09 |
| 10 | 201821033928-DRAWING [09-09-2019(online)].pdf | 2019-09-09 |
| 11 | 201821033928-COMPLETE SPECIFICATION [09-09-2019(online)].pdf | 2019-09-09 |
| 12 | Abstract1.jpg | 2019-09-26 |
| 13 | 201821033928-FORM 18 [12-09-2022(online)].pdf | 2022-09-12 |
| 14 | 201821033928-FER.pdf | 2024-02-14 |
| 1 | Searchstrategy201821033928E_22-01-2024.pdf |