Field of the Invention:
The present invention relates to a regulator-rectifier circuit for providing a regulated and rectified voltage for charging a battery and/or powering a DC load. In particular, the regulator-rectifier circuit is connected to an output of a three-phase alternating current generator for receiving there from three full waveform input AC voltages and providing a regulated and rectified voltage for charging a battery and/or powering a DC load. In an embodiment, the present invention relates to a lamp lighting and battery charging control system for a vehicle in which a three phase full waveform input AC voltage produced by an electric generator, driven by an internal combustion engine, is used to light a lamp as well as to charge a battery.

Background of the Invention:
The following background discussion includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention.

Conventionally in some of the vehicles such as motorcycles, a full waveform AC voltage is produced by an alternating current generator which is driven by an internal combustion engine, and the full waveform AC voltage is used to charge a battery as well as to light a lamp such as a headlamp. A conventional technique known as "half-wave" technique, implements a controlling mechanism in which negative half-waves of the full waveform AC voltage are used for lamp loads while positive half-waves are used by DC loads.

In some cases, the vehicles may be provided with a three phase alternating current generator (driven by the internal combustion engine) that produces a three phase full waveform AC voltage and the same can be used to charge the battery as well as to light the lamp such as a headlamp.

However, in light of various disadvantages associated with the known devices, there is felt, a need to provide an improved circuit for controlling generation of DC voltage corresponding to a three phase full waveform input AC voltage.

Object of the Invention:
In view of the foregoing, it is an object of the present invention to provide improved regulator-rectifier circuit providing a regulated and rectified voltage for charging a battery and/or powering a DC load, the regulator-rectifier circuit being connected to an output of a three-phase alternating current generator for receiving there from three full waveform input AC voltages.

Summary of the Invention:
Accordingly, the present invention provides a regulator-rectifier circuit providing a regulated and rectified voltage for charging a battery and/or powering a DC load, the regulator-rectifier circuit being connected to an output of a three-phase alternating current generator for receiving there from three full waveform input AC voltages. In accordance with an embodiment of the invention, the regulator-rectifier comprises a first MOSFET based bridge, a second MOSFET based bridge and a third MOSFET based Bridge. The first MOSFET based bridge is adapted to receive a first full waveform input AC voltage from the three-phase alternating current generator and comprises a first MOSFET providing a regulated-rectified voltage as output and a second MOSFET acting to shunt the first full waveform input AC voltage. The second MOSFET based bridge is adapted to receive a second full waveform input AC voltage from the three-phase alternating current generator and comprises a third MOSFET providing a regulated-rectified voltage as output and a fourth MOSFET acting to shunt the second full waveform input AC voltage. The third MOSFET based bridge is adapted to receive a third full waveform input AC voltage from the three-phase alternating current generator and comprises a fifth MOSFET providing a regulated-rectified voltage as output and a sixth MOSFET acting to shunt the third full waveform input AC voltage. The regulator-rectifier further comprises a negative cycle detection module adapted to control each of the second, the fourth and the sixth MOSFETs to shunt the input AC voltage during a negative cycle of the first, the second and the third full waveform input AC voltage, respectively. The regulator-rectifier further comprises a battery voltage detection module adapted to detect a level of battery voltage, the battery voltage detection module being further adapted to control each of the second, the fourth and the sixth MOSFETs to shunt the first, the second and the third input AC voltage if the level of battery voltage thus detected is greater than a first predetermined value. The regulator-rectifier further comprises an output monitoring module adapted to detect level of DC voltages as output by the first, the second and the third MOSFET based bridges in a battery-less condition, the output monitoring module being further adapted to control each of the second, the fourth and the sixth MOSFETs to shunt the first, the second and the third input AC voltage if the level of DC voltages as output by the first, the second and the third MOSFET based bridges in the battery-less condition is greater than a second predetermined value.

Various objects, features, aspects and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying figures.

Brief Description of the Accompanying Drawings:
In the drawings accompanying the specification,
Figure 1 illustrates the block diagram of the regulator-rectifier circuit providing a regulated and rectified voltage for charging a battery and/or powering a DC load based on three full waveform input AC voltages generated by three-phase alternating current generator;
Figure 2 illustrates a circuit diagram of the MOSFET based bridge part in accordance with an embodiment of the invention;
Figure 3 illustrates a circuit diagram of the negative cycle detection module in accordance with an embodiment of the invention;
Figure 4 illustrates a circuit diagram of battery voltage detection module in accordance with an embodiment of the invention; and
Figure 5 illustrates a circuit diagram of output monitoring detection module in accordance with an embodiment of the invention.

It may be noted that to the extent possible, like reference numerals have been used to represent like elements in the drawings. Further, skilled artisans will appreciate that elements in the drawings are illustrated for simplicity and may not have been necessarily been drawn to scale. For example, the dimensions of some of the elements in the drawings may be exaggerated relative to other elements to help to improve understanding of aspects of the present invention. Furthermore, the one or more elements may have been represented in the drawings by conventional symbols, and the drawings may show only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the drawings with details that will be readily apparent to those of ordinary skill in the art having benefit of the description herein.

Detailed Description of the Invention and drawings:
As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.

The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.

Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all Markush groups used in the appended claims.

It may be noted that to the extent possible, like reference numerals have been used to represent like elements in the drawings. Further, skilled artisans will appreciate that elements in the drawings are illustrated for simplicity and may not have been necessarily been drawn to scale. Furthermore, the one or more elements may have been represented in the drawings by conventional symbols, and the drawings may show only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the drawings with details that will be readily apparent to those of ordinary skill in the art having benefit of the description herein.

As used in the description, reference throughout this specification to “an embodiment”, “another embodiment” or similar language means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrase “in an embodiment”, “in another embodiment” and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment.

As used herein, and unless the context dictates otherwise, the terms "coupled to", “connected to”, “operably connected to”, “operatively connected to” are intended to include both direct connection / coupling (in which two elements that are coupled / connected to each other contact each other) and indirect coupling / connection (in which at least one additional element is located between the two elements). Therefore, the terms "coupled to" and "coupled with" are used synonymously. Similarly, the terms “connected to” and “connected with” are used synonymously.

Referring to figure 1, which illustrates the regulator-rectifier circuit (10) in accordance with the teachings of the present invention, it can be said that the regulator-rectifier circuit (10) provides a regulated and rectified voltage for charging a battery (2) and/or powering a DC load control apparatus (4) based on three-phase input as received from a three-phase alternator (6). In accordance with an embodiment of the invention, the regulator-rectifier circuit (10) comprises a MOSFET based bridge part (12), further details of which will be explained in reference to Figure 2, adapted to receive the three phase voltage as generated by the three-phase alternator (40).

The regulator-rectifier circuit (10) further comprises a negative cycle detection module (14) for detecting negative cycles in the three-phase voltage being supplied by the three-phase alternator (40) and controlling the MOSFET based bridge part to shunt the input AC voltage during the negative cycles of the input AC voltage. Further details of the negative cycle detection module (14) are described with reference to Figure 3.

The regulator rectifier circuit (10) further comprises a battery voltage detection module (16) adapted to detect a level of battery voltage, the battery voltage detection module being further adapted to control the MOSFET based bridge part to shunt the input AC voltage if the level of battery voltage thus detected is greater than a first predetermined value. Further details of the battery voltage detection module (16) are described with reference to Figure 4.

The regulator-rectifier circuit (10) further comprises an output monitoring module (18) adapted to detect level of DC voltages as output by the MOSFET based bridge part in a battery-less condition, the output monitoring module being further adapted to control the MOSFET based bridge part to shunt the input AC voltage if the level of DC voltage as output by MOSFET based bridge part in the battery-less condition is greater than a second predetermined value. Further details of the output monitoring detection module (18) are described with reference to Figure 5.

Now referring to Figure 2, the MOSFET based bridge part (12) comprises:
• a first MOSFET based bridge (22) receiving a first full waveform input AC voltage from the three-phase alternating current generator and comprising a first MOSFET (Q1) providing a regulated-rectified voltage as output and a second MOSFET (Q4) acting to shunt the first full waveform input AC voltage;
• a second MOSFET based bridge (24) receiving a second full waveform input AC voltage from the three-phase alternating current generator and comprising a third MOSFET (Q2) providing a regulated-rectified voltage as output and a fourth MOSFET (Q5) acting to shunt the second full waveform input AC voltage;
• a third MOSFET based bridge (26) receiving a third full waveform input AC voltage from the three-phase alternating current generator and comprising a fifth MOSFET (Q3) providing a regulated-rectified voltage as output and a sixth MOSFET (Q6) acting to shunt the third full waveform input AC voltage.

It may be noted that the second MOSFET (Q4) shunts the first full waveform input AC voltage upon receipt of Gate Pulse G1, which can be provided by any one of the negative cycle detection module (14) or the battery voltage detection module (16) or the output monitoring module (18). Similarly, the fourth MOSFET (Q5) shunts the second full waveform input AC voltage upon receipt of Gate Pulse G2, which can be provided by any one of the negative cycle detection module (14) or the battery voltage detection module (16) or the output monitoring module (18). Similarly, the sixth MOSFET (Q6) shunts the third full waveform input AC voltage upon receipt of Gate Pulse G3, which can be provided by any one of the negative cycle detection module (14) or the battery voltage detection module (16) or the output monitoring module (18).

Conditions under which the negative cycle detection module (14) generates the Gate Pulses G1, G2 and G3 will be described in relation to Figure 3. Similarly, conditions under which the battery voltage detection module (16) generates the Gate Pulses G1, G2 and G3 will be described in relation to Figure 4. Likewise, conditions under which the output monitoring module (18) generates the Gate Pulses G1, G2 and G3 will be described in relation to Figure 5.

In a specific implementation of the invention, MOSFETs Q1, Q2, Q3 are responsible to provide the charging current to battery while MOSFETs Q4, Q5, Q6 will shunt the phases as output of this module i.e Vbat goes more than 14.5±0.3V. Gate terminals of MOSFETS Q1, Q2 and Q3 are connected to the phase voltage through respective resistors R1, R2 and R3, wherein the resistors R1, R2 and R3 function to maintain the Vgs of Q1, Q2, Q3 equal to zero, such that current can flows only in one direction i.e from Phase to battery Vbat through embedded diodes in MOSFET.

Referring to Figure 3, the negative cycle detection module (14) functions to shunt the phase during its negative cycle. Input to this module is phases and output of this module is gate-pulses to MOSFET Q4,Q5,Q6. The negative cycle detection module (14) comprises:
• a first module (32) adapted to generate and provide a first gate pulse signal to the second MOSFET to shunt the input AC voltage during the negative cycle of the first full waveform input AC voltage;
• a second module (34) adapted to generate and provide a second gate pulse signal to the fourth MOSFET to shunt the input AC voltage during the negative cycle of the second full waveform input AC voltage; and
• a third module (36) adapted to generate and provide a third gate pulse signal to the sixth MOSFET to shunt the input AC voltage during the negative cycle of the third full waveform input AC voltage.

In a preferred aspect of the invention, the first module (32) comprises a transistor (Q10) having a base, an emitter and a collector terminal; the base terminal being adapted to receive the first full waveform input AC voltage via a first diode (D11) and a driving power supply from the regulated power generation module via a resistor (R24); the emitter terminal being connected to a ground terminal; and the collector terminal being connected to the output terminal via a second diode (D8) such that the resistor (24) maintains the transistor (Q10) in an ON state during a positive cycle of the first full waveform input AC voltage, the first diode (D11) conducts during a negative cycle of the first full waveform input AC voltage thereby brings the transistor (Q10) to an OFF state and the second diode (D8) allows current to flow towards the output terminal when the transistor (Q10) is in the OFF state, thereby generating and providing the first gate pulse signal to the second MOSFET.

In a preferred aspect of the invention, the second module (34) comprises a transistor (Q11) having a base, an emitter and a collector terminal; the base terminal being adapted to receive the second full waveform input AC voltage via a first diode (D12) and a driving power supply from the regulated power generation module via a resistor (R26); the emitter terminal being connected to a ground terminal; and the collector terminal being connected to the output terminal via a second diode (D9) such that the resistor (26) maintains the transistor (Q11) in an ON state during a positive cycle of the second full waveform input AC voltage, the first diode (D12) conducts during a negative cycle of the second full waveform input AC voltage thereby brings the transistor (Q11) to an OFF state and the second diode (D9) allows current to flow towards the output terminal when the transistor (Q11) is in the OFF state, thereby generating and providing the second gate pulse signal to the fourth MOSFET.

In a preferred aspect of the invention, the third module (36) comprises a transistor (Q12) having a base, an emitter and a collector terminal; the base terminal being adapted to receive the third full waveform input AC voltage via a first diode (D13) and a driving power supply from the regulated power generation module via a resistor (R28); the emitter terminal being connected to a ground terminal; and the collector terminal being connected to the output terminal via a second diode (D10) such that the resistor (28) maintains the transistor (Q12) in an ON state during a positive cycle of the third full waveform input AC voltage, the first diode (D13) conducts during a negative cycle of the third full waveform input AC voltage thereby brings the transistor (Q12) to an OFF state and the second diode (D10) allows current to flow towards the output terminal when the transistor (Q12) is in the OFF state, thereby generating and providing the third gate pulse signal to the sixth MOSFET.

During operation, diodes D14, D15, D16 will generate regulated supply to Q10, Q11, Q12 transistors. The resistors R24, R26, R28 will be responsible to switch ON transistors Q10, Q11, and Q12, respectively. As the negative cycle comes of Phase-3, diode D11 will conduct and transistor Q10 be turned OFF. In the same manner as negative cycle comes of Phase 2, diode D12 will conduct and transistor Q11 will be turned OFF. In a similar manner, as negative cycle comes of Phase 1, diode D13 will conduct and transistor Q12 will be turned OFF. The diodes D8, D9 and D10 will allow flow of current in one direction only and provide gate pulses G1, G2 and G3 to the MOSFET based bridge part during negative cycles.

The negative cycle detection module (14) further comprises a regulated power generation module (38) coupled to the three phase alternator (6) and being adapted to generate and supply driving power supply to the first module (32), the second module (34) and the third module (36).

Referring to Figure 4, the battery voltage detection module (16) functions to detect a level of battery voltage and control the MOSFET based bridge part to shunt the input AC voltage if the level of battery voltage thus detected is greater than a first predetermined value (for example, 14.5±0.3V). Input to battery voltage detection module (16) is the FEEDBACK of output of MOSFET Bridges and output of this module will be gate pulses which controls the voltage-regulation using MOSFET Bridges.

As the output of the bridge goes more than first predetermined value (for example, 14.5±0.3V) this module will provide Gate Pulses G1, G2 and G3 to MOSFETs Q4, Q5 and Q6, respectively. In presence of the Gate Pulse G1, MOSFET Q4 is turned ON; similarly in presence of Gate Pulse G2, MOSFET Q5 is turned ON; and likewise in presence of Gate Pulse G3, MOSFET Q6 is turned ON. When the MOSFETS Q4, Q5 and Q6 are turned ON, there will be shunting of all the phases and output will go down. As the output of the bridge goes below (becomes less than) the first predetermined value (for example, 14.5±0.3V), the MOSFETs Q4, Q5 and Q6 are turned OFF and battery charging current starts to flow through MOSFETs Q1, Q2 and Q3. This process is repeatedly performed.

In an embodiment of the invention, the battery voltage detection module (16) comprises:
• a first gate pulse signal generation unit (42) adapted to generate and provide a first gate pulse (G1) to the second MOSFET (Q4) to shunt the first full waveform input AC voltage (i.e. Phase 1);
• a second gate pulse signal generation unit (44) adapted to generate and provide a second gate pulse (G2) to the fourth MOSFET (Q5) to shunt the second full waveform input AC voltage (i.e. Phase 2);
• a third gate pulse signal generation unit (46) adapted to generate and provide a third gate pulse (G3) to the sixth MOSFET (Q6) to shunt the third full waveform input AC voltage (i.e. Phase 3); and
• a switching module (48) that switches to a conducting state in response to the battery voltage being in excess of the first predetermined value and thereby triggering each of the first, second and the third gate pulse signal generation units to produce first, second and third gate pulse signals, respectively.

In a preferred embodiment of the invention, the switching module (48) comprises:
a first zener diode (Z6), a second zener diode (Z7) and a first diode (D17) connected in series to a battery terminal; and
a switching transistor (Q13) having a base terminal, an emitter terminal and a collector terminal, the base terminal of the switching transistor (Q13) being connected to the first diode (D17) via a voltage divider circuit, the emitter terminal of the switching transistor (Q13) being connected to a ground and the collector terminal of the switching terminal being connected to the first, the second and the third gate pulse signal generation units;
the first zener diode (Z6), the second zener diode (Z7) and the first diode (D17) along with the voltage divider circuit controlling operation of the switching transistor (Q13) to be in:
• an OFF state, if the voltage at the battery terminal is less than the first predetermined voltage; and
• an ON state, if the voltage at the terminal is greater than the first predetermined voltage.

In a preferred embodiment of the invention, the first gate pulse signal generation unit (42) comprises:
a diode (D1) receiving the first full waveform input AC voltage;
a first voltage divider circuit (R4, R5 and R6) having a first input and a second input, the first input being connected to the switching module and the second input being connected to the diode (D1); and
a switching transistor (Q7) having a base terminal connected to the first voltage divider circuit, an emitter terminal for receiving a power supply and a collector terminal connected to an output terminal via a second voltage divider circuit (R7 and R8) and a zener diode (Z1).

In a preferred embodiment of the invention, the second gate pulse signal generation unit (44) comprises:
a diode (D2) receiving the second full waveform input AC voltage;
a first voltage divider circuit (R9, R10 and R11) having a first input and a second input, the first input being connected to the switching module and the second input being connected to the diode (D2); and
a switching transistor (Q8) having a base terminal connected to the first voltage divider circuit, an emitter terminal for receiving a power supply and a collector terminal connected to an output terminal via a second voltage divider circuit (R12 and R13) and a zener diode (Z2).

In a preferred embodiment of the invention, the third gate pulse signal generation unit (46) comprises:
a diode (D3) receiving the third full waveform input AC voltage;
a first voltage divider circuit (R14, R15 and R16) having a first input and a second input, the first input being connected to the switching module and the second input being connected to the diode (D3); and
a switching transistor (Q9) having a base terminal connected to the first voltage divider circuit, an emitter terminal for receiving a power supply and a collector terminal connected to an output terminal via a second voltage divider circuit (R17 and R18) and a zener diode (Z3).

During operation, Zener Z6, Z7 and Diode D7 restricts the Transistor Q13 to ON before the battery-voltage becomes less than 14.5±0.3 V, as the battery-voltage goes higher than 14.5±0.3V they will ON the transistor Q13, Transistor Q13 will ON, it will ON the transistors Q7,Q8 and Q9.

Resistance R29, R30 and R31 can be used for calibrating the exact voltage value at which the transistor Q13 switches from ON to OFF state. The switching module can be provide with a capacitance C4 for reducing ripples in output of MOSFET Bridge in case of battery less condition.

Diode D1, D2 and D3 will restrict the respective transistor Q7, Q8, Q9 to ON if Battery Voltage is greater than 14.5±0.3V and Phase-Voltage is also greater than battery voltage + drop across diode (D1, D2 and D3).

Resistor sets (R4, R5, R6) and (R9, R10, R11) and (R14, R15, R16) function as voltage-dividers and provide voltage difference to ON/OFF transistors Q7, Q8 and Q9 respectively when transistor Q13 is in ON/OFF stage.

Zener Z1, Z2 and Z3 will regulate the voltage at gate of MOSFET.

Charging and discharging of input capacitance of gate for MOSFET Q4 will be through resistors R8 and R7. Charging and discharging of input capacitance of gate for MOSFET Q5 will be through resistors R13 and R12. Charging and discharging of input capacitance of gate for MOSFET Q6 will be through resistors R18 and R17.

Now referring to Figure 5, the output monitoring module (18) is specifically adapted to function during battery-less condition. Input of output monitoring module (18) is the FEEDBACK of output of MOSFET Bridge during battery-less condition and output of this module will be gate pulses which controls the regulation using MOSFET Bridge.

If during the battery-less condition output of the bridge goes more than 14.5±0.3V this module will provide gate pulses to MOSFETs Q4, Q5 and Q6, which be switched ON. Due to switching ON of the MOSFETs Q4, Q5 and Q6, there will be shunting of all the phases and output goes down, as output become less than 14.5±0.3V again it MOSFETs will be switched OFF and battery charging current will flow through to MOSFETs Q1, Q2 and Q3.

In an embodiment of the invention, the output monitoring module (18) comprises:
• a first zener diode (Z5), a second zener diode (Z4) and a first diode (D4) connected in series to an output from the MOSFET based bridges;
• a first switching transistor (Q14) having a base terminal, an emitter terminal and a collector terminal, the base terminal of the switching transistor (Q14) being connected to the first diode (D4) via a voltage divider circuit (R19 and R20), the emitter terminal of the switching transistor (Q14) being connected to a ground and the collector terminal being connected to a voltage calibration circuit (R21, R22);
• the voltage calibration circuit (R21, R22) being connected to the output from the MOSFET based bridges at a first end and to a second switching transistor (Q15) at a second end; and
• a second switching transistor (Q15) having a base terminal, an emitter terminal and a collector terminal, the base terminal of the second switching transistor (Q15) being connected to the voltage calibration circuit (R21, R22), an emitter terminal being connected to the output from the MOSFET based bridges and the collector terminal being connected to the second, the fourth and the sixth MOSFETs to shunt the first, the second and the third input AC voltage if the level of DC voltages as output by the first, the second and the third MOSFET based bridges in the battery-less condition is greater than a second predetermined value.

In a further embodiment of the invention an electrical path between the collector terminal of the second switching transistor (Q15) and the second MOSFET further comprises a diode (D7), control resistors (R17 and R18) and a zener diode (Z3). In a furthermore embodiment of the invention, an electrical path between the collector terminal of the second switching transistor (Q15) and the fourth MOSFET further comprises a diode (D6), control resistors (R12 and R13) and a zener diode (Z2). In yet another embodiment of the invention an electrical path between the collector terminal of the second switching transistor (Q15) and the sixth MOSFET further comprises a diode (D5), control resistors (R7 and R8) and a zener diode (Z1).

While specific language has been used to describe the disclosure, any limitations arising on account of the same are not intended. As would be apparent to a person in the art, various working modifications may be made to the method in order to implement the inventive concept as taught herein.

The figures and the forgoing description give examples of embodiments. Those skilled in the art will appreciate that one or more of the described elements may well be combined into a single functional element. Alternatively, certain elements may be split into multiple functional elements. Elements from one embodiment may be added to another embodiment. For example, orders of processes described herein may be changed and are not limited to the manner described herein. Moreover, the actions of any flow diagram need not be implemented in the order shown; nor do all of the acts necessarily need to be performed. Also, those acts that are not dependent on other acts may be performed in parallel with the other acts. The scope of embodiments is by no means limited by these specific examples. Numerous variations, whether explicitly given in the specification or not, such as differences in structure, dimension, and use of material, are possible. The scope of embodiments is at least as broad as given by the following claims.

We Claim:

1. A regulator-rectifier circuit (10) providing a regulated and rectified voltage for charging a battery and/or powering a DC load, the regulator-rectifier circuit being connected to an output of a three-phase alternating current generator (1) for receiving there from three full waveform input AC voltages, the regulator-rectifier comprising:
• a first MOSFET based bridge receiving a first full waveform input AC voltage from the three-phase alternating current generator and comprising a first MOSFET providing a regulated-rectified voltage as output and a second MOSFET acting to shunt the first full waveform input AC voltage;
• a second MOSFET based bridge receiving a second full waveform input AC voltage from the three-phase alternating current generator and comprising a third MOSFET providing a regulated-rectified voltage as output and a fourth MOSFET acting to shunt the second full waveform input AC voltage;
• a third MOSFET based bridge receiving a third full waveform input AC voltage from the three-phase alternating current generator and comprising a fifth MOSFET providing a regulated-rectified voltage as output and a sixth MOSFET acting to shunt the third full waveform input AC voltage;
• a negative cycle detection module adapted to control each of the second, the fourth and the sixth MOSFETs to shunt the input AC voltage during a negative cycle of the first, the second and the third full waveform input AC voltage, respectively;
• a battery voltage detection module adapted to detect a level of battery voltage, the battery voltage detection module being further adapted to control each of the second, the fourth and the sixth MOSFETs to shunt the first, the second and the third input AC voltage if the level of battery voltage thus detected is greater than a first predetermined value; and
• an output monitoring module adapted to detect level of DC voltages as output by the first, the second and the third MOSFET based bridges in a battery-less condition, the output monitoring module being further adapted to control each of the second, the fourth and the sixth MOSFETs to shunt the first, the second and the third input AC voltage if the level of DC voltages as output by the first, the second and the third MOSFET based bridges in the battery-less condition is greater than a second predetermined value.

2. The regulator-rectifier circuit as claimed in claim 1, wherein the negative cycle detection module comprises:
• a first module adapted to generate and provide a first gate pulse signal to the second MOSFET to shunt the input AC voltage during the negative cycle of the first full waveform input AC voltage;
• a second module adapted to generate and provide a second gate pulse signal to the fourth MOSFET to shunt the input AC voltage during the negative cycle of the second full waveform input AC voltage;
• a third module adapted to generate and provide a third gate pulse signal to the sixth MOSFET to shunt the input AC voltage during the negative cycle of the third full waveform input AC voltage; and
• a regulated power generation module coupled to the three phase alternator and being adapted to generate and supply driving power supply to each of the first, the second and the third modules.

3. The regulator-rectifier circuit as claimed in claim 2, wherein the first module comprises a transistor (Q10) having a base, an emitter and a collector terminal; the base terminal being adapted to receive the first full waveform input AC voltage via a first diode (D11) and a driving power supply from the regulated power generation module via a resistor (R24); the emitter terminal being connected to a ground terminal; and the collector terminal being connected to the output terminal via a second diode (D8) such that the resistor (24) maintains the transistor (Q10) in an ON state during a positive cycle of the first full waveform input AC voltage, the first diode (D11) conducts during a negative cycle of the first full waveform input AC voltage thereby brings the transistor (Q10) to an OFF state and the second diode (D8) allows current to flow towards the output terminal when the transistor (Q10) is in the OFF state, thereby generating and providing the first gate pulse signal to the second MOSFET.

4. The regulator-rectifier circuit as claimed in claim 2, wherein the second module comprises a transistor (Q11) having a base, an emitter and a collector terminal; the base terminal being adapted to receive the second full waveform input AC voltage via a first diode (D12) and a driving power supply from the regulated power generation module via a resistor (R26); the emitter terminal being connected to a ground terminal; and the collector terminal being connected to the output terminal via a second diode (D9) such that the resistor (26) maintains the transistor (Q11) in an ON state during a positive cycle of the second full waveform input AC voltage, the first diode (D12) conducts during a negative cycle of the second full waveform input AC voltage thereby brings the transistor (Q11) to an OFF state and the second diode (D9) allows current to flow towards the output terminal when the transistor (Q11) is in the OFF state, thereby generating and providing the second gate pulse signal to the fourth MOSFET.

5. The regulator-rectifier circuit as claimed in claim 2, wherein the third module comprises a transistor (Q12) having a base, an emitter and a collector terminal; the base terminal being adapted to receive the third full waveform input AC voltage via a first diode (D13) and a driving power supply from the regulated power generation module via a resistor (R28); the emitter terminal being connected to a ground terminal; and the collector terminal being connected to the output terminal via a second diode (D10) such that the resistor (28) maintains the transistor (Q12) in an ON state during a positive cycle of the third full waveform input AC voltage, the first diode (D13) conducts during a negative cycle of the third full waveform input AC voltage thereby brings the transistor (Q12) to an OFF state and the second diode (D10) allows current to flow towards the output terminal when the transistor (Q12) is in the OFF state, thereby generating and providing the third gate pulse signal to the sixth MOSFET.

6. The regulator-rectifier circuit as claimed in claim 1, wherein the battery voltage detection module comprises:
• a first gate pulse signal generation unit adapted to generate and provide a first gate pulse to the second MOSFET to shunt the first full waveform input AC voltage;
• a second gate pulse signal generation unit adapted to generate and provide a second gate pulse to the fourth MOSFET to shunt the second full waveform input AC voltage;
• a third gate pulse signal generation unit adapted to generate and provide a third gate pulse to the sixth MOSFET to shunt the third full waveform input AC voltage; and
• a switching module that switches to a conducting state in response to the battery voltage being in excess of the first predetermined value and thereby triggering each of the first, second and the third gate pulse signal generation units to produce first, second and third gate pulse signals, respectively.

7. The regulator-rectifier circuit as claimed in claim 6, wherein the switching module comprises:
a first zener diode (Z6), a second zener diode (Z7) and a first diode (D17) connected in series to a battery terminal; and
a switching transistor (Q13) having a base terminal, an emitter terminal and a collector terminal, the base terminal of the switching transistor (Q13) being connected to the first diode (D17) via a voltage divider circuit, the emitter terminal of the switching transistor (Q13) being connected to a ground and the collector terminal of the switching terminal being connected to the first, the second and the third gate pulse signal generation units;
the first zener diode (Z6), the second zener diode (Z7) and the first diode (D17) along with the voltage divider circuit controlling operation of the switching transistor (Q13) to be in:
• an OFF state, if the voltage at the battery terminal is less than the first predetermined voltage; and
• an ON state, if the voltage at the terminal is greater than the first predetermined voltage.

8. The regulator-rectifier circuit as claimed in claim 6, wherein the first gate pulse signal generation unit comprises:
a diode (D1) receiving the first full waveform input AC voltage;
a first voltage divider circuit (R4, R5 and R6) having a first input and a second input, the first input being connected to the switching module and the second input being connected to the diode (D1); and
a switching transistor (Q7) having a base terminal connected to the first voltage divider circuit, an emitter terminal for receiving a power supply and a collector terminal connected to an output terminal via a second voltage divider circuit (R7 and R8) and a zener diode (Z1).

9. The regulator-rectifier circuit as claimed in claim 6, wherein the second gate pulse signal generation unit comprises:
a diode (D2) receiving the second full waveform input AC voltage;
a first voltage divider circuit (R9, R10 and R11) having a first input and a second input, the first input being connected to the switching module and the second input being connected to the diode (D2); and
a switching transistor (Q8) having a base terminal connected to the first voltage divider circuit, an emitter terminal for receiving a power supply and a collector terminal connected to an output terminal via a second voltage divider circuit (R12 and R13) and a zener diode (Z2).

10. The regulator-rectifier circuit as claimed in claim 6, wherein the third gate pulse signal generation unit comprises:
a diode (D3) receiving the third full waveform input AC voltage;
a first voltage divider circuit (R14, R15 and R16) having a first input and a second input, the first input being connected to the switching module and the second input being connected to the diode (D3); and
a switching transistor (Q9) having a base terminal connected to the first voltage divider circuit, an emitter terminal for receiving a power supply and a collector terminal connected to an output terminal via a second voltage divider circuit (R17 and R18) and a zener diode (Z3).

11. The regulator-rectifier circuit as claimed in claim 1, wherein the output monitoring module comprises:
• a first zener diode (Z5), a second zener diode (Z4) and a first diode (D4) connected in series to an output from the MOSFET based bridges;
• a first switching transistor (Q14) having a base terminal, an emitter terminal and a collector terminal, the base terminal of the switching transistor (Q14) being connected to the first diode (D4) via a voltage divider circuit (R19 and R20), the emitter terminal of the switching transistor (Q14) being connected to a ground and the collector terminal being connected to a voltage calibration circuit (R21, R22);
• the voltage calibration circuit (R21, R22) being connected to the output from the MOSFET based bridges at a first end and to a second switching transistor (Q15) at a second end;
• the second switching transistor (Q15) having a base terminal, an emitter terminal and a collector terminal, the base terminal of the second switching transistor (Q15) being connected to the voltage calibration circuit (R21, R22), an emitter terminal being connected to the output from the MOSFET based bridges and the collector terminal being connected to the second, the fourth and the sixth MOSFETs to shunt the first, the second and the third input AC voltage if the level of DC voltages as output by the first, the second and the third MOSFET based bridges in the battery-less condition is greater than a second predetermined value.

12. The regulator-rectifier circuit as claimed in claim 11, wherein:
• an electrical path between the collector terminal of the second switching transistor (Q15) and the second MOSFET further comprises a diode (D7), control resistors (R17 and R18) and a zener diode (Z3);
• an electrical path between the collector terminal of the second switching transistor (Q15) and the fourth MOSFET further comprises a diode (D6), control resistors (R12 and R13) and a zener diode (Z2); and
• an electrical path between the collector terminal of the second switching transistor (Q15) and the sixth MOSFET further comprises a diode (D5), control resistors (R7 and R8) and a zener diode (Z1).