Claims:1. An ultra-high gain and low noise X band amplifier, the amplifier comprises:
an input matching unit configured to receive a set of RF signals from a source, wherein the input matching unit comprises a first capacitor of a predefined capacitance, a first resistor of predefined resistance, and a first inductor of a predefined inductance, to facilitate impedance matching between the source and the amplifier;
at least three amplification stages comprising a first amplification unit, a second amplification unit, and a third amplification unit, being operatively coupled, wherein each of the at least three amplification stages comprise:
a pseudomorphic high electron mobility transistor (pHEMT) configured to receive the set of RF signals from the input matching unit; and
at least one radio frequency (RF) decoupling element configured with the pHEMT to facilitate isolation between the set of RF signals and DC signals;
wherein the pHEMT of each of the at least three amplification stages enable the at least three amplification stages to amplify the RF signals to a predefined level, and correspondingly generate a set of output signals; and
an inter-stage matching unit configured between each of the at least three amplification stages, to enable impedance matching between the corresponding amplification stages.
2. The amplifier as claimed in claim 1, wherein the at least one RF decoupling elements comprises a second metal insulator metal (MIM) capacitor of predefined capacitance, and a second thin film resistor of predefined resistance.
3. The amplifier as claimed in claim 1, wherein the inter-stage matching unit comprises a third MIM capacitor and a combination of a set of foundry modelled inductor, a third shunt film resistor, and a fourth capacitor, of predefined values, for impedance matching between the corresponding amplification stages.
4. The amplifier as claimed in claim 2, wherein the set of foundry modelled inductor is a split inductor to keep self-resonance frequency of the inductors beyond operational frequency range of the amplifier.
5. The amplifier as claimed in claim 1, wherein the amplifier comprises an output matching unit operatively coupled to the third amplification stage, and wherein the output matching unit comprises a metal transmission line of predefined thickness, a second shunt modelled inductor, a fifth series capacitor, to provide a predetermined gain flatness, and output impedance over the X band frequency ranging from 8-12 Ghz.
6. The amplifier as claimed in claim 1, wherein the amplifier comprises an inductive transmission line having a predefined thickness being configured with the first amplification stage to move the input reflection coefficient closer to gamma opt of the corresponding pHEMT.
7. The amplifier as claimed in claim 1, wherein the first capacitor of the predefined capacitance at an input side of the input matching unit is configured to block DC signals from the first set of signals, and facilitate the input matching network to reduce noise and provide improved input impedance matching in the amplifier.
8. The amplifier as claimed in claim 1, wherein the pHEMT of the third amplification stage has a larger device periphery compared to that of the first amplification stage and the second amplification stage for meeting the output RF power requirements of the amplifier.
9. The amplifier as claimed in claim 1, wherein the amplifier is fabricated on an Indium Gallium Arsenide (InGaAs) substrate with a 0.15 µm gate length process.
10. The amplifier as claimed in claim 1, wherein the amplifier is monolithic and self-biased, and wherein the amplifier is configured with a single power source.
, Description:TECHNICAL FIELD
[0001] The present disclosure relates to the field of amplifier and microwave communication system. More particularly, the present disclosure relates to a monolithic X-Band self-biased three stage low noise amplifier (LNA) with high gain and low noise using InGaAs pHEMT technology to achieve smaller die size, low noise figure and high gain.

BACKGROUND
[0002] Background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
[0003] Low noise amplifiers (LNA) are used to receive weak signals and amplify them. X-band refers to a range of frequencies used in microwave communication which ranges from 8-12 GHz. LNA used in the receiver path plays a key role in ensuring excellent receiver signal sensitivity. It must provide high enough gain to amplify the received signal while adding minimal noise to ensure a high signal-to-noise ratio. Hence for a low noise amplifier it is critical to restrict its noise figure to as low as possible.
[0004] GaAs based monolithic microwave integrated circuits are vastly used in Radar & communication systems because of their high yield and reliable performance. Active electronically scanned array (AESA) RADARs are one such area where low noise amplifiers are used for miniaturizing size as well as improving signal to noise ratio. Transmit/Receive (T/R) modules are the core components of AESA radars, wherein the LNAs used in the receiver path play a key role in ensuring excellent receiver signal sensitivity. Hence for a low noise amplifier intended for use in T/R modules, it is critical to achieve lower size, weight, and power consumption at lower cost.
[0005] Chinese Patent Document Number CN104753470A discloses a single chip low noise amplifier comprising of a one-stage low noise amplification circuit and two stages of high gain amplification circuits. The frequency range is 9GHz-11GHz, the gain is larger than 33.9dB, noise figure is lesser than 0.75dB, input-output standing-wave ratio is smaller than 1.3:1. The LNA is realized on GaAs pHEMT technology. The LNA of the cited document requires multiple gate voltages for biasing and achieving the performance parameters. The cited prior art document techniques to achieve low noise figure, high gain and low die size, but does not detail the techniques to achieve the same without the need for gate biasing.
[0006] The United States Patent Document Number US 20160190991A1 discloses a low noise amplifier which aims to increase the gain of the amplifier without increasing power consumption. This is achieved by increasing transconductance and output resistance by current re-usage to first stage and the cascaded stage. The invention is intended for realization on Silicon technology which shall aid in current re-use through the required biasing methods. It is intended for use in RF front-end receivers such as GPS receivers. The cited prior art document provides ways to increase gain, but it requires the use of silicon technology and may not be suitable for long range microwave applications.
[0007] The PCT Document Number WO 2011011754Al discloses a multi-mode low noise amplifier (LNA) with transformer source degeneration. It incorporates technique of using inductors at source of the NMOS devices in each stage of the LNA to improve linearity. This is mainly intended for use in wireless applications such as Bluetooth, Wifi, PDAs and mobile handsets. The technology used is Silicon. The technique of source degeneration used in multi stage amplifiers in Silicon technology may not be suitable for direct application at microwave frequencies, long range applications such as RADAR. The cited prior art document discloses the use of transformer source degeneration in multistage LNAs. However, it increases complexity and requires the use of Silicon technology.
[0008] The United States Patent Document US9641130 discloses Low noise amplifier with noise and linearity improvement. A low noise amplifier (LNA) has been disclosed for the noise and linearity performance improvement. The LNA includes an amplifying transistor and an auxiliary transistor. However, the frequency of operation is 0.5 to 4 GHz and requires two different technologies i.e BJT/HBT as an amplifying transistor and MOSFET/PHEMT as an auxiliary transistor.
[0009] Therefore, there is a need in the art for a monolithic X-Band self-biased three stage LNA with high gain and low noise using InGaAs pHEMT technology to achieve smaller die size, low noise figure and high gain, specifically for use in T/R modules wherein size, weight, power and cost requirements are critical.

OBJECTS OF THE PRESENT DISCLOSURE
[0010] Some of the objects of the present disclosure, which at least one embodiment herein satisfies are as listed herein below.
[0011] It is an object of the present disclosure to provide an ultra-high gain and very low noise figure 3-stage self–biased X-band low noise amplifier.
[0012] It is an object of the present disclosure to provide an ultra-high gain and very low noise figure 3-stage self–biased X-band low noise amplifier, which is self-biased, light weight compact, and power efficient.
[0013] It is an object of the present disclosure to provide input matching in the amplifier for optimum noise figure match.
[0014] It is an object of the present disclosure to retain self-resonance frequency of inductors used in the amplifier beyond an operational frequency range.
[0015] It is an object of the present disclosure to provide inter-stage matching RLC networks for better gain flatness over a broader frequency range and for better impedance match.

SUMMARY
[0016] The present disclosure relates to the field of amplifier and microwave communication system. More particularly, the present disclosure relates to a monolithic X-Band self-biased three stage low noise amplifier (LNA) with high gain and low noise using InGaAs pHEMT technology to achieve smaller die size, low noise figure and high gain.
[0017] An aspect of the present disclosure pertains to an ultra-high gain and low noise X band amplifier, the amplifier comprises: an input matching unit configured to receive a set of RF signals from a source, wherein the input matching unit may comprise a first capacitor of a predefined capacitance, a first resistor of predefined resistance, and a first inductor of a predefined inductance, to facilitate impedance matching between the source and the amplifier; at least three amplification stages comprising a first amplification unit, a second amplification unit, and a third amplification unit, being operatively coupled, wherein each of the at least three amplification stages may comprise: a pseudomorphic high electron mobility transistor (pHEMT) configured to receive the first set of signals from the input matching unit; and at least one radio frequency (RF) decoupling element configured with the pHEMT to enhance isolation between DC signals and the set of RF signals; wherein the pHEMT of each of the at least three amplification stages may enable the at least three amplification stages to amplify the set of RF signals to a predefined level, and correspondingly generate a set of output signals; and an inter-stage matching unit configured between each of the at least three amplification stages, to enable impedance matching between the corresponding amplification stages.
[0018] In an aspect, the at least one RF decoupling elements may comprise a second metal insulator metal (MIM) capacitor of predefined capacitance, and a second thin film resistor of predefined resistance.
[0019] In an aspect, the inter-stage matching unit may comprise a third MIM capacitor and a combination of a set of foundry modelled inductor, a third shunt film resistor, and a fourth capacitor, of predefined values, for impedance matching between the corresponding amplification stages.
[0020] In an aspect, the set of foundry modelled inductor may be a split inductor to keep self-resonance frequency of the inductors much beyond operational frequency range of the amplifier.
[0021] In an aspect, the amplifier may comprise an output matching unit operatively coupled to the third amplification stage, and wherein the output matching unit may comprise a metal transmission line of predefined thickness, a second shunt modelled inductor, a fifth series capacitor, to provide a predetermined gain flatness, and output impedance over the X band frequency ranging from 8-12 GHz.
[0022] In an aspect, the amplifier may comprise an inductive transmission line having a predefined thickness being configured with the first amplification stage to move the input reflection coefficient closer to gamma opt of the corresponding pHEMT.
[0023] In an aspect, the first capacitor of the predefined capacitance at an input side of the input matching unit may be configured to block DC signals from the first set of signals, and may facilitate the input matching network to reduce noise and provide improved input impedance matching in the amplifier.
[0024] In an aspect, the pHEMT of the third amplification stage may have a larger device periphery compared to that of the first amplification stage and the second amplification stage for meeting the output RF power requirements of the amplifier.
[0025] In an aspect, the amplifier may be fabricated on an InGaAs substrate with a 0.15 µm gate length process.
[0026] In an aspect, the amplifier may be monolithic and self-biased, and wherein the amplifier may be configured with a power source.

BRIEF DESCRIPTION OF THE DRAWINGS
[0027] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
[0028] The diagrams are for illustration only, which thus is not a limitation of the present disclosure, and wherein:
[0029] FIG. 1 illustrates an architecture of the proposed amplifier, in accordance with an embodiment of the present invention.
[0030] FIG. 2 illustrates an exemplary layout of the proposed amplifier, in accordance with an embodiment of the present invention.
[0031] FIG. 3 illustrates self resonance frequency (SRF) of multiple inductors.

DETAILED DESCRIPTION
[0032] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure as defined by the appended claims.
[0033] Various terms as used herein are shown below. To the extent a term used in a claim is not defined below, it should be given the broadest definition persons in the pertinent art have given that term as reflected in printed publications and issued patents at the time of filing.
[0034] In some embodiments, the numerical parameters set forth in the written description and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by a particular embodiment. In some embodiments, the numerical parameters should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of some embodiments of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as practicable. The numerical values presented in some embodiments of the invention may contain certain errors necessarily resulting from the standard deviation found in their respective testing measurements.
[0035] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0036] The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[0037] Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all groups used in the appended claims.
[0038] The present disclosure relates to the field of amplifier and microwave communication system. More particularly, the present disclosure relates to a monolithic X-Band self-biased three stage low noise amplifier (LNA) with high gain and low noise using InGaAs pHEMT technology to achieve smaller die size, low noise figure and high gain.
[0039] An aspect of the present disclosure pertains to an ultra-high gain and low noise X band amplifier, the amplifier includes: an input matching unit configured to receive a set of RF signals from a source, wherein the input matching unit can include a first capacitor of a predefined capacitance, a first resistor of predefined resistance, and a first inductor of a predefined inductance, to facilitate impedance matching between the source and the amplifier; at least three amplification stages including a first amplification unit, a second amplification unit, and a third amplification unit, being operatively, wherein each of the at least three amplification stages can include: a pseudomorphic high electron mobility transistor (pHEMT) configured to receive the first set of signals from the input matching unit; and at least one radio frequency (RF) decoupling element configured with the pHEMT to enhance isolation between DC signal and the set of RF signals; wherein the pHEMT of each of the at least three amplification stages can enable the at least three amplification stages to amplify the set of RF signals to a predefined level, and correspondingly generate a set of output signals; and an inter-stage matching unit configured between each of the at least three amplification stages, to enable impedance matching between the corresponding amplification stages.
[0040] In an embodiment, the at least one RF decoupling elements can include a second metal insulator metal (MIM) capacitor of predefined capacitance, and a second thin film resistor of predefined resistance.
[0041] In an embodiment, the inter-stage matching unit can include a third MIM capacitor and a combination of a set of foundry modelled inductor, a third shunt film resistor, and a fourth capacitor, of predefined values, for impedance matching between the corresponding amplification stages.
[0042] In an embodiment, the set of foundry modelled inductor can be a split inductor to keep self-resonance frequency of the inductors much beyond operational frequency range of the amplifier.
[0043] In an embodiment, the amplifier can include an output matching unit operatively coupled to the third amplification stage, and wherein the output matching unit can include a metal transmission line of predefined thickness, a second shunt modelled inductor, a fifth series capacitor, to provide a predetermined gain flatness, and output impedance over the X band frequency ranging from 8-12 Ghz.
[0044] In an embodiment, the amplifier can include an inductive transmission line having a predefined thickness being configured with the first amplification stage to move the input reflection coefficient closer to gamma opt of the corresponding pHEMT.
[0045] In an embodiment, the first capacitor of the predefined capacitance at an input side of the input matching unit can be configured to block DC signals from the first set of signals, and can facilitate the input matching network to reduce noise and provide improved input impedance matching in the amplifier.
[0046] In an embodiment, the pHEMT of the third amplification stage can have a larger device periphery compared to that of the first amplification stage and the second amplification stage for meeting the output RF power requirements of the amplifier.
[0047] In an embodiment, the amplifier can be fabricated on an InGaAs substrate with a 0.15 µm gate length process.
[0048] In an embodiment, the amplifier can be monolithic and self-biased, and wherein the amplifier can be configured with a power source.
[0049] FIG. 1 illustrates an architecture of the proposed amplifier, in accordance with an embodiment of the present invention.
[0050] FIG. 2 illustrates an exemplary layout of the proposed amplifier, in accordance with an embodiment of the present invention.
[0051] As illustrated in FIG. 1 and 2, the proposed ultra-high gain and low noise amplifier 100 is disclosed. The amplifier 100 can include three amplification stages including a first amplification unit 102, a second amplification unit 104, and a third amplification unit 106. In an embodiment, each of the three amplification stages can include a pseudomorphic high electron mobility transistor (pHEMT) that can be configured to receive the set of RF signals from a source through an input matching unit 101. Further, at least one radio frequency (RF) decoupling element can be configured with the pHEMT to enhance isolation between DC signals and the set of RF signals. The pHEMT associated with each of the three amplification stages can facilitate the amplifier 100 to amplify the set of RF signals to a predefined level, and correspondingly generate a set of output signals.
[0052] In an implementation, the amplifier 100 with the three stages of amplification and a die size less than 2.8 mm x 1.5 mm, can be fabricated on an InGaAs substrate using 0.15 um gate length process.
[0053] In an embodiment, the amplifier 100 can include the input matching unit 101 configured to receive the first set of signals from a source. The input matching unit 101 can include a first capacitor of a predefined capacitance, a first thin film resistor of predefined resistance, and a first inductor of a predefined inductance, to facilitate impedance matching between the source and the amplifier. The design architecture of the amplifier 100 can include the input matching unit 101 that consists of a Metal insulator metal capacitor, a thick metal layer transmission line, and an inductor as input to the first amplification stage 102 pHEMT.
[0054] In an exemplary embodiment, as part of the input matching unit 101, one shunt inductor with shunt thin film resistor and MIM capacitor can be connected to backside via for low frequency stability. In an exemplary embodiment, a low value capacitor C1 (< 1 pF) can be configured at the input, which blocks the DC as well as acts as part of the input matching network to achieve better noise figure and input impedance match.
[0055] In an embodiment, the first amplification stage 102 amplifying pHEMT source can have a thick metal transmission line 216 (see FIG. 2) that helps to move the input reflection coefficient closer to the gamma opt of the pHEMT. The transmission line can further connect a thin film resistor to the ground. The source transmission line can be connected to a RF decoupling element that bypass low and high frequency signals to the ground. In an implementation, a decoupling capacitor can be connected to the ground. Drain line of the first amplification stage 102 can include a modelled inductor, thick metal transmission line and decoupling elements. In the drain line, an MIM capacitor along with a thin film resistor to the ground, which provides low frequency stability. These decoupling elements enhances isolation between the RF and DC signals.
[0056] In an embodiment, the second amplification stage 104 pHEMT, drain and gate bias traces can have the decoupling elements for filtering out high and low frequency signals as well for ensuring better stability.
[0057] In an embodiment, the third amplification stage 106 pHEMT can have a larger device periphery compared to the first & second stages (102, 104) for meeting the output RF power requirements of the low noise amplifier 100. The drain and gate bias traces in the third amplification stage 106 can also have decoupling elements which can be a combination of metal insulator metal capacitor, thin film resistor and backside.
[0058] In an embodiment, inter-stage matching unit (103, 105) can be configured between each of the at least three amplification stages (102, 104, 106), to enable impedance matching between the corresponding amplification stages. In an embodiment, the inter-stage matching unit 103, 105 can include a third MIM capacitor and a combination of a set of foundry modelled inductor, a second shunt film resistor, and a fourth capacitor, of predefined values, for impedance matching between the corresponding amplification stages.
[0059] In an embodiment, the set of foundry modelled inductor can be a split inductor to keep self-resonance frequency of the inductors within operational frequency range of the amplifier.
[0060] In an embodiment, the amplifier 100 can include an output matching unit 107 operatively coupled to the third amplification stage 106, where the output matching unit 107 can include a metal transmission line of predefined thickness, a second shunt modelled inductor, a fifth series capacitor, to provide a predetermined gain flatness, stability, and output impedance over the X band frequency range.
[0061] In an embodiment, the amplifier 100 can include an input (RFIN) port operatively coupled to the input matching unit to allow the amplifier to receive the first set of signals for further processing by the amplifier 100. In another embodiment, the amplifier can include an output (RFOUT) port operatively coupled to the output matching unit 107 to allow the amplifier to transmit the generated output signals.
[0062] In an exemplary embodiment, the on-chip DC blocking capacitors can be placed at the RFIN & RFOUT ports, and are matched to 50-ohm impedance. All the RF signal transmission lines can be thick metal layers with combination of MET1, 1 µm thickness and Met2, 2 µm thickness. 100 µm x 100 µm bond pads are used at the RFIN, RFOUT and DC for interfacing with the outside circuitry.
[0063] In an implementation, the proposed amplifier 100 provided following features:
a. X band operating frequency range.
b. RF Input power handling of +23 dBm.
c. 3V single drain supply operation with typical 70 mA of current.
d. High gain of minimum 29 dB gain over the X band frequency range.
e. 1.1 dB Typ. noise figure in the X band frequency range.
f. Output 1 dB compression point of +10 dBm typical over the X band frequency range.
g. Input & output return losses better than 10 dB over the X band operating frequency range.
h. Gain Flatness less than ± 0.5dB over the X band operating frequency range.
+20 dBm of typical OIP3 over the X band frequency range.
[0064] As illustrated in FIG. 2, in an embodiment, shunt capacitors of higher value can be configured in series (that effectively have lesser capacitance value) in the intermediate and output matching unit (210, 211, 212) to make the design less sensitive to foundry process variation and ensures better reliability.
[0065] In an exemplary embodiment, the 3 stage LNA in which each stage is pHEMT based, the first stage pHEMT 201 and second stage pHEMT 202 are four fingered with 50 µm width device and the third stage pHEMT 203 is four fingered with 75 µm width device size with gate lengths of 0.15µm.
[0066] In an embodiment, the amplifier can be configured as a self biased amplifier by utilizing resistors R1 (204), R2 (205), R3 (206) between the source and the ground of the first, second & third pHEMT amplification stages.
[0067] In an embodiment, very small value of 6-8 O thin film resistors can be configured between the capacitor and the backside via (213, 214, 215) in the biasing circuit for better low frequency stability.
[0068] FIG. 3 illustrates self resonance frequency (SRF) response of multiple inductors.
[0069] In an embodiment, the split inductor technique (207, 208, 209) has been used in the inter-stage network (103,105) of the proposed amplifier to ensure that the self-resonance frequency of the inductors are well beyond the LNA's operational frequency range.
[0070] As illustrated in FIG. 3, the SRF response of the split inductor (207, 208, 209) is shown. The FIG. 3 demonstrates the advantage of using multiple lower-value inductors in series in shifting the self resonance frequency well above the frequency band of operation. Instead of using a single 1.7nH modelled inductor (whose SRF is closer to the required frequency of operation), lower value of modelled inductors (1.2nH & 0.46 nH) -- realised by two metal transmission layers MET1 with thickness 1µm, and MET2 with 2µm thick metal layers have been used in the proposed amplifier to shift the SRF far away from the LNA's operating frequency band.
[0071] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention can be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.

ADVANTAGS OF THE INVENTION
[0072] The proposed invention provides an ultra-high gain and very low noise figure 3-stage self–biased X-band low noise amplifier.
[0073] The proposed invention provides an ultra-high gain and very low noise figure 3-stage self–biased X-band low noise amplifier, which is self-biased, light weight compact, and power efficient.
[0074] The proposed invention provides input matching in the amplifier for optimum noise figure match.
[0075] The proposed invention retains self-resonance frequency of inductors used in the amplifier beyond an operational frequency range.
[0076] The proposed invention provides inter-stage matching RLC networks for better gain flatness over a broader frequency range and for better impedance match.