Abstract: A validation system for testing a device, said system comprising: - analog circuit hardware component connected to the device under test, said analog circuit hardware component adapted to vary the parameters of the circuit under test; - a Digital to Analog converter adapted to convert digital signals provided by said system, controlled by a user, to control said analog circuit hardware component; - microcontroller adapted to provide system signals to said analog component via said Digital to Analog converter, said signals relating to phase and gain variation to test power factor and reactive power of the device under test; - measurement means adapted to measure power factor values and reactive power values of said device wherein, the device under test is connected, in turn, to said microcontroller in order to provide feedback of its variations in relation to said power factor values and said reactive power values for storage and assessment by said microcontroller to test for reliability of said device.
FORM 2
THE PATENTS ACT, 1970
(39 of 1970)
As amended by the Patents (Amendment) Act, 2005
AND
The Patents Rules, 2003
As amended by the Patents (Amendment) Rules, 2005
COMPLETE SPECIFICATION
(See section 10 and rule 13)
TITLE OF THE INVENTION
Validation system for testing a device
APPLICANTS :
Crompton Greaves Limited, CG House, Dr Annie Besant Road, Worli, Mumbai 400 030, Maharashtra, India, an Indian Company
INVENTOR (S):
Kulkarni Shrikrishna of 2, Smruti, Pestom Sagar Road No. 4, Chembur, Mumbai 400089, Maharashtra, India; Namjoshi Yogendra, Vaidya Tushar, Mahajan Ramakant and Pereira Mario all of Crompton Greaves Ltd, CG Global R&D Center, Crompton Greaves Limited, Kanjur Marg, Mumbai 400 042, Maharashtra, India; all Indian National.
PREAMBLE TO THE DESCRIPTION:
The following specification particularly describes the nature of this invention and the manner in which it is to be performed:
Field of the Invention:
This invention relates to the field of power electronics and information systems.
Particularly, this invention relates to validation and testing systems.
Still particularly, this invention relates to validation system for testing a system/device.
Background of the Invention:
A Static VAR (Volt-ampere reactive) Compensator (or SVC) is an electrical device for compensating reactive power on high-voltage electricity transmission networks. Similarly, a static synchronous compensator (STATCOM) is a reactive power regulating device used on alternating current electricity transmission networks.
For the purpose of this invention, a 'device' is meant to include, but not be limited to, universal static compensator controllers, Static VAR Compensator (or SVC), mechanical switched capacitor controller, thyristor switched capacitor controller, and STATCOM.
To test such a device, it is essential to test it with reactive power and power factor load. Parameters relating to reactive power changes and power factor changes for a device need to be changed and monitored in order to test said device(s).
It was seen that, according to the prior art, the devices are subject to testing it on high loads. The previous/conventional panels required for testing has high energy requirements and high power factors.
Previous testing equipment involving panels also required a larger work area.
For use in such conditions and load, it is important that these devices be tested for their rating, health and functionality.
Prior art:
The prior art includes standard final testing of the product through panel. Currently, the testing of such devices is done through the use of standard load banks and actual panels. It is a tedious and cumbersome method to test.
US3 808409 refers to a Load flow computer and DC circuit modules empolyed therein for simulating AC electric power networks. In this, a hybrid loadflow computer arrangement includes a modularized analog network simulator and a digital computer which acquires and processes on-line data and operator data related to the power system for which a loadflow problem is being solved.
There is no prior art explaining a desktop based validation technique.
Objects of the Invention:
An object of the invention is to expedite quality check of devices
Another object of the invention is to eliminate the tedious methods of testing the device (s) using standard load banks and actual panels.
Yet another object of the invention is to avoid high loads and high energy consumption for testing purposes.
Still another object of the invention is to provide a space saving testing assembly.
Summary of the Invention:
According to this invention, there is provided a validation system for testing a device, said system comprises:
- analog circuit hardware component connected to the device under test, said analog circuit hardware component adapted to vary the parameters of the circuit under test;
- a Digital to Analog converter adapted to convert digital signals provided by said system, controlled by a user, to control said analog circuit hardware component;
- microcontroller adapted to provide system signals to said analog component via said Digital to Analog converter, said signals relating to phase and gain variation to test power factor and reactive power of the device under test;
- measurement means adapted to measure power factor values and reactive power values of said device
wherein, the device under test is connected, in turn, to said microcontroller in order to provide feedback of its output in relation to said power factor values and said
reactive power values for storage and assessment by said microcontroller to test for reliability of said device.
Typically, said system is communicably coupled to a Personal Computer.
Typically, said analog circuit hardware component includes a potentiometer adapted to vary power factor of said device.
Typically said analog circuit hardware component includes a potentiometer adapted to vary reactive power of said device.
Typically, said system includes a first database means adapted to store reference values of power factor and reactive power for assessing measured values.
Typically, said system includes an amplifier for amplifying said signals in accordance with pre-defined parameters before being fed to said device.
Brief Description of the Accompanying Drawings:
The invention will now be described in relation to the accompanying drawings, in which:
Figure 1 illustrates a schematic of the system along with its connections to a PC and device;
Figure 2 illustrates analog circuit hardware component of Figure 1; and
Figure3 illustrates Power Factor (PF) and Reactive Power (KVA) vector calculations used by the system.
Detailed Description of the Accompanying Drawings:
According to this invention, a validation system is provided for testing a device.
Figure 1 illustrates a schematic of the system along with its connections to a PC and device.
In accordance with an embodiment of this invention, an analog circuit (A) is provided (as illustrated in Figure 2). This is to be connected to the device under test (C). The analog component is adapted to vary the parameters of the circuit under test. The analog component is connected to a single phase or three phase power supply. This includes potentiometers connected to the device.
In accordance with another embodiment of this invention, a Digital to Analog converter (DAC) is provided to convert digital signals generated by the system which is controlled by a user, to control the analog circuit hardware component.
In accordance with still another embodiment of this invention, there is provided a microcontroller (MC) adapted to provide system signals to said analog component
via said DAC. Preferably, these signals are amplified by an amplifier of the system, before being fed to the device.
The signals relate to phase and gain variation to test power factor and reactive power of the device under test.
In accordance with still another embodiment of this invention, there is provided a measurement means adapted to measure power factor values and reactive power values of said device
Preferably, said system (100) is connected to a Personal Computer (PC) via USB or the like communication medium.
The device under test is connected, in turn, to said microcontroller in order to provide feedback (FB) of its variations in relation to power factor and reactive power. The variations are stored and assessed by the microcontroller to test for reliability of the device. The behaviour depends on the type of static compensator or device. The hardware also provides feedback compensated power factor and compensated reactive power after controller's output. This is logged into the system. The system can generate a detailed report regarding the universal static compensator or device. There can be numerous tests including step test, random test, simulated factory test and the like.
Figure 3 illustrates Power Factor (PF) and Reactive Power (KVA) vector calculations used by the system.
Voltage AO is voltage reference and PO is current reference.
So for given power factor, value R of resistor can be computed by measuring frequency ω with known capacitor value C. Similarly current signal PO is further multiplied by an amplifier to give desired KVA rating. By changing R and gain of the amplifier desired pf and KVA signal is generated.
While this detailed description has disclosed certain specific embodiments of the present invention for illustrative purposes, various modifications will be apparent to those skilled in the art which do not constitute departures from the spirit and scope of the invention as defined in the following claims, and it is to be distinctly understood that the foregoing descriptive matter is to be interpreted merely as illustrative of the invention and not as a limitation.
We claim,
1. A validation system for testing a device, said system comprising:
- analog circuit hardware component connected to the device under test, said analog circuit hardware component adapted to vary the parameters of the circuit under test;
- a Digital to Analog converter adapted to convert digital signals provided by said system, controlled by a user, to control said analog circuit hardware component;
- microcontroller adapted to provide system signals to said analog component via said Digital to Analog converter, said signals relating to phase and gain variation to test power factor and reactive power of the device under test;
- measurement means adapted to measure power factor values and reactive power values of said device
wherein, the device under test is connected, in turn, to said microcontroller in order to provide feedback of its variations in relation to said power factor values and said reactive power values for storage and assessment by said microcontroller to test for reliability of said device.
2. A system as claimed in claim 1 wherein, said system is communicably coupled to a Personal Computer.
3. A system as claimed in claim 1 wherein, said analog circuit hardware device includes at least a potentiometer adapted to vary power factor of said device.
4. A system as claimed in claim 1 wherein, said analog circuit hardware component includes at least a potentiometer adapted to vary reactive power of said device.
5. A system as claimed in claim 1 wherein, said system includes a first database means adapted to store reference values of power factor and reactive power for assessing measured values.
6. A system as claimed in claim 1 wherein, said system includes a second database means adapted to store combinations of variations of signals for testing said device for a variety of tests.
7. A system as claimed in claim 1 wherein, said system includes an amplifier for amplifying said signals in accordance with pre-defined parameters before being fed to said device.
| # | Name | Date |
|---|---|---|
| 1 | 197-MUM-2011 AFR (06-07-2011).pdf | 2011-07-06 |
| 1 | 197-MUM-2011-AbandonedLetter.pdf | 2018-08-10 |
| 2 | abstract1.jpg | 2018-08-10 |
| 2 | 197-mum-2011-abstract.doc | 2018-08-10 |
| 3 | 197-MUM-2011-FORM 9(16-6-2011).pdf | 2018-08-10 |
| 3 | 197-mum-2011-abstract.pdf | 2018-08-10 |
| 4 | 197-mum-2011-form 3.pdf | 2018-08-10 |
| 5 | 197-MUM-2011-FORM 26(14-3-2011).pdf | 2018-08-10 |
| 5 | 197-mum-2011-claims.pdf | 2018-08-10 |
| 6 | 197-mum-2011-form 2.pdf | 2018-08-10 |
| 6 | 197-MUM-2011-CORRESPONDENCE(14-3-2011).pdf | 2018-08-10 |
| 7 | 197-MUM-2011-CORRESPONDENCE(16-6-2011).pdf | 2018-08-10 |
| 8 | 197-mum-2011-form 2(title page).pdf | 2018-08-10 |
| 8 | 197-MUM-2011-CORRESPONDENCE(21-4-2011).pdf | 2018-08-10 |
| 9 | 197-MUM-2011-FORM 18(16-6-2011).pdf | 2018-08-10 |
| 9 | 197-mum-2011-correspondence.pdf | 2018-08-10 |
| 10 | 197-mum-2011-description(complete).pdf | 2018-08-10 |
| 10 | 197-mum-2011-form 1.pdf | 2018-08-10 |
| 11 | 197-mum-2011-drawing.pdf | 2018-08-10 |
| 11 | 197-MUM-2011-FORM 1(21-4-2011).pdf | 2018-08-10 |
| 12 | 197-MUM-2011-FER.pdf | 2018-08-10 |
| 13 | 197-mum-2011-drawing.pdf | 2018-08-10 |
| 13 | 197-MUM-2011-FORM 1(21-4-2011).pdf | 2018-08-10 |
| 14 | 197-mum-2011-description(complete).pdf | 2018-08-10 |
| 14 | 197-mum-2011-form 1.pdf | 2018-08-10 |
| 15 | 197-mum-2011-correspondence.pdf | 2018-08-10 |
| 15 | 197-MUM-2011-FORM 18(16-6-2011).pdf | 2018-08-10 |
| 16 | 197-MUM-2011-CORRESPONDENCE(21-4-2011).pdf | 2018-08-10 |
| 16 | 197-mum-2011-form 2(title page).pdf | 2018-08-10 |
| 17 | 197-MUM-2011-CORRESPONDENCE(16-6-2011).pdf | 2018-08-10 |
| 18 | 197-MUM-2011-CORRESPONDENCE(14-3-2011).pdf | 2018-08-10 |
| 18 | 197-mum-2011-form 2.pdf | 2018-08-10 |
| 19 | 197-MUM-2011-FORM 26(14-3-2011).pdf | 2018-08-10 |
| 19 | 197-mum-2011-claims.pdf | 2018-08-10 |
| 20 | 197-mum-2011-form 3.pdf | 2018-08-10 |
| 21 | 197-MUM-2011-FORM 9(16-6-2011).pdf | 2018-08-10 |
| 21 | 197-mum-2011-abstract.pdf | 2018-08-10 |
| 22 | abstract1.jpg | 2018-08-10 |
| 23 | 197-MUM-2011-AbandonedLetter.pdf | 2018-08-10 |
| 23 | 197-MUM-2011 AFR (06-07-2011).pdf | 2011-07-06 |
| 1 | 197mum2011searchstrategy_23-12-2016.pdf |