Claims:1. An apparatus (100) for high-end computing systems, said apparatus comprising:
a chassis adapted to receive one or more versatile performance switching (VPX) modules (104, 106, 108, 110, 112) arranged orthogonally in a backplane assembly (102), said one or more VPX modules are interconnected to each other; and
a data interchange switch (114) configured in the backplane assembly, and adapted to support the one or more VPX modules (104, 106, 108, 110, 112) with different slot profiles without modifying the backplane assembly for each slot profile.
2. The apparatus as claimed in claim 1, wherein the back-plane assembly is a multiple-slot VPX backplane.
3. The apparatus as claimed in claim 1, wherein said one or more VPX modules comprises power supply module (104), two computing modules (106, 110), I/O module (108) and graphics processing module (112).
4. The apparatus as claimed in claim 1, wherein the apparatus comprises payload slot that accepts one or more VPX modules of different slot profiles, wherein the different slot profiles comprise fat-pipe module profile, dual ultra-thin pipe module profile and any combination thereof.
5. The apparatus as claimed in claim 1, wherein, at fat-pipe module profile, a high-speed interface (118) from the first single-board computer (106) is connected to the data interchange switch (114), said switch (114) multiplexes the high-speed interfaces between the single board computer and other VPX modules and peripheral modules (120).
6. The apparatus as claimed in claim 1, wherein, at the dual ultra-thin pipe module profile, the high-speed interface (118) from the first single board computer (106) connected to the VPX modules and the peripheral modules directly by bypassing the data interchange switch (114).
7. The apparatus as claimed in claim 1, wherein the peripheral modules (120) configured in the apparatus, the peripheral modules is upgraded without modifying the backplane assembly.
8. The apparatus as claimed in claim 7, wherein the presence or absence of the peripheral modules does not affect the operating state of the other VPX modules.
9. The apparatus as claimed in claim 1, wherein the apparatus comprises standardized connectors and standard interfaces for interconnection that allows for upgrades of all the modules, wherein the standardized connectors are arranged in such a way that when the one or more VPX modules are engaged therewith, the overall routing length is met as per protocol requirements and heat loads are evenly distributed across the apparatus.
10. The apparatus as claimed in claim 1, wherein the data interchange switch (114) supports higher bandwidth and more ports, where different permutations and combinations of the routing is possible for other data pipe configurations.

, Description:TECHNICAL FIELD
[0001] The present disclosure relates, in general, to VPX framework, and more specifically, relates to a VPX based motherboard.

BACKGROUND
[0002] The embedded computing industry serves markets needing ruggedized products requiring data plane interconnect technologies, which more closely follow the industry state of the art. VPX standard helps us leverage a broad spectrum of high-speed interconnect technologies. It enables heterogeneous architectures so that previous investments in commercial off-the-shelf (COTS)-based systems can be retained. The major difference between a backplane and motherboard is that backplanes are usually passive and very few active components. They do not have any processing elements. Motherboards provide the interconnect functionality of the backplane and have active processing elements. Thus, they provide more functionality features than a backplane.
[0003] An example of such backplane system is recited in a patent US 6,932,617 B2. The patent describes the backplane system allowing a very large number of inter connections between high-connectivity printed circuit boards and a backplane. The backplane is fragmented into a plurality of backplane parts that comprise connectors on their edges to mate connectors arranged on the high-connectivity printed circuit boards. These back plane parts may also include other connectors on their edges to couple to extension printed circuit boards requiring less interconnections or cables. Interposers can be used to link several backplane parts and provide enhanced air circulation. However, the disclosed backplane system discloses fragmenting of a backplane into multiple boards to reduce the backplane size.
[0004] Another example of such backplane system is recited in US 2017/0052920 A1. The patent describes an apparatus that can include a first interface configured to connect to a backplane operable according to an open VPX specification, wherein the back plane has a first profile. The apparatus can also include a second interface configured to connect to a module operable according to the open VPX specification, wherein the module has a second profile. The apparatus can further include circuitry configured to permit communication between the first interface and the second interface according to the open VPX specification. The circuitry can be configurable to adapt the module to communicate with the backplane when the first profile does not match the second profile. However, the existing apparatus describes a VPX backplane that uses an interposer card to enable using modules with different slot profiles.
[0005] The patent WO 01/93650 A1 include a set of modules from which custom passive backplanes can be assembled co-planarly couple together and are mounted on a rigid base plate which holds them coupled and coplanar. Each module has a plurality of orthogonally oriented card connectors. Preferably there is a CPU module into which is plugged a CPU card from which an ISA bus and a PCI bus originates. However, the apparatus describes a passive backplane architecture that provides connectivity between the modules and is also configurable according to the user needs. This is achieved by making the backplane itself into sub-modules and then populating the required sub-modules.
[0006] Yet another example is recited in US 2015/0294434 A1, that relates to a graphics card adapter that includes a printed circuit board (PCB) having a PCI Express (PCI-E) interface for transferring graphics information via a PCI-E bus, and a plurality of Mobile PCI Express Module (MXM) connectors coupled to the PCB engaging with graphics cards having a corresponding MXM interface. The graphics card adapter further includes a Switch arranged on the PCB which configures a graphics bus between the Switch and each of the graphics cards via the corresponding MXM interface, wherein each of the graphics bus is configured to have a substantially equal bandwidth, and wherein the switch multiplexes the PCI-E bus between each of the graphics busses. The disclosed apparatus describes an adapter PCB for MXM cards that uses on board PCIe switch for configuring the connection between the MXM modules.
[0007] Although multiple apparatus and system exists today, these apparatus and system suffer from significant drawbacks. Therefore, it is desired to develop a simple and cost-effective means that ensures that the same backplane can used for different module profile topologies, without the need for system redesign.

OBJECTS OF THE PRESENT DISCLOSURE
[0008] An object of the present disclosure relates, in general, to VPX framework, and more specifically, relates to a VPX based motherboard.
[0009] Another object of the present disclosure is to provide an apparatus with backplane that allows multiple routing topologies for the high-speed interconnect based on the module slot profile.
[0010] Another object of the present disclosure provides a unique arrangement of modules on the backplane to ensure optimal routing for high-speed interconnects.
[0011] Another object of the present disclosure is to provide an apparatus with the backplane that facilitates the modular nature so that all modules can be populated based on the requirement. The interfaces used are standard, these can be upgraded without redesign.
[0012] Yet another object of the present disclosure is to provide an apparatus that is optimally placed to ensure the most effective thermal management.

SUMMARY
[0013] The present disclosure relates, in general, to VPX framework, and more specifically, relates to a VPX based motherboard.
[0014] Existing apparatus typically fragments the backplane into multiple boards to reduce the backplane size or use an interposer card to enable using modules with different slot profiles. The main objective of the present disclosure is to solve the technical problem as recited above by ensuring that the same backplane can be used for different module profile topologies, without the need for redesign. The present disclosure employs the use of a data interchange switch to ensure the VPX modules with different slot profiles can be used without the need for redesigning the backplane for each slot profile. The backplane is designed to facilitate the modular nature of the apparatus by ensuring individual modules can be replaced or upgraded without affecting other sub-systems.
[0015] The present disclosure aims at providing the architecture of the backplane that allows multiple routing topologies for the high-speed interconnect based on the module slot profile. The proposed solution uses a unique arrangement of modules on the backplane to ensure optimal routing for high-speed interconnects. An electronic circuit with proprietary fused software for thermal management of the apparatus by monitoring the temperature at optimum locations and enabling cooling fan. The backplane facilitates the modular nature of the apparatus so that all modules can be populated based on the requirement. The interfaces used are standard, these can be upgraded also in future without the need for redesign. The modules are populated on the backplane in such a way so that the thermal dissipation inside the apparatus is at the most optimum for cooling.
[0016] In an aspect, the present disclosure relates to an apparatus that comprises a chassis adapted to receive one or more VPX modules mounted orthogonally to a back-plane assembly, the one or more VPX modules are interconnected to each other and a data interchange switch configured in the back-plane assembly, and adapted to support the one or more VPX modules with different slot profiles without modifying the backplane assembly for each slot profile.
[0017] According to an embodiment, the back-plane assembly is a multiple-slot VPX backplane.
[0018] According to an embodiment, the one or more VPX modules can include power supply module, two computing modules, I/O module and graphics processing module.
[0019] According to an embodiment, the apparatus can include payload slot that accepts one or more VPX modules of different slot profiles, wherein the different slot profiles can include fat-pipe module profile, dual ultra-thin pipe module profile and any combination thereof.
[0020] According to an embodiment, at first configuration, the high-speed interface from the first single board computer is connected to the interconnect switch that multiplexes high-speed interfaces between the first single board computer and other VPX modules and peripheral modules. The first configuration follows the fat-pipe module profile.
[0021] According to an embodiment, at second configuration, the high-speed interface from the first single board computer connected to the VPX modules and peripheral modules directly by bypassing the data interchange switch. The second configuration follows the dual ultra-thin pipe module profile
[0022] According to an embodiment, peripheral modules configured in the apparatus, the peripheral modules is upgraded without modifying the backplane assembly.
[0023] According to an embodiment, the presence or absence of the peripheral modules does not affect the operating state of the other VPX modules.
[0024] According to an embodiment, the apparatus comprises standardized connectors and standard interfaces for interconnection that allows for upgrades of all the modules, wherein the standardized connectors are arranged in such a way that when the one or more VPX modules are engaged therewith, the overall routing length is met as per protocol requirements and heat loads are evenly distributed across the apparatus.
[0025] According to an embodiment, the data interchange switch can support higher bandwidth and more ports, where different permutations and combinations of the routing is possible for other data pipe configurations.
[0026] Various objects, features, aspects, and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.

BRIEF DESCRIPTION OF THE DRAWINGS
[0027] The following drawings form part of the present specification and are included to further illustrate aspects of the present disclosure. The disclosure may be better understood by reference to the drawings in combination with the detailed description of the specific embodiments presented herein.
[0028] FIG. 1A illustrates an exemplary representation of VPX based motherboard in first configuration, in accordance with an embodiment of the present disclosure.
[0029] FIG. 1B illustrates an exemplary representation of VPX based motherboard in second configuration, in accordance with an embodiment of the present disclosure.
[0030] FIG. 2A illustrates a top view of module arrangement, in accordance with an embodiment of the present disclosure.
[0031] FIG. 2B illustrates a bottom view of module arrangement, in accordance with an embodiment of the present disclosure.
[0032] FIG. 3A illustrates a top view of board topology, in accordance with an embodiment of the present disclosure.
[0033] FIG. 3B illustrates a bottom view of board topology, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0034] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
[0035] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0036] The present disclosure relates, in general, to VPX framework, and more specifically, relates to a VPX based motherboard. The apparatus of the present disclosure enables to overcome the limitations of the prior art by providing the backplane to allow multiple routing topologies for the high-speed interconnect based on the module slot profile. The term “slot profile” as used herein defines the connector type and provides a physical mapping of ports onto a given slot’s backplane connectors. The VPX defined the signal types in “pipe” classes, which include ultra-thin pipe, thin pipe, fat pipe, and double fat pipe.
[0037] The present disclosure relates to versatile performance switching (VPX) based motherboards used in high-end computing systems like computational servers, which use VPX based modules for computing, graphics application, I/O interfaces, power supply and the like. All the interfaces for the modules are through standardized connectors. The apparatus can be upgraded easily by replacing the individual modules without redesigning the entire system. The present disclosure employs a data interchange switch to ensure the VPX modules with different slot profiles that can be used without the need for redesigning the backplane for each slot profile. The present disclosure can be described in enabling detail in the following examples, which may represent more than one embodiment of the present disclosure.
[0038] The advantages achieved by the apparatus of the present disclosure can be clear from the embodiments provided herein. The apparatus allows multiple routing topologies for the high-speed interconnect based on the module slot profile. An electronic circuit with proprietary fused software for thermal management of the apparatus by monitoring the temperature at optimum locations and enabling cooling fan. The proposed apparatus provides unique arrangement of modules on backplane to ensure optimal routing for high-speed interconnects. The backplane facilitates modular nature of the apparatus so that all modules such as VPX modules and peripheral modules can be populated based on the requirement. The modules are populated on the backplane in such a way that the thermal dissipation inside the apparatus is at the most optimum for cooling. The interfaces used are standard, these can be upgraded also in future without redesigning. The description of terms and features related to the present disclosure shall be clear from the embodiments that are illustrated and described; however, the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents of the embodiments are possible within the scope of the present disclosure. Additionally, the invention can include other embodiments that are within the scope of the claims but are not described in detail with respect to the following description.
[0039] FIG. 1A illustrates an exemplary representation of VPX based motherboard in first configuration, in accordance with an embodiment of the present disclosure.
[0040] Referring to FIG. 1A, a VPX based motherboard 100 (also referred to as an apparatus 100, herein) used in high-end computing systems, where the high-end computing system can include computational servers, which use VPX based modules for computing, graphics application, I/O interfaces, power supply and the likes. The motherboard 100 can include a multiple slot VPX backplanes 102, which can include one or more VPX modules (also referred to as VPX modules). The one or more VPX module includes a power supply module 104, two computing modules (106, 110) include a first single-board computer 106 and a second single-board computer 110, I/O module 108 and graphics processing module 112. The motherboard 100 is configured to facilitate the use of a large number of high-speed interconnections between the VPX modules and is used in high-end computing systems. The composition of the modules can be mounted orthogonally to the back-plane inside a chassis, which provides effective thermal management.
[0041] In an exemplary embodiment, the motherboard 100 as presented in the example can be a five-slot VPX backplane for computing, graphics application, I/O interfaces, power supply and the like. As can be appreciated, the present disclosure may not be limited to this configuration but may be extended to other configurations. The arrangement of the VPX modules on the motherboard 100 is in such a way as to satisfy the twin criteria of electrical routing length requirements and to ensure the heat loads are evenly distributed across the apparatus 100.
[0042] The proposed VPX backplane 102 ensures that the same backplane can be used for different module profile topologies, without the need for redesign of the apparatus 100. An active switching element 114 (also interchangeably referred to as data interchange switch 114, herein) is used for this purpose. The motherboard 100 can include other high-speed connections for communication between various modules.
[0043] In an embodiment, the chassis of apparatus 100 can be adapted to receive one or more VPX modules mounted orthogonally to the back-plane assembly 102, the one or more VPX modules are interconnected to each other. The data interchange switch 114 configured in the back-plane assembly 102 and adapted to support the VPX modules with different slot profiles without modifying the backplane assembly for each slot profile. The circuitry can be reconfigured to ensure that payload slot 1 can accept VPX modules of different slot profiles. Further, the slot profiles other than the one mentioned in FIG 1A and FIG 1B can also be supported by providing the interconnect switch 114 having a higher link speed of >5 Gbps and a number of interconnecting links.
[0044] In another exemplary embodiment, the payload slot accepts one or more VPX modules of different slot profiles. The different slot profiles can include fat-pipe module profile, dual ultra-thin pipe module profile and any combination thereof. The data interchange switch 114 can be changed to support higher bandwidth and more ports, where different permutations and combinations of the routing are possible for other data pipe configurations.
[0045] Standardized connectors and standard interfaces used for interconnect architecture, allows for future upgrades of all the modules. The VPX connectors are arranged in such a way that when VPX modules are engaged therewith, the overall routing length is to be met as per protocol requirements and heat loads are evenly distributed across the apparatus.
[0046] In an embodiment, at first configuration, the high-speed serial interface 118 from the first single-board computer 106 is connected to the interconnect switch 114. The switch 114 multiplexes high-speed interfaces between the first single-board computer 106 and other VPX modules/ peripheral modules 120. The peripheral modules 120 configured in apparatus 100, the peripheral modules 120 are upgraded without modifying the backplane assembly 102. The peripheral modules 120 can include a display, memory storage 122 and universal serial bus (USB). The presence or absence of the peripheral modules 120 does not affect the operating state of the other VPX modules. The first configuration is used when the SBC modules (106, 110) follow the fat-pipe module profile.
[0047] For example, in the first configuration indicated in FIG. 1A, the high-speed serial interface 118 from the first single-board computer (SBC-1) slot 106 is connected to the interconnect switch 114. The switch 114 multiplexes the high-speed interfaces between the SBC 106 and other VPX modules and peripheral modules. A quad fat-pipe 116 is routed between the SBC-1 106 and general-purpose graphics processing unit (GPGU) module 112. A fat pipe 118 (also referred to as high-speed serial interface) is routed between the SBC-1 106 and data interchange switch 114. This provides four ultra-thin pipes which are as shown in FIG-1A.
[0048] At the second configuration, the high-speed interface 118 from the first single board computer 106 connected to the VPX modules and peripheral modules directly by bypassing the data interchange switch 114. The second configuration is used when the SBC modules follow a dual thin-pipe or dual ultra-thin pipe module profile.
[0049] For example, in the second configuration shown in FIG. 1B, the high-speed interface 118 from the SBC-1 106 is connected to the VPX modules and peripheral modules directly, where the data interchange switch 114 is bypassed. The quad fat-pipe 116 is routed between the SBC-1 106 and GPGU module 112. Thus, the SBC modules with different module profiles can be used in the same motherboard with a simple configuration option. This prevents the need to have different motherboard versions for the SBC with different module profiles.
[0050] In an embodiment, the apparatus can include a monitoring circuitry (not shown) to monitor and indicate the thermal stability of the apparatus. The monitoring circuitry is optimally placed to ensure the most effective thermal management.
[0051] The embodiments of the present disclosure described above provide several advantages. The apparatus 100 with backplane of the present disclosure allows multiple routing topologies for the high-speed interconnect based on the module slot profile. The SBCs (106, 110) with different module profiles can be used in the same motherboard with a simple configuration option. This prevents the need to have different motherboard versions for SBCs with different module profiles. The motherboard employs a modular design for peripheral interfaces like display, memory storage and USB. Hence, the apparatus repair or upgradation can be limited to changing the individual modules only, saving time and cost.
[0052] FIG. 2A illustrates a top view of module arrangement 200, in accordance with an embodiment of the present disclosure. The composition of VPX modules is mounted orthogonally to back-plane inside the chassis which provides effective thermal management.
[0053] FIG. 2B illustrates a bottom view of module arrangement, in accordance with an embodiment of the present disclosure. All the modules are plugged to a common motherboard. The modules communicate over high-speed serial link over motherboard.
[0054] FIG. 3A illustrates a top view of board topology 300, in accordance with an embodiment of the present disclosure. The arrangement of the modules on the motherboard 100 is in such a way as to satisfy the twin criteria of electrical routing length requirements and to ensure the heat loads are evenly distributed across the apparatus 100.
[0055] The present disclosure relates to the feature of the motherboard that allows VPX modules with different slot modules to be mounted on the same motherboard without need for any design changes as is customary. The backplane is designed to facilitate the modular nature of the apparatus by ensuring individual modules can be replaced or upgraded without affecting other sub-systems.
[0056] FIG. 3B illustrates a bottom view of board topology, in accordance with an embodiment of the present disclosure. The standardized connectors are arranged in such a way that when the one or more VPX modules are engaged therewith, the overall routing length is met as per protocol requirements and heat loads are evenly distributed across the apparatus.
[0057] It will be apparent to those skilled in the art that the apparatus 100 of the disclosure may be provided using some or all the mentioned features and components without departing from the scope of the present disclosure. While various embodiments of the present disclosure have been illustrated and described herein, it will be clear that the disclosure is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the disclosure, as described in the claims.

ADVANTAGES OF THE PRESENT DISCLOSURE
[0058] The present disclosure provides an apparatus with backplane that allows multiple routing topologies for the high-speed interconnect based on the module slot profile.
[0059] The present disclosure provides a unique arrangement of modules on the backplane to ensure optimal routing for high-speed interconnects.
[0060] The present disclosure provides an apparatus with the backplane that facilitates the modular nature so that all modules can be populated based on the requirement. The interfaces used are standard, these can be upgraded without redesign
[0061] The present disclosure provides an apparatus that is optimally placed to ensure the most effective thermal management.