Description:RELATED APPLICATION
[0001] The present application claims priority to U.S. Non-Provisional Patent Application No. 17/483,381 filed on 23 September 2021 and titled “VOLTAGE REGULATOR WITH BINARY SEARCH AND LINEAR CONTROL” the entire disclosure of which is hereby incorporated by rseference.

TECHNICAL FIELD
[0002] Embodiments pertain to voltage regulators (VRs). Some embodiments relate to digital linear (DL) VRs (DLVRs) with linear control and non-linear control. The non-linear control can include a binary search control technique.

BACKGROUND
[0003] Advanced microprocessors demand high performance and efficient power delivery circuits. Motherboard (MB) VR or Fully Integrated (FI) VR are existing solutions with an external or in-package inductor. While such switching converter solutions, like FIVR and MBVR, offer higher efficiency operation in certain operating conditions, designing good inductors on-chip or close to silicon remains a challenge. Additionally, due to the physical limitation of the inductor, in which it takes a prohibitive amount of time to change current, inductor-based solutions suffer from relatively poor transient response time.

BRIEF DESCRIPTION OF THE FIGURES
[0004] In the figures, which are not necessarily drawn to scale, like numerals may describe similar components in different views. Like numerals having different letter suffixes may represent different instances of similar components. The figures illustrate generally, by way of example, but not by way of limitation, various embodiments discussed in the present document.
[0005] FIG. 1 illustrates, by way of example, a graph of output voltages versus time using various control techniques.
[0006] FIG. 2 shows the working principle of a hybrid LC and NLC control technique with a Binary Search Algorithm (BSA) based output current adjustment.
[0007] FIGS. 3 and 4 illustrate, by way of example, flow diagrams of respective portions of an embodiment of a hybrid LC and BSA-based NLC control technique.
[0008] FIG. 5 illustrates, by way of example, a graph of maximum output current as a function of VPG with PG code scaling and without PG code scaling.
[0009] FIG. 6 illustrates, by way of example, a circuit diagram of a VR system with a hybrid LC and NLC controller.
[0010] FIG. 7 illustrates, by way of example, a diagram of an embodiment of a PG system including an up/down counter.
[0011] FIG. 8 illustrates, by way of example, various graphs that help understanding of an asymmetric hybrid LC and NLC technique.
[0012] FIGS. 9 and 10 illustrate, by way of example, NLC circuitry logic solutions for NLC events that occur consecutively without a reset event between consecutive events for droop and overshoot protection and for droop protection only, respectively.
[0013] FIG. 11 illustrates, by way of example, a circuit diagram of an embodiment of Fin Self Heat (FiSH) protection circuitry.
[0014] FIG. 12 illustrates, by way of example, a graph of an embodiment of reference voltages VSX_TOP and VSX_BOT generated as a function of VCCIN.
[0015] FIG. 13 illustrates, by way of example, a differential amplifier circuit, such as can be implemented by the mid-rail regulator to generate each of the two mid-rail voltages.
[0016] FIG. 14 illustrates, by way of example, a diagram of an embodiment of a method for VR control.
[0017] FIG. 15 illustrates, by way of example, a block diagram of an embodiment of a machine (e.g., a computer system) to implement one or more embodiments.

DETAILED DESCRIPTION
[0018] The following description and the drawings sufficiently illustrate specific embodiments to enable those skilled in the art to practice them. Other embodiments may incorporate structural, logical, electrical, process, and other changes. Portions and features of some embodiments may be included in, or substituted for, those of other embodiments. Embodiments set forth in the claims encompass all available equivalents of those claims.
[0019] Different from inductor-based solutions, aspects include a Non-Linear Control (NLC) and Linear Control (LC) based DLVR. A DLVR in accord with aspects can include no inductor. A DLVR in accord with aspects can be integrated close to a load (e.g., a microprocessor or other load) (e.g., on a same die as the processor). A DLVR in accord with aspects offers significantly faster transient recovery performance through a digitally implemented NLC and LC technique.
, Claims:1. An apparatus comprising:
first, second, and third comparators configured to determine whether a load voltage (VLOAD) (i) drops below a lower non-linear control (NLC) threshold, (ii) drops below a lower linear control (LC) threshold, and (iii) exceeds an upper LC threshold, respectively;
power gates (PGs) configured to adjust an output voltage (VOUT) based on a provided power gate (PG) code; and
voltage regulator (VR) controller circuitry comprising synchronous LC circuitry and asynchronous NLC circuitry, the LC circuitry configured to increment or decrement the PG code responsive to the VLOAD dropping below the LC threshold and exceeding the upper LC threshold, respectively, and the NLC circuitry configured to increase the PG code based on a number of consecutive NLC droop events and responsive to the VLOAD dropping below the lower NLC threshold.