Claims: A non-adiabatic waveguide taper configured in an optical communication system,
said taper being formed using a quadratic sinusoidal function and configured to couple a first waveguide of a first optical element to a second waveguide of a second optical element,
wherein the first waveguide and the second waveguide have different core widths,
and wherein the first optical element and the second optical element are of different lateral dimensions,
wherein said taper is a low insertion taper,
wherein said taper is a low reflection taper,
wherein said taper is connected,
and wherein said connection is non-adiabatic.
The taper of claim 1, wherein the first optical element and the second optical element are either horizontally aligned or offset from each other.
The taper of claim 1, wherein the taper is bidirectional.
The taper of claim 1, wherein the quadratic sinusoidal function is:
X=a (bz^2+(1-b)z)+(1-a) ?sin?(c p/2 z)?^2
where a is [0, 1], b is [-1, 1], and c = {2k + 1: k ?Z}, wherein z is relative length of the taper, and k is a sample point within the taper length.
The taper of claim 1, wherein the taper is used for optical elements made of any or a combination of Silicon Nitride, Silicon Carbide, Silicon-on-Insulator, Amorphous Silicon, III-V compound semiconductors, Silicon dioxide, and Metals.
A method comprising the step of using a quadratic sinusoidal function to generate a non-adiabatic waveguide taper that is configured in an optical communication system, said taper being configured to couple a first waveguide of a first optical element to a second waveguide of a second optical element, wherein the first waveguide and the second waveguide have different core widths, and wherein the first optical element and the second optical element are of different lateral dimensions, wherein said taper is a low insertion taper, wherein said taper is a low reflection taper, wherein said taper is connected, and wherein said connection is non-adiabatic.
The method of claim 6, wherein the first optical element is either horizontally aligned or offset from the second optical element.
The method of claim 6, wherein the taper is bidirectional.
The method of claim 6, wherein the quadratic sinusoidal function is:
X=a (bz^2+(1-b)z)+(1-a) ?sin?(c p/2 z)?^2
where a is [0, 1], b is [-1, 1], and c = {2k + 1: k ?Z}wherein z is relative length of the taper and k is a sample point within the taper length.
The method of claim 6, wherein the method is used for optical elements made of any or a combination of Silicon Nitride, Silicon Carbide, Silicon-on-Insulator, Amorphous Silicon, III-V compound semiconductors, Silicon dioxide, and Metals.
, Description:FIELD OF DISCLOSURE
The present disclosure relates to photonic devices in general. In particular, it pertains to tapers for coupling photonic devices.

BACKGROUND OF THE DISCLOSURE
The background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
A photonic integrated circuit (PIC) or integrated optical circuit is a device (interchangeably termed as an element) that integrates multiple (at least two) photonic functions and as such is similar to an electronic integrated circuit. The major difference between the two is that a photonic integrated circuit provides functions for information signals imposed on optical wavelengths, typically in the visible spectrum (400 nm -700 nm) or near infrared 850 nm-1650 nm.
Light is guided in these elements using optical waveguides (termed interchangeably as a waveguide). An optical waveguide is a spatially inhomogeneous structure for guiding light, i.e. for restricting the spatial region in which light can propagate. Usually, a waveguide contains a region of increased refractive index (called core), compared with the surrounding medium (called cladding). However, guidance is also possible, e.g., by the use of reflections, e.g. at metallic interfaces. Some waveguides also involve plasmonic effects in metals.
The strong light confinement in high-index contrast waveguide platform allows compact devices and circuits, enabling dense optical integration. Over the years, Silicon-On-Insulator (SOI) wafer technology which is one of the high-index contrast material platform has emerged as a standard for realizing Complementary Metal-Oxide-Semiconductor (CMOS) technology compatible high-density photonic integrated circuits [L. Vivien, "Computer technology: Silicon chips lighten up," Nature 528 (7583), 483-484 (2015)].
However, high-density integration brings new challenges in circuit design and routing. Devices/elements with different waveguide widths should be connected/ coupled through low-loss interfaces (waveguide transitions). When considering high-density circuits, it is essential to reduce the footprint (size/length) of these waveguide transitions, usually known as waveguide tapers (interchangeably termed as tapers herein). Coupling waveguides with mismatched width requires smooth transition between the two. This is often achieved by varying the width using transition functions. The length of the transition depends on the phase matching condition between the fundamental or desired modes that need to be matched between the wide and narrow waveguides. The phase matching length depends on the propagation constant of the modes in the two systems. Larger the difference in propagation constant, larger the transition length. This implies that taper length depends on the starting and ending waveguide width.
Tapers are an essential part of a photonic integrated circuit and are necessary to realize coupling between devices of varying dimensions. Various kinds of tapers such as adiabatic linear, exponential, parabolic, and complex non-adiabatic tapers are used to connect waveguides of different widths. As PICs incorporate multiple optical components, many tapers appear within an optical chip. However, footprint of tapers should be as small as possible to reduce material, processing, and packaging costs as well as insertion loss. Therefore, innovative and short taper designs are needed.
As elaborated in several publications [F. V. Laere et al."Compact and highly efficient grating couplers between optical fiber and nanophotonic waveguides," IEEE J. of Lightwave Technology 25 (1), 151-156 (2007); J. Wu, B. Shi, and M. Kong, “Exponentially tapered multi-mode interference couplers,” Chinese Opt. Lett., 4(3) 167-169 (2006); T. Ye, Y. Fu, L. Qiao, and T. Chu, "Low-crosstalk Si arrayed waveguide grating with parabolic tapers," Opt. Exp., 22 (26), 31899-31906 (2014); Y. Fu, T. Ye, W. Tang, and T. Chu, "Efficient adiabatic silicon-on-insulator waveguide taper," Photon. Res. 2, A41-A44 (2014)], transition between a grating coupler (GC), which is about 10 µm and a single-mode photonic waveguide of 0.5 µm in a SOI platform is one of the largest and hence leads to serious design limitations when space is of critical importance. A waveguide taper, however, should not be restricted to this particular case and should be usable wherever devices with different widths have to be connected.
Further, several designs of adiabatic tapers as well as non-adiabatic tapers have been proposed in the literature for coupling to a linear GC, as shown in FIG.1 ( prior art ). However, as illustrated prior-art structures are either difficult to fabricate or suffer from low efficiency and larger footprints.
A grating footprint of 10 ×10 µm is typically chosen to mode-match the grating field with an optical fiber [L. Vivien et al., Light injection in SOI microwave guides using high-efficiency grating couplers," J. Lightwave Technol. 24 (10), 3810-3815 (2006), D. Vermeulen et al., "High-efficiency fiber-to-chip grating couplers realized using an advanced CMOS-compatible Silicon-On-Insulator platform," Opt. Express 18 (17), 18278-18283 (2010)].The grating is then coupled to a waveguide through a 150-500 µm long adiabatic taper. Thus, the footprint of tapers based on linear GCs is limited by the length of the adiabatic taper.
To reduce the footprint of the coupler/taper, a compact focusing grating was proposed and is widely used as well [F. V. Laere et al. "Compact focusing grating couplers for silicon-on-insulator integrated circuits." IEEE Photonics Technology Letters 19 (23), 1919-1921 (2007)]. This focusing grating allows an eight-fold length reduction in the footprint (~18.5µm×28 µm) without performance penalty compared to a linear GC with an adiabatic taper. However, focused gratings require accurate fiber alignment, bandwidth and reflection [S. R. Garcia et al., “Alignment tolerant couplers for silicon photonics" IEEE J. of Sel. Top. in Quant. Electron. 21 (6), 765-778 (2015)].
While size/footprint of taper needs to be as small as possible, designing a compact taper that has low insertion loss, low reflection, and is broadband as well as robust to fabrication imperfections is extremely challenging. The primary challenge in designing a compact taper is the large difference in the propagation constant or propagating mode/dimension between the waveguides that need to be connected. This connection requires adiabatic or non-adiabatic transition without losing optical power. Adiabatic transition requires a smooth reduction in the width of the waveguide which makes the tapers long, particularly, if the difference in the waveguide width is large. The length of the taper typically depends on the relation ß1- ß2/p, where ß1 and ß2 are the propagation constants of the input and output respectively. This condition is normally achieved by using a parabolic taper.
Hence there is a need in the art for as compact tapers as possible. It would be extremely advantageous to use a linear GC with a short taper for a compact light-chip coupling scheme. A good design should, further, not be restricted to any particular case and be usable wherever optical devices with different waveguide widths have to be connected. The taper should be easy to fabricate, have high efficiency and compact/ low footprint.
All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition of that term provided herein applies and the definition of that term in the reference does not apply.
In some embodiments, the numbers expressing quantities or dimensions of items, and so forth, used to describe and claim certain embodiments of the invention are to be understood as being modified in some instances by the term “about.” Accordingly, in some embodiments, the numerical parameters set forth in the written description and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by a particular embodiment. In some embodiments, the numerical parameters should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of some embodiments of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as practicable. The numerical values presented in some embodiments of the invention may contain certain errors necessarily resulting from the standard deviation found in their respective testing measurements.
As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all Markush groups used in the appended claims.

OBJECTS OF THE INVENTION
Some of the objects of the present disclosure, which at least one embodiment herein satisfies are as listed herein below.
It is an object of the present disclosure to provide for a compact waveguide taper with very small footprint.
It is an object of the present disclosure to provide for a compact waveguide taper that can be used wherever optical devices with different waveguide widths have to be connected.
It is another object of the present disclosure to provide for a compact waveguide taper that is easy to fabricate and has high efficiency.

SUMMARY OF THE INVENTION
The present disclosure relates to waveguide tapers for coupling photonic devices. In particular, it pertains to a novel compact taper that can be formed using a quadratic sinusoidal function.
In an aspect, present disclosure proposes a compact taper based on multimode-interference that has larger bandwidth, low reflection and low insertion loss, besides having a design that is highly tolerant to fabrication imperfections.
In another aspect, a taper function is disclosed that is a quadratic sinusoidal function working on multimode interference (MMI) instead of adiabatic mode transition. By using MMI, phase matching condition along length of the proposed compact taper can be overcome. The proposed compact taper (interchangeably termed as taper) enables short taper length, in addition to broadband operation.
In an exemplary embodiment, proposed taper can be used to connect a 10 µm wide Si waveguide with a 0.5 µm Si waveguide. This is a typical dimension of waveguides that connect a grating fiber-chip coupler and a Si waveguide. The proposed taper has a transmission efficiency of 92% for a length of 15 µm. Theoretical calculation shows an operational bandwidth of over 600 nm covering O, C, and L-band. The transmission efficiencies have insignificant degradation under slight width deviations, commonly found during fabrication. Proposed taper shows a 20X reduction in the footprint of a single device based on linear grating couplers (GCs) using adiabatic tapers and 2X reduction in comparison to a standard focusing GC in SOI (silicon on insulator) platform. Thus, the invention leads to a shortest taper ever reported between a GC and a single mode waveguide in Silicon.
In an aspect, present disclosure proposes a non-adiabatic waveguide taper configured in an optical communication system, said taper being formed using a quadratic sinusoidal function and configured to couple a first waveguide of a first optical element to a second waveguide of a second optical element, wherein the first waveguide and the second waveguide can have different core widths, and wherein the first optical element and the second optical element can be of different lateral dimensions, wherein said taper can be a low insertion taper, wherein said taper can be a low reflection taper, wherein said taper can be connected, and wherein said connection can be non-adiabatic.
In another aspect, the first optical element and the second optical element can be either horizontally aligned or offset from each other.
In yet another aspect, the taper can be bidirectional.
In an aspect, the quadratic sinusoidal function can be :
X=a (bz^2+(1-b)z)+(1-a) ?sin?(c p/2 z)?^2
where a is [0, 1], b is [-1, 1], and c = {2k + 1: k ?Z}, wherein z is relative length of the taper, and k is a sample point within the taper length.
In another aspect, the taper can be used for optical elements made of any or a combination of Silicon Nitride, Silicon Carbide, Silicon-on-Insulator, Amorphous Silicon, III-V compound semiconductors, Silicon dioxide, and Metals.
In an aspect, present disclosure proposes a method comprising the step of using a quadratic sinusoidal function to generate a non-adiabatic waveguide taper that is configured in an optical communication system, said taper being configured to couple a first waveguide of a first optical element to a second waveguide of a second optical element, wherein the first waveguide and the second waveguide can have different core widths, and wherein the first optical element and the second optical element can be of different lateral dimensions, wherein said taper can be a low insertion taper, wherein said taper can be a low reflection taper, wherein said taper can be connected, and wherein said connection can be non-adiabatic.
In another aspect, the first optical element can be either horizontally aligned or can be offset from the second optical element.
In yet another aspect, the taper generated can be bidirectional.
In an aspect, the quadratic sinusoidal function of the method can be:
X=a (bz^2+(1-b)z)+(1-a) ?sin?(c p/2 z)?^2
where a is [0, 1], b is [-1, 1], and c = {2k + 1: k ?Z}wherein z is relative length of the taper and k is a sample point within the taper length.
In yet another aspect, the method can be used for optical elements made of any or a combination of Silicon Nitride, Silicon Carbide, Silicon-on-Insulator, Amorphous Silicon, III-V compound semiconductors, Silicon dioxide, and Metals.
Various objects, features, aspects and advantages of the present disclosure will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like features.

BRIEF DESCRIPTION OF DRAWINGS
The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure. The diagrams are for illustration only, which thus is not a limitation of the present disclosure, and wherein:
FIG. 1 illustrates various types of adiabatic and non-adiabatic tapers using Silicon-on Insulator (prior art) and their shortcomings.
FIG.2 illustrates the schematic of the proposed compact taper structure along with linear shallow-etched diffractive waveguide grating coupler (GC), in accordance with an exemplary embodiment of the present disclosure.
FIGs. 3(a) to 3(f) illustrate effect of the three design parameter 'a', 'b' and 'c' on proposed taper profile, in accordance with an exemplary embodiment of the present disclosure.
FIG. 4 illustrates variation in transmission for different 'b' values at 1550 nm for waveguide width of 500 nm, in accordance with an exemplary embodiment of the present disclosure.
FIGs. 5(a) to 5(c) illustrate various optical intensity profiles for different optimized b-values and taper lengths, in accordance with an exemplary embodiment of the present disclosure.
FIGs. 6(a) to 6(d) illustrate Spectral Response and Tolerance of the proposed Compact Taper, in accordance with an exemplary embodiment of the present disclosure.
FIGs. 7(a) to 7(c) illustrate comparison of existing tapers used with GCs and the proposed Compact Taper, in accordance with an exemplary embodiment of the present disclosure.
FIG. 8 shows different sets of devices fabricated for C and L band.
FIG. 9 illustrates SEM image of the proposed compact taper, fabricated as elaborated above, along with a linear grating coupler for 1550 nm TE polarization, in accordance with an exemplary embodiment of the present disclosure.
FIGs. 10(a), 10(b) and FIG. 11 illustrate summary of the characterization results, in accordance with an exemplary embodiment of the present disclosure.
FIG. 12 compares the performance of the three optimized configurations of the proposed compact taper, in accordance with an exemplary embodiment of the present disclosure.
FIG. 13 illustrates broad workable ranges of parameters involved in the present disclosure, in accordance with an exemplary embodiment of the present disclosure.

DETAILED DESCRIPTION
The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure as defined by the appended claims.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of embodiments of the present invention. It will be apparent to one skilled in the art that embodiments of the present invention may be practiced without some of these specific details.
Embodiments of the present invention include various steps, which will be described below. The steps may be performed by hardware components or may be embodied in machine-executable instructions, which may be used to cause a general-purpose or special-purpose processor programmed with the instructions to perform the steps. Alternatively, steps may be performed by a combination of hardware, software, and firmware and/or by human operators.
If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
Exemplary embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments are shown. These exemplary embodiments are provided only for illustrative purposes and so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those of ordinary skill in the art. The invention disclosed may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Various modifications will be readily apparent to persons skilled in the art. The general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the invention. Moreover, all statements herein reciting embodiments of the invention, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future (i.e., any elements developed that perform the same function, regardless of structure). Also, the terminology and phraseology used is for the purpose of describing exemplary embodiments and should not be considered limiting. Thus, the present invention is to be accorded the widest scope encompassing numerous alternatives, modifications and equivalents consistent with the principles and features disclosed. For purpose of clarity, details relating to technical material that is known in the technical fields related to the invention have not been described in detail so as not to unnecessarily obscure the present invention.
Thus, for example, it will be appreciated by those of ordinary skill in the art that the diagrams, schematics, illustrations, and the like represent conceptual views or processes illustrating systems and methods embodying this invention. The functions of the various elements shown in the figures may be provided through the use of dedicated hardware as well as hardware capable of executing associated software. Similarly, any switches shown in the figures are conceptual only. Their function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic, or even manually, the particular technique being selectable by the entity implementing this invention. Those of ordinary skill in the art further understand that the exemplary hardware, software, processes, methods, and/or operating systems described herein are for illustrative purposes and, thus, are not intended to be limited to any particular named element.
Each of the appended claims defines a separate invention, which for infringement purposes is recognized as including equivalents to the various elements or limitations specified in the claims. Depending on the context, all references below to the "invention" may in some cases refer to certain specific embodiments only. In other cases it will be recognized that references to the "invention" will refer to subject matter recited in one or more, but not necessarily all, of the claims.
All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g., “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
Various terms as used herein are shown below. To the extent a term used in a claim is not defined below, it should be given the broadest definition persons in the pertinent art have given that term as reflected in printed publications and issued patents at the time of filing.
The present disclosure relates to waveguide tapers for coupling photonic devices. In particular, it pertains to a novel compact taper that can be formed using a quadratic sinusoidal function.
In an aspect, present disclosure proposes a compact taper based on multimode-interference that has larger bandwidth, low reflection and low insertion loss, besides having a design that is highly tolerant to fabrication imperfections.
In another aspect, a taper function is disclosed that is a quadratic sinusoidal function working on multimode interference (MMI) instead of adiabatic mode transition. By using MMI, phase matching condition along length of the proposed compact taper can be overcome. The proposed compact taper (interchangeably termed as taper) enables short taper length, in addition to broadband operation.
In an exemplary embodiment, proposed taper can be used to connect a 10 µm wide Si waveguide with a 0.5 µm Si waveguide. This is a typical dimension of waveguides that connect a grating fiber-chip coupler and a Si waveguide. The proposed taper has a transmission efficiency of 92% for a length of 15 µm. Theoretical calculation shows an operational bandwidth of over 600 nm covering O, C, and L-band. The transmission efficiencies have insignificant degradation under slight width deviations, commonly found during fabrication. Proposed taper shows a 20X reduction in the footprint of a single device based on linear grating couplers (GCs) using adiabatic tapers and 2X reduction in comparison to a standard focusing GC in SOI (silicon on insulator) platform. Thus, the invention leads to a shortest taper ever reported between a GC and a single mode waveguide in Silicon.
In an aspect, present disclosure proposes a non-adiabatic waveguide taper configured in an optical communication system, said taper being formed using a quadratic sinusoidal function and configured to couple a first waveguide of a first optical element to a second waveguide of a second optical element, wherein the first waveguide and the second waveguide can have different core widths, and wherein the first optical element and the second optical element can be of different lateral dimensions, wherein said taper can be a low insertion taper, wherein said taper can be a low reflection taper, wherein said taper can be connected, and wherein said connection can be non-adiabatic.
In another aspect, the first optical element and the second optical element can be either horizontally aligned or offset from each other.
In yet another aspect, the taper can be bidirectional.
In an aspect, the quadratic sinusoidal function can be :
X=a (bz^2+(1-b)z)+(1-a) ?sin?(c p/2 z)?^2
where a is [0, 1], b is [-1, 1], and c = {2k + 1: k ?Z}, wherein z is relative length of the taper, and k is a sample point within the taper length.
In another aspect, the taper can be used for optical elements made of any or a combination of Silicon Nitride, Silicon Carbide, Silicon-on-Insulator, Amorphous Silicon, III-V compound semiconductors, Silicon dioxide, and Metals.
In an aspect, present disclosure proposes a method comprising the step of using a quadratic sinusoidal function to generate a non-adiabatic waveguide taper that is configured in an optical communication system, said taper being configured to couple a first waveguide of a first optical element to a second waveguide of a second optical element, wherein the first waveguide and the second waveguide can have different core widths, and wherein the first optical element and the second optical element can be of different lateral dimensions, wherein said taper can be a low insertion taper, wherein said taper can be a low reflection taper, wherein said taper can be connected, and wherein said connection can be non-adiabatic.
In another aspect, the first optical element can be either horizontally aligned or can be offset from the second optical element.
In yet another aspect, the taper generated can be bidirectional.
In an aspect, the quadratic sinusoidal function of the method can be:
X=a (bz^2+(1-b)z)+(1-a) ?sin?(c p/2 z)?^2
where a is [0, 1], b is [-1, 1], and c = {2k + 1: k ?Z}wherein z is relative length of the taper and k is a sample point within the taper length.
In yet another aspect, the method can be used for optical elements made of any or a combination of Silicon Nitride, Silicon Carbide, Silicon-on-Insulator, Amorphous Silicon, III-V compound semiconductors, Silicon dioxide, and Metals.
Various objects, features, aspects and advantages of the present disclosure will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like features.
FIG.1 (prior art) illustrates existing designs of adiabatic as well as non-adiabatic tapers for coupling to a linear GC,
As illustrated, existing designs of adiabatic tapers require a tradeoff between taper length and coupling efficiency due to the adiabatic transition, while non-adiabatic tapers have complexity in fashion.
FIG.2 illustrates the schematic of the proposed compact taper structure along with linear shallow-etched diffractive waveguide grating coupler (GC), in accordance with an exemplary embodiment of the present disclosure.
In an aspect, unlike an adiabatic taper, the proposed taper works on multi-mode interference along the length of the taper. The length and width of the proposed taper can be optimized to obtain interference progressively between the resonance modes along the taper resulting in maximum coupling to the fundamental waveguide mode.
In another aspect, proposed taper structure to connect a broad waveguide section to a submicron waveguide section can be defined using an interpolation formula as under :
X=a (bz^2+(1-b)z)+(1-a) ?sin?(c p/2 z)?^2……..Equation (1)
where a is [0, 1], b is [-1, 1], c = {2k + 1: k ?Z}are the range of values that the variables can take.
In yet another aspect, this formula can meet the following boundary conditions: X (z = 0) = 0 and X (z = 1) = 1 where z is the relative length of the taper and k is a sample point within the taper length. The final width profile, X = f (z, a, b, c) is a superposition of a parabolic baseline and the square of a sine.
In an aspect, the coefficient ‘a’ controls the fraction of the sinusoidal as well as the parabolic component. For case (i) a = 0, the sinusoids are at maximum amplitude, and the entirety of the taper is determined by the sinusoidal part of the function. For case (ii) a = 1, the sinusoidal component of the tapers is eliminated, and the taper follows a simple quadratic (or linear) change in width.
In another aspect, the parameter ‘b’ controls the parabolic curvature of the baseline: For case (i) b = 1, a convex parabola is obtained, for case (ii) b = -1, a concave parabola is obtained, and for case (iii) b = 0, a simple linear taper is obtained.
In yet another aspect, parameter ‘c’ controls the number of full oscillations of the sinusoidal component part of the taper. The restriction of c (odd integers) is due to the boundary conditions that must be met at both ends of the taper's interpolation formula.
In an aspect, as elaborated above, the three design parameters can allow one to design an appropriate taper profile for maximum transmission of waves between the waveguides.
FIGs. 3(a) to 3(f) illustrate effect of the three design parameter ‘a’, ‘b’ and ‘c’ on proposed taper profile, in accordance with an exemplary embodiment of the present disclosure.
The effect of the three design parameters a, b and c on proposed taper profile is illustrated, showing Optical Intensity Profiles of the proposed taper at length =14.50 µm, in accordance with an exemplary embodiment of the present disclosure.
As illustrated at FIG.3(a), for a = 1, b = 0 (Linear Taper), Efficiency = 16%, FIG. 3(b) shows that for a = 1, b = 1, Efficiency = 25%, FIG. 3(c) shows that for a = 1, b = -1, Efficiency = 39%, FIG. 3(d) shows that for a = 0, c = 1, Efficiency = 38%, FIG. 3(e) shows that for a = 0, c = 3, Efficiency = 17% and FIG. 3(f) shows that for a = 0, c = 15, Efficiency = 9%.
In this fashion, a rigorous iterative optimization of these parameters can be performed to identify suitable design parameters to obtain the shortest taper and high-transmission between the waveguide sections.
In an exemplary embodiment, a compact taper as per present disclosure operating in the C and L band along with its performance metrics can be elaborated as hereunder.
In an aspect, an ultra-compact taper can be designed in a 220/2000 nm Silicon/BOX SOI wafer technology. The taper can be designed to couple a 10 µm wide waveguide (chosen to accommodate a linear GC) and a 500 nm wide waveguide. Ridge waveguide with an etch depth of 70 nm can be used to keep the scattering losses low.
As mentioned earlier, the taper design parameters a, b, c and taper length can be optimized to achieve maximum transmission at 1550 nm.
FIG.4 illustrates variation in transmission for different ‘b’ values at 1550 nm for waveguide width of 500 nm, in accordance with an exemplary embodiment of the present disclosure.
As illustrated, the taper configurations yield over95% transmission efficiency, wherein a maximum coupling efficiency of 96% can be achieved for a taper length of 15 µm(configuration CT3). It can be observed that with design values for a and c fixed at 0.4 and 7 respectively, b values within the range of ~0.5-0.6 result in a coupling efficiency > 95% whereas a further increase in b-values i.e. 0.8-1.0 (not shown) reduces the coupling efficiency to ~85%.
FIGs. 5(a) to 5(c) illustrate various optical intensity profiles for different optimized b-values and taper lengths, in accordance with an exemplary embodiment of the present disclosure.
FIG. 5(a) corresponds to configuration CT1 shown in FIG. 4, wherein b = 0.50, Taper Length = 14.50 µm and Coupling Efficiency = 95.03 %.
Likewise, FIG. 5(b) corresponds to configuration CT2 shown in FIG. 4, wherein b = 0.58, Taper Length = 14.75 µm and Coupling Efficiency = 95.56 % and FIG. 5(c) corresponds to configuration CT3 shown in FIG. 4 ,wherein b = 0.62, Taper Length = 15.00 µm and Coupling Efficiency = 96.14 %.
FIGs. 6(a) to 6(d) illustrate Spectral Response and Tolerance of the proposed Compact Taper, in accordance with an exemplary embodiment of the present disclosure.
FIG. 6(a) illustrates Spectral Response of the Compact Taper between 1.4-2.00 µm, FIG. 6(b) illustrates Spectral Response of the Compact Taper in the C&L telecommunication band, FIG. 6 (c) illustrates Effect of End Waveguide Width Variation on the Transmission Efficiency of the Compact Taper and FIG. 6(d) illustrates Effect of Compact Taper Width Variation (different b values) on the Transmission Efficiency.
In an aspect, FIG. 6(a) and FIG. 6(b) depict the spectral response of the compact taper-based linear GCs (grating couplers) for the C + L band for all three configurations. The proposed taper has a broadband operation with the 3dB bandwidth of over 600 nm covering O, C, and L-band and beyond. Since the GCs operate in the C+L band, only results in this band are presented. Furthermore, the effect of dimensional variation on the transmission performance was also calculated to take fabrication tolerances into account.
In another aspect, FIG.6(c) shows the effect of end waveguide width variation on the transmission. Since the taper was optimized for an end waveguide width of 500 nm, deviation results in a reduction in transmission. However, in practice one can expect a line width variation of not more than 10% which corresponds to a width variation of ±25 nm. A variation in this range would result in transmission degradation by < 2% (0.08 dB), which shows the resilience of the proposed taper.
In yet another aspect, FIG. 6(d) shows the effect of the total taper width variation on the coupling efficiency. The variation in taper width is obtained by varying the optimized ‘b’ value from 0.4 to 0.8. It is evident that the proposed structures have high manufacturing tolerances (> 88% efficiency when ‘b’ changes from 0.4 to 0.8 i.e. ? shift in optimized taper width of 400 nm). For a change in ‘b’ value from 0.50 to 0.58, there is a ? change in Compact Taper’s width of ~80 nm.
FIGs.7(a) to 7(c) illustrate comparison of existing tapers used with GCs with the proposed Compact Taper, in accordance with an exemplary embodiment of the present disclosure.
FIG. 7(a) illustrates schematic of an Adiabatic Linear Taper along with Linear Gratings( prior art), FIG. 7(b) illustrates Focused Gratings based Coupler using Curved Gratings (prior art)while FIG.7(c) illustrates proposed Compact Taper with linear grating couplers (GCs) optimized for maximum Fiber to Waveguide Coupling Efficiency in accordance with an exemplary embodiment of the present disclosure.
In an aspect, to compare the proposed taper performance with the existing designs, three type of configurations can be fabricated as elaborated in FIG. 7. The test structures can be designed with an input GC with one of the tapers mentioned above coupling into a 500 nm ridge waveguide and taper-out to an identical output coupler configuration.
FIG. 8 shows different sets of devices fabricated for C and L band.
As illustrated Compact Taper (CT) as per present disclosure, Long Taper (500 µm) and Focused GCs can be used for fiber to waveguide coupling as well as waveguide to fiber coupling.
In an aspect, all the GCs can be designed for TE-polarized 1550 nm with a grating period of 630 nm and 50% fill-factor.
In another aspect, the test structures can be fabricated using electron-beam lithography and Inductively Coupled Plasma-Reactive Ion Etching (ICP-RIE) process. Pattering can be done in a standard SOI substrate with a 220 nm thick device layer on a 2 µm buried oxide (BOX) layer.
FIG. 9 illustrates SEM (scanning electron microscope) image of the proposed compact taper, fabricated as elaborated above, along with a linear grating coupler for 1550 nm TE polarization, in accordance with an exemplary embodiment of the present disclosure.
In an aspect, fabricated devices as elaborated for FIG. 7 can be characterized using a tunable laser source (1510-1630 nm) and a photodetector. The polarization of the light from the laser source can be controlled using polarization wheels before the input GC. The transmitted light can be detected by an InGaAs photodetector.
FIGs. 10(a), 10(b) and FIG. 11 illustrate summary of the characterization results, in accordance with an exemplary embodiment of the present disclosure.
In an aspect, Figure 10(a) compares the performance of the proposed Compact Taper with the Long Tapers and Focused GCs. Compact Taper configuration CT1 (as illustrated in FIG. 4) is used for the comparison. The characterization results show that the proposed CT1 yields approximately the same coupling efficiency as a focused GC and moreover, provides a higher 3-dB bandwidth. The insertion loss per coupler is 5.45 dB, 6.1 dB and 5.3 dB for GC with proposed Compact Taper, GC with adiabatic (long) taper and focused GC respectively, as illustrated in FIG. 11. The insertion loss of the adiabatic long taper is about 1 dB higher, which can be attributed to the waveguide loss in the adiabatic section. The 3-dB bandwidth which is another important performance metric for a GC, is ~ 10 nm higher for CT1 compared to focused GC (FIG. 11).
In another aspect, Figure 10(b) shows proposed Compact Tapers with different design parameter ‘b’ and length. The variation in the design parameter ‘b’ creates a taper waveguide width variation as illustrated in Figure 6(c). Measurement results show that a taper width variation of 80-160 nm and length variation of 500 nm would only vary the coupling efficiency by < 0.4 dB, which shows the robustness of the proposed taper.
The proposed compact tapers are about 20 times smaller (~ 250 µm2) in comparison to linear GCs based couplers and about 2 times smaller in comparison to focused GCs.
FIG. 12 compares the performance of the three optimized configurations of the proposed compact taper, in accordance with an exemplary embodiment of the present disclosure.
As shown, FIG. 12 illustrates experimental analysis of the Performance-Metrics of the Compact Taper Width Variation (different b values), in accordance with an exemplary embodiment of the present disclosure.
As illustrated, with configuration CT1 (as elaborated in FIG. 4), loss per Coupler can be 5.45 dB with a 3 dB Bandwidth of 58.93 nm. Likewise, with configuration CT2, loss per Coupler can be 5.26 dB with a 3 dB Bandwidth of 58.95 nm and with configuration CT3, loss per Coupler can be 5.12 dB with a 3 dB Bandwidth of 58.99 nm.
FIG. 13 illustrates broad workable ranges of parameters involved in the present disclosure, in accordance with an exemplary embodiment of the present disclosure.
As can be appreciated, the working range of parameters of the device proposed depends on the wavelength and material used to build the circuitry. FIG. 13 illustrates workable range as an indication, wherein the range changes with wavelength and waveguide material. Parameters ‘a’, ‘b’ and ‘c’ refer to equation (1) as elaborated under description of FIG.2.
As used herein, and unless the context dictates otherwise, the term “coupled to” is intended to include both direct coupling (in which two elements that are coupled to each other or in contact each other) and indirect coupling (in which at least one additional element is located between the two elements). Therefore, the terms “coupled to” and “coupled with” are used synonymously. Within the context of this document terms “coupled to” and “coupled with” are also used euphemistically to mean “communicatively coupled with” over a network, where two or more devices are able to exchange data with each other over the network, possibly via one or more intermediary device.
Moreover, in interpreting both the specification and the claims, all terms should be interpreted in the broadest possible manner consistent with the context. In particular, the terms “comprises” and “comprising” should be interpreted as referring to elements, components, or steps in a non-exclusive manner, indicating that the referenced elements, components, or steps may be present, or utilized, or combined with other elements, components, or steps that are not expressly referenced. Where the specification claims refers to at least one of something selected from the group consisting of A, B, C ….and N, the text should be interpreted as requiring only one element from the group, not A plus N, or B plus N, etc.
While some embodiments of the present disclosure have been illustrated and described, those are completely exemplary in nature. The disclosure is not limited to the embodiments as elaborated herein only and it would be apparent to those skilled in the art that numerous modifications besides those already described are possible without departing from the inventive concepts herein. All such modifications, changes, variations, substitutions, and equivalents are completely within the scope of the present disclosure. The inventive subject matter, therefore, is not to be restricted except in the spirit of the appended claims.

ADVANTAGES OF THE INVENTION
The present disclosure provides for a compact waveguide taper with very small footprint.
The present disclosure provides for a compact waveguide taper that can be used wherever optical devices with different waveguide widths have to be connected.
The present disclosure provides for a compact waveguide taper that is easy to fabricate and has high efficiency.