Company Information

CIN
Status
Date of Incorporation
24 August 2010
State / ROC
Bangalore / ROC Bangalore
Industry
Sub Category
Non-govt company
Last Balance Sheet
Last Annual Meeting
Paid Up Capital
200,000
Authorised Capital
2,500,000

Patents

Phase Locked Loop With Low Phase Noise

A low phase-noise phase locked loop (PLL). In an embodiment, the PLL includes a charge pump that includes a first switch, a second switch, a first resistor and a second resistor, which are connected in series. The first switch is provided between a power supply node and the first resistor, while the second switch is...

Programmable Frequency Divider Providing A Fifty Percent Duty Cycle Output Over A Range Of Divide Factors

A divider circuit determines whether an input factor (N) is an even number or an odd number. If N is an even number then the input clock is divided by N/2 to generate an intermediate clock. The intermediate clock is further divided by two to generate a div-by-2 clock, which is provided as the output clock with fifty...

Reducing Errors Due To Non Linearities Caused By A Phase Frequency Detector Of A Phase Locked Loop

Abstract A phase frequency detector (PFD) includes a first circuit portion and a second circuit portion. The first circuit portion receives a reference signal and activates a first error signal if the phase of the reference frequency leads the phase of a feedback signal. The second circuit portion receives the refe...

Power Amplifier Providing High Efficiency

A power amplifier containing a DC-DC converter, a linear amplifier and a control block. The DC-DC converter receives power from a power source and generates a regulated power supply voltage whose magnitude is controlled by the magnitude of a control signal provided to the DC-DC converter. The linear amplifier receiv...

Programmable Frequency Divider Providing Output With Reduced Duty Cycle Variations Over A Range Of Divide Ratios

A programmable frequency divider includes a cascade of frequency-dividing units, each capable of dividing by a first or a second factor. Each unit receives an input clock and generates a divided output clock. Each unit receives a mode control signal that specifies when to divide its input clock by the second factor ...

Correcting For Non Linearity In An Amplifier Providing A Differential Output

A fully differential amplifier includes a first feedback resistance, a second feedback resistance, a first input resistance and a second input resistance. A first ratio of the first feedback resistance to the first input resistance is equalized with that of a reference ratio of a pair of reference resistances. Simi...

Charge Pump For Scaling The Highest Of Multiple Voltages When At Least One Of The Multiple Voltages Varies

A charge pump includes a scaler circuit and a selector circuit. The scaler circuit is designed to scale an intermediate voltage by a scaling factor to generate a scaled voltage. The selector circuit is designed to select and provide the intermediate voltage from multiple voltages. The selector circuit includes a com...

Operating Mode For A Dc Dc Converter

A DC-DC converter includes an inductor, and generates a regulated voltage from a power source. The current flow through the inductor is increased at a first rate in a first interval. In a second interval, the current flow through the inductor is either increased at a second rate or decreased at a third rate dependin...

Hitless Switching When Generating An Output Clock Derived From Multiple Redundant Input Clocks

ABSTRACT HITLESS SWITCHING WHEN GENERATING AN OUTPUT CLOCK DERIVED FROM MULTIPLE REDUNDANT INPUT CLOCKS A phase locked loop (PLL) includes a multiplexer (MUX), a phase detector, a filter block, an oscillator, a frequency divider, and a clock switch controller, and achieves hitless switching between a primary c...

Clocking Scheme For Delta Sigma Modulator Working With A Fractional Divider Of Variable Length

A frequency divider includes a set of frequency-dividing units coupled in series in a sequential order, with the sequence of frequency-dividing units including a lowest unit and a highest unit, with the remaining units being disposed in series between the lowest unit and the highest unit. The lowest unit is coupled ...

Managing A Shoot Through Condition In A Component Containing A Push Pull Output Stage

Shoot-through condition in a component containing an amplifier with a push-pull output stage is managed. A first current in a first transistor of the output stage is mirrored to generate a first mirrored current. A second current in a second transistor of the output stage is mirrored to generate a second mirrored cu...

Trademarks

Aura Semiconductor (With Device)

[Class : 9] Semi Conductors