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Power Semiconductor Module, Power Semiconductor Device And Method For Producing A Power Semiconductor Device

Abstract: A power semiconductor module (1) is specified, comprising: - at least one semiconductor chip (5) being connected to a cooling structure (3), - at least two power terminals (7) being in electrical contact to the at least one semiconductor chip (5), and - a housing (23) for the power semiconductor chip (5) and the at least two power terminals (7), wherein - each of the at least two power terminals (7) has a protruding part (9) protruding beyond the housing (23) in lateral directions, and - each of the at least two protruding parts (9) is provided with a first alignment hole (10). Further, a power semiconductor device and a method for producing a power semiconductor device is specified.

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
02 August 2023
Publication Number
36/2024
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
Parent Application

Applicants

Hitachi Energy Ltd
Brown Boveri Strasse 5, 8050 Zurich, Switzerland

Inventors

1. TRUESSEL, Dominik
Reussgasse 11 5620 Bremgarten
2. BEYER, Harald
Aavorstadt 39 5600 Lenzburg
3. MALEKI, Milad
Weinbergstrasse 45 5417 Untersiggenthal

Specification

We Claim:
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1. A power semiconductor module (1), with - at least one semiconductor chip (5) being connected to a cooling structure (3), - at least two power terminals (7) being in electrical contact to the at least one semiconductor chip (5), and - a housing (23) for the power semiconductor chip (5) and the at least two power terminals (7), wherein - each of the at least two power terminals (7) has a protruding part (9) protruding beyond the housing (23) in lateral directions, and - at least two protruding parts (9) are provided with a first alignment hole (10), and - at least one of the at least two protruding parts (9) are provided on a first lateral side (11) of the power semiconductor module (1) and at least another one of the at least two protruding parts (9) are provided on a second lateral side (12) of the power semiconductor module (1) being opposite the first lateral side (11).
2. A power semiconductor device (35), with
- at least one power semiconductor module (1) according to
claim 1, and
- a cooler (13) on which the at least one power semiconductor module (1) is arranged, wherein - the cooler (13) is provided with at least two second alignment holes (14).
3. The power semiconductor device (35) according to claim 2, wherein at least one of the at least two first alignment28
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holes (10) has a shape being different to at least another
one of the at least two first alignment holes (10).
4. The power semiconductor device (35) according to any one
of the claims 2 or 3, wherein
- at least one of the at least two first alignment holes (10)
has a circular shape, and - at least another one of the at least two first alignment
holes (10) has a slotted hole shape.
5. The power semiconductor device (35) according to any one of the claims 2 to 4, wherein
- the cooling structure (3) is formed integrally with the
cooler (13), or
- the cooler (13) is provided with at least one opening (15), and the at least one power semiconductor module (1) is provided on one of the at least one opening (15) such that
the cooling structure (3) protrudes into a cooling cavity
(22) of the cooler (13).
6. The power semiconductor device (35) according to any one
of the claims 2 to 5, wherein at least one of - each of the at least one of the at least two first
alignment holes (10) has at least one side surface extending
in vertical direction or obliguely to the vertical direction,
and
- at least one of the at least two second alignment holes (14) has at least one side surface extending in vertical
direction or obliquely to the vertical direction.
7. A method for producing a power semiconductor device (35)
with at least one power semiconductor module (1) and a cooler
(13), comprising:29
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- providing a fixture (25) provided with at least two first alignment pins (26) and with at least two second alignment
pins (27),
- providing the at least one power semiconductor device (35)
comprising at least two power terminals (7) being provided
with at least two first alignment holes (10),
- providing the cooler (13) provided with at least two second
alignment holes (14),
- arranging the cooler (13) on the fixture (25) such that the
at least two second alignment pins (27) are introduced in the
at least two second alignment holes (14), and - arranging the at least one power semiconductor module (1)
on the cooler (13) such that the at least two first alignment
pins (26) are introduced in the at least two first alignment
holes (10).
8. The method according to claim 7, wherein fixing the at least one power semiconductor module (1) to the cooler (13)
by at least one clamp (17).
9. The method according to any one of the claims 7 to 8, wherein a relative position of the at least two first
alignment holes (10) with respect to the at least two second alignment holes (14) is pre-set.
10. The method according to any one of the claims 7 to 9,
wherein at least one of the at least two first alignment pins (26) has at least partially at least one of the shapes: cylindrical, conical.
11. The method according to any one of the claims 7 to 10,
wherein at least one of the at least two second alignment pins (27) has at least partially at least one of the shapes: cylindrical, conical.
12. The method according to any one of the claims 7 to 11, wherein providing at least one of the at least two first alignment pins (26) and the at least two second alignment pins (27) with a spring element (32).
13. The method according to any one of the claims 7 to 12, wherein
- the at least one power semiconductor module (1) further comprises at least two auxiliary terminals (21),
- the at least two auxiliary terminals (21) extend at least in regions in a vertical direction, and
- arranging a common control board (33) comprising further second alignment holes (24) on the fixture (25), wherein the further second alignment holes (24) are configured to receive the second alignment pins (27), such that contact holes (33) of the common control board (34) are configured to receive the auxiliary terminals (21).
14. The method according to any one of the claims 7 to 13, wherein arranging at least two power semiconductor modules (1), each being provided with at least two first alignment holes (10), on the cooler (13).

Documents

Application Documents

# Name Date
1 202347051889-STATEMENT OF UNDERTAKING (FORM 3) [02-08-2023(online)].pdf 2023-08-02
2 202347051889-PROOF OF RIGHT [02-08-2023(online)].pdf 2023-08-02
3 202347051889-PRIORITY DOCUMENTS [02-08-2023(online)].pdf 2023-08-02
4 202347051889-FORM 18 [02-08-2023(online)].pdf 2023-08-02
5 202347051889-FORM 1 [02-08-2023(online)].pdf 2023-08-02
6 202347051889-DRAWINGS [02-08-2023(online)].pdf 2023-08-02
7 202347051889-DECLARATION OF INVENTORSHIP (FORM 5) [02-08-2023(online)].pdf 2023-08-02
8 202347051889-COMPLETE SPECIFICATION [02-08-2023(online)].pdf 2023-08-02
9 202347051889-FORM-26 [16-08-2023(online)].pdf 2023-08-16
10 202347051889-FORM 3 [05-01-2024(online)].pdf 2024-01-05
11 202347051889-FORM 3 [05-01-2024(online)]-1.pdf 2024-01-05
12 202347051889-PA [03-04-2024(online)].pdf 2024-04-03
13 202347051889-ASSIGNMENT DOCUMENTS [03-04-2024(online)].pdf 2024-04-03
14 202347051889-8(i)-Substitution-Change Of Applicant - Form 6 [03-04-2024(online)].pdf 2024-04-03
15 202347051889-FORM-26 [29-08-2024(online)].pdf 2024-08-29
16 202347051889-FER.pdf 2025-10-21

Search Strategy

1 202347051889_SearchStrategyNew_E_202347051889E_17-10-2025.pdf