Description:FIELD OF INVENTION
[0001] Embodiments of the present disclosure relate to the field of signal processing and amplitude control circuits adapted to be utilized in audio, RF, or communication systems to control signal amplitude and more particularly a radio frequency limiter with integrated power detection control and a method thereof.
BACKGROUND
[0002] A limiter is a crucial circuit element used to restrict the amplitude of signals in electronic systems, ensuring that they do not exceed a specified threshold. Limiters are broadly categorized into passive and active types. Passive limiters typically use components such as diodes or resistive networks to clip signal amplitudes, while active limiters involve amplification and control mechanisms to dynamically manage signal levels. Among these, active limiters offer more precise control and adaptability, making them valuable for advanced applications. Specifically, an active limiter is designed to protect sensitive receiver components by dynamically adjusting to incoming signal levels, thereby reducing signal distortion while maintaining the overall system performance.

[0003] Active limiters are widely used in high-frequency and high-sensitivity applications such as radar systems, communication receivers, and electronic warfare equipment. In these environments, the receiver front-end is often subjected to strong interferers, jammers, or other high-powered signals that can damage or saturate the low noise amplifier (LNA) or other critical components. The primary role of an active limiter in such systems is to protect the receiver input from high incident power levels without significantly degrading the receiver's noise figure, a key parameter that determines how well a weak signal can be detected in the presence of noise. Thus, active limiters are essential for ensuring both the longevity and performance of RF receivers in demanding field conditions.

[0004] The existing active limiter circuits typically use diode clamp architectures that divert excessive signal power away from sensitive receiver inputs by shorting it to ground. To handle higher power levels, multiple diodes are often connected in parallel, which increases the circuit’s bulk, and the chip area required. This traditional design leads to inefficiencies, such as increased insertion loss and higher noise contribution, both of which directly impact the receiver's noise figure. As a result, although these diode-based limiters do offer protection, they do so at the cost of overall receiver performance and integration flexibility, especially in compact RF systems where space and power are constrained.

[0005] The limitations of current active limiter designs underscore the need for improved solutions. The reliance on bulky diode networks not only consumes valuable chip real estate but also degrades signal integrity due to the intrinsic losses and noise introduced by these components. This trade-off between power handling capability and noise performance creates a significant bottleneck in receiver design, particularly for modern applications that demand both high sensitivity and robustness. Therefore, a novel limiter architecture is required—one that can offer enhanced power protection while preserving or improving the noise figure, optimizing both performance and compactness in RF receiver system.

[0006] Hence, there is a need for an improved a radio frequency limiter with integrated power detection control and a method thereof which addresses the aforementioned issue(s).

OBJECTIVES OF THE INVENTION
[0007] The primary objective of the invention is to provide an active radio frequency (RF) limiter that enables selective attenuation of low-power signals while permitting high incident RF power to pass through the signal path. This approach ensures that low-level signals typically received at the input are not distorted or unnecessarily attenuated, thereby preserving signal integrity under normal operating conditions.

[0008] Another objective is to incorporate a control unit using a transistor and a quarter-wave (λ/4) transmission line that reacts to high RF power. When high power is sensed, a DC voltage triggers the transistor, grounding one end of the line. This action turns the other end into an open circuit, blocking the signal to protect downstream component.

[0009] Yet another objective of the invention is to incorporate a plurality of biasing components, especially diodes, adapted to be non-conductive during low-power operation. This prevents unnecessary switching, thereby improving energy efficiency. As a result, the proposed limiter becomes more reliable and lasts for longer duration.

[0010] Yet another objective of the invention is to reuse components from a conventional single-pole double-throw (SPDT) switch, including the transistor and the λ/4 transmission line, thereby reducing component redundancy and simplifying the design. This reusing offers a novel architectural benefit, enabling cost-effective implementation while maintaining the functional performance of high-power signal suppression in RF systems.

SUMMARY

[0011] In accordance with an embodiment of the present disclosure, a radio frequency limiter with integrated power detection control is disclosed. The radio frequency limiter includes a radio frequency limiter circuit connected in shunt with a primary radio frequency transmission path, wherein the primary radio frequency transmission path is electrically coupled to an input terminal of a receiver unit. Additionally, the radio frequency limiter circuit includes a power detection unit electrically coupled to the primary radio frequency transmission path through a first capacitor, wherein the first capacitor is configured to pass a high incident power radio frequency signals and attenuate a low incident power radio frequency signals, thereby enabling a selective activation of the power detection unit in response to a high signal condition. Additionally, the power detection unit includes a first diode and a second diode each including an anode terminal and a cathode terminal, wherein each of the first diode and the second diode is configured to conduct a current in response to a voltage at the anode terminal exceeding a knee voltage, thereby performing a unidirectional rectification of a radio frequency signal. Furthermore, the power detection unit includes a second capacitor configured to store a DC voltage generated by rectifying the radio frequency signal, wherein the second capacitor is adapted to store the DC voltage proportional to an incident power radio frequency signal. Moreover, the power detection unit includes a first resistor, and a second resistor adapted to provide a DC control bias to the first diode and the second diode. Furthermore, the radio frequency limiter circuit includes a control unit including a transistor with a gate terminal, wherein the gate terminal is electrically coupled to an output of the power detection unit and the transistor is configured to turn on in response to the rectified voltage. Additionally, the transistor is configured to ground a first end of a quarter-wavelength (λ/4) transmission line in response to the high incident power radio frequency signal, wherein the quarter-wavelength (λ/4) transmission line includes the first end and a second end and the quarter-wavelength (λ/4) transmission line is adapted to operate as an impedance transformer to reflect an open circuit at the second end, thereby preventing a high incident power radio frequency signals from reaching the input terminal of the receiver unit. Additionally, the control unit includes a third resistor adapted to supply the DC control bias to the transistor, wherein the DC control bias is set to a logic low level to ensure that the first diode, the second diode and the transistor remain non-conductive during a nominal radio frequency signal conditions. Moreover, the radio frequency limiter circuit includes a reuse radio frequency switching unit incorporating the transistor and the quarter-wavelength (λ/4) transmission line, wherein the transistor and the quarter-wavelength (λ/4) transmission line is being repurposed from a single-pole double-throw (SPDT) switch architecture, thereby enabling an integration of a radio frequency switching network on a single semiconductor chip.

[0012] In accordance with an embodiment of the present disclosure, a method for integrated power detection control utilizing a radio frequency limiter is disclosed. The method includes connecting an RF limiter circuit in shunt with a primary RF transmission path coupled to an input terminal of a receiver unit and coupling a power detection unit to the primary RF transmission path via a first capacitor. Additionally, the method includes passing high incident power RF signals through a first capacitor to a power detection unit while attenuating low power signals, thereby selectively activating the power detection unit in response to high signal conditions. Furthermore, the method includes rectifying the RF signal unidirectionally via the first and the second diodes upon anode voltage exceeding respective knee voltages, followed by storing a DC voltage proportional to the incident RF power in a second capacitor. Moreover, the method includes providing a DC control bias to the first and the second diodes using a first resistor and a second resistor and the output of the power detection unit being electrically coupled through a gate terminal of a transistor in a control unit to regulate the conduction state of the transistor. Moreover, the method includes turning on the transistor by the rectified DC voltage to ground one end of a quarter-wavelength (λ/4) transmission line, thereby functioning as an impedance transformer and reflecting an open circuit at the opposite end, thereby blocking high incident power RF signals from reaching the receiver unit input terminal. Moreover, the method includes supplying a DC control bias to the transistor via a third resistor to maintain the transistor and both diodes in a non-conductive state under nominal RF conditions, thereby enabling integration of the transistor and the quarter-wavelength (λ/4) transmission line with a repurposed SPDT-based RF switching unit on a single semiconductor chip.

[0013] To further clarify the advantages and features of the present disclosure, a more particular description of the disclosure will follow by reference to specific embodiments thereof, which are illustrated in the appended figures. It is to be appreciated that these figures depict only typical embodiments of the disclosure and are therefore not to be considered limiting in scope. The disclosure will be described and explained with additional specificity and detail with the appended figures.

BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The disclosure will be described and explained with additional specificity and detail with the accompanying figures in which:

[0015] FIG. 1 is a circuit diagram representation of a radio frequency limiter with integrated power detection control in accordance with an embodiment of the present disclosure;

[0016] FIG. 2 is an internal circuit diagram representation of a control unit of a radio frequency limiter with integrated power detection control of FIG. 1 in accordance with an embodiment of the present disclosure;

[0017] FIG. 3 is a block diagram representation of a reuse radio frequency switching unit of a radio frequency limiter with integrated power detection control of FIG. 1 in accordance with an embodiment of the present disclosure; and

[0018] FIG. 4 illustrates a flow chart representing the steps involved in a method for integrated power detection control utilizing a radio frequency limiter in accordance with an embodiment of the present disclosure.

[0019] Further, those skilled in the art will appreciate that elements in the figures are illustrated for simplicity and may not have necessarily been drawn to scale. Furthermore, in terms of the construction of the device, one or more components of the device may have been represented in the figures by conventional symbols, and the figures may show only those specific details that are pertinent to understanding the embodiments of the present disclosure so as not to obscure the figures with details that will be readily apparent to those skilled in the art having the benefit of the description herein.

DETAILED DESCRIPTION
[0020] For the purpose of promoting an understanding of the principles of the disclosure, reference will now be made to the embodiment illustrated in the figures and specific language will be used to describe them. It will nevertheless be understood that no limitation of the scope of the disclosure is thereby intended. Such alterations and further modifications in the illustrated system, and such further applications of the principles of the disclosure as would normally occur to those skilled in the art are to be construed as being within the scope of the present disclosure.

[0021] The terms “comprises”, “comprising”, or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process or method that comprises a list of steps does not include only those steps but may include other steps not expressly listed or inherent to such a process or method. Similarly, one or more devices or subsystems or elements or structures or components preceded by "comprises... a" does not, without more constraints, preclude the existence of other devices, sub-systems, elements, structures, components, additional devices, additional sub-systems, additional elements, additional structures or additional components. Appearances of the phrase "in an embodiment", "in another embodiment" and similar language throughout this specification may, but not necessarily do, all refer to the same embodiment.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this disclosure belongs. The system, methods, and examples provided herein are only illustrative and not intended to be limiting.

[0023] In the following specification and the claims, reference will be made to a number of terms, which shall be defined to have the following meanings. The singular forms “a”, “an”, and “the” include plural references unless the context clearly dictates otherwise.

[0024] In accordance with an embodiment of the present disclosure, a radio frequency limiter with integrated power detection control is disclosed. The radio frequency limiter includes a radio frequency limiter circuit connected in shunt with a primary radio frequency transmission path, wherein the primary radio frequency transmission path is electrically coupled to an input terminal of a receiver unit. Additionally, the radio frequency limiter circuit includes a power detection unit electrically coupled to the primary radio frequency transmission path through a first capacitor, wherein the first capacitor is configured to pass a high incident power radio frequency signals and attenuate a low incident power radio frequency signals, thereby enabling a selective activation of the power detection unit in response to a high signal condition. Additionally, the power detection unit includes a first diode and a second diode each including an anode terminal and a cathode terminal, wherein each of the first diode and the second diode is configured to conduct a current in response to a voltage at the anode terminal exceeding a knee voltage, thereby performing a unidirectional rectification of a radio frequency signal. Furthermore, the power detection unit includes a second capacitor configured to store a DC voltage generated by rectifying the radio frequency signal, wherein the second capacitor is adapted to store the DC voltage proportional to an incident power radio frequency signal. Moreover, the power detection unit includes a first resistor, and a second resistor adapted to provide a DC control bias to the first diode and the second diode. Furthermore, the radio frequency limiter circuit includes a control unit including a transistor with a gate terminal, wherein the gate terminal is electrically coupled to an output of the power detection unit and the transistor is configured to turn on in response to the rectified voltage. Additionally, the transistor is configured to ground a first end of a quarter-wavelength (λ/4) transmission line in response to the high incident power radio frequency signal, wherein the quarter-wavelength (λ/4) transmission line includes the first end and a second end and the quarter-wavelength (λ/4) transmission line is adapted to operate as an impedance transformer to reflect an open circuit at the second end, thereby preventing a high incident power radio frequency signals from reaching the input terminal of the receiver unit. Additionally, the control unit includes a third resistor adapted to supply the DC control bias to the transistor, wherein the DC control bias is set to a logic low level to ensure that the first diode, the second diode and the transistor remain non-conductive during a nominal radio frequency signal conditions. Moreover, the radio frequency limiter circuit includes a reuse radio frequency switching unit incorporating the transistor and the quarter-wavelength (λ/4) transmission line, wherein the transistor and the quarter-wavelength (λ/4) transmission line is being repurposed from a single-pole double-throw (SPDT) switch architecture, thereby enabling an integration of a radio frequency switching network on a single semiconductor chip.

[0025] FIG. 1 is a circuit diagram representation of a radio frequency limiter with integrated power detection control in accordance with an embodiment of the present disclosure. The radio frequency limiter (100) includes a radio frequency limiter circuit (110) connected in shunt with a primary radio frequency transmission path, wherein the primary radio frequency transmission path is electrically coupled to an input terminal of a receiver unit (115). A shunt connection means the radio frequency limiter circuit (110) is placed in parallel with a main signal line, thereby allowing it to divert excess RF energy away from the sensitive receiver unit (115) when power exceeds a safe threshold. This is essential for safeguarding the integrity and performance of the receiver unit (115), especially in variable or hostile signal environments. The primary RF transmission path, which is electrically coupled to the input terminal of the receiver unit (115), serves as the main conduit for transmitting RF signals under normal operating conditions, ensuring reliable signal flow until limiting action is needed.

[0026] The radio frequency limiter circuit (110) includes a power detection unit (120) electrically coupled to the primary radio frequency transmission path through a first capacitor (125), wherein the first capacitor (125) is configured to pass a high incident power radio frequency signals and attenuate a low incident power radio frequency signals, thereby enabling a selective activation of the power detection unit (120) in response to a high signal condition. This radio frequency limiter circuit (110) configuration is designed to selectively activate the power detection unit (120) only when high incident power RF signals are present, ensuring efficient operation and protection of downstream components. Typically, the power detection unit (120) monitors the strength of RF signals to identify when high-power conditions occur. Upon detecting excessive power, it activates protective circuit components to safeguard the receiver unit (115) from potential damage. These high-power signals are strong radio frequency signals that pose a risk to sensitive electronic components. The first capacitor (125) is designed to pass these high-power signals to activate the radio frequency limiter circuit (110) and trigger the protection mechanism. While the low-power operation includes the signals that are regular, low-strength signals and the receiver unit (115) is designed to handle safely. The first capacitor (125) attenuates these signals, preventing unnecessary limiter activation and allowing normal signal flow. This design helps prevent unnecessary activation of the radio frequency limiter circuit (110) during normal, low-power operation, while ensuring a protective response during high-power events. Such a setup improves the reliability and durability of sensitive RF receiver unit (115) in dynamic signal environments.

[0027] In one embodiment, the first capacitor (125) presents a low reactance to the high incident power radio frequency signals and a high reactance to low incident power radio frequency signals, thereby enabling an optimized high-power detection while rejecting noise and a low-amplitude signals. The radio frequency limiter circuit (110) is designed to differentiate between a high and low power RF signals, optimizing high-power signal detection while filtering out noise and weak signals. This is achieved through the first capacitor (125) utilization that exhibits variable reactance based on signal strength. Specifically, the first capacitor (125) shows low reactance to strong RF signals, allowing them to pass efficiently, and high reactance to weaker signals, blocking unwanted noise. The first capacitor (125) is likely to present a low capacitance value, enabling it to respond effectively to high-frequency, high-power inputs, crucial for accurate and selective signal processing.

[0028] The power detection unit (120) includes a first diode (130) and a second diode (135) each comprising an anode terminal and a cathode terminal, wherein each of the first diode (130) and the second diode (135) is configured to conduct a current in response to a voltage at the anode terminal exceeding a knee voltage, thereby performing a unidirectional rectification of a radio frequency signal. A diode is a semiconductor device that allows electric current to flow in one direction while blocking it in the opposite direction. It is primarily used for rectification, signal demodulation, and voltage regulation. The diodes are formed by joining p-type and n-type semiconductor materials, creating a p-n junction. This junction establishes an electric field that controls the direction of current flow. The anode terminal of a diode is the positive side, connected to the p-type material. When a positive voltage is applied here relative to the cathode, the diode becomes forward biased and allows current flow. On the other hand, the cathode terminal is the negative side of the diode, connected to the n-type material. In forward bias, electrons flow toward the cathode, enabling current through the diode. Typically, the current in a diode flows from the anode to the cathode when the diode is forward-biased, meaning the anode is at a higher potential than the cathode. In reverse bias, current is blocked except for a minimal leakage current.

[0029] These diodes including the first diode (130) and the second diode (135) are configured to conduct current only when the voltage at the anode terminal surpasses a defined knee voltage. The knee voltage (also known as threshold voltage) is the minimum forward voltage at which a diode starts to conduct significantly. For silicon diodes, this is typically around 0.7 volts, while for germanium diodes it's about 0.3 volts. This behaviour enables the diodes to perform unidirectional rectification of an incoming radio frequency (RF) signal. The rectification process converts alternating RF signals into a unidirectional current, which is essential in RF signal detection, demodulation, or energy harvesting. The use of dual diodes in the power detection unit (120) improves response accuracy and efficiency across varying RF signal amplitudes.

[0030] In one embodiment, the diodes including the first diode (130) and the second diode (135) are utilized from at least one of a metal semiconductor diode comprising Schottky diode selected for their low forward voltage drop and fast switching characteristics to accurately rectify high incident power radio frequency signals. The metal-semiconductor diodes are electronic components formed by a junction between a metal and a semiconductor, used for fast switching and low voltage rectification. The Schottky diode is a widely used metal-semiconductor diode known for its very low forward voltage (typically 0.2–0.4 V) and high-speed response, making it ideal for RF applications. Other examples include hot-carrier diodes and tunnel diodes. The first diode (130) and the second diode (135) are selected in this radio frequency limiter (100) design to enhance response time and reduce energy loss during RF signal suppression. The radio frequency limiter (100) protects sensitive components by rapidly clamping high RF signals. Additionally, the radio frequency limiter (100) is designed to be scalable, modular and adaptable allowing integration of additional diode types depending on performance needs and application environments.

[0031] Additionally, the power detection unit (120) includes a second capacitor (140) configured to store a DC voltage generated by rectifying the radio frequency signal, wherein the second capacitor (140) is adapted to store the DC voltage proportional to an incident power radio frequency signal. This DC voltage is produced by rectifying an incoming radio frequency (RF) signal using the first diode (130) and the second diode (135) or other similar rectification components can also be utilized by the radio frequency limiter (100). The second capacitor (140) accumulates charge corresponding to the rectified voltage, effectively storing energy derived from the RF signal. The second capacitor (140) stores DC voltage by accumulating electrical charge on its plates as a result of the rectified RF signal. Since the rectified voltage corresponds to the strength of the incident RF power, the voltage stored on the second capacitor (140) increases with higher RF signal power. This proportional relationship allows the stored DC voltage to serve as an indicator of the incoming RF signal's power level, enabling the power detection unit (120) to detect and quantify signal strength.

[0032] Furthermore, the power detection unit (120) includes a first resistor (145), and a second resistor (150) adapted to provide a DC control bias (155) to the first diode (130) and the second diode (135). The DC control bias (155) is a constant voltage or current applied to electronic components, like the first diode (130) and the second diode (135), to set their operating point. It is applied using the first resistor (145) and the second resistor (150) to ensure precise control, enabling consistent and efficient rectification performance. This DC control bias (155) ensures that the diodes operate within an optimal region by pre-conditioning them to conduct more effectively when an RF signal is received. By applying this DC control bias (155), the radio frequency limiter circuit (110) reduces the effective threshold or knee voltage required for diode conduction. This improves sensitivity and accuracy in detecting low-power RF signals. The resistor network including the first resistor (145) and the second resistor (150) ensures stable and consistent biasing across varying signal conditions.

[0033] Additionally, the radio frequency limiter circuit (110) includes a control unit (160) including a transistor (165, fig 2) with a gate terminal, wherein the gate terminal is electrically coupled to an output of the power detection unit (120) and the transistor (165, fig 2) is configured to turn on in response to the rectified voltage. The transistor (165, fig 2) is a semiconductor device used to amplify or switch electronic signals and consists of three terminals typically the source, drain, and gate (in the case of a field-effect transistor or FET). In the proposed the radio frequency limiter circuit (110), the gate terminal controls the conduction state of the transistor (165, fig 2). This gate terminal is electrically connected to the output of a power detection unit (120), which senses incoming RF power levels and generates a rectified voltage. When the detected voltage exceeds a certain threshold, the transistor (165, fig 2) turns on, diverting or attenuating the excessive RF signal to limit its impact and enabling the limiting action to protect a plurality of downstream components.

[0034] In one embodiment, the transistor (165, fig 2) is a field-effect transistor (FET) having a threshold voltage selected to match an expected rectified output of the power detection unit (120), thereby ensuring precise switching behaviour. The field-effect transistor (FET) is a semiconductor device that controls current flow using an electric field, it consists of a gate, drain, and a source terminal. In the proposed RF limiter circuit (100), the FET operates as a high-speed switch, turning on or off based on the rectified voltage level. Other switching devices including but not limited to a bipolar junction transistors (BJTs) and metal-oxide-semiconductor FETs (MOSFETs) may also be employed for similar purposes, depending on performance requirements. This utilization of the transistor (165, fig 2) enables accurate and timely switching when high RF power is detected. By aligning the FET's activation point with the signal level, the radio frequency limiter circuit (110) ensures responsive protection to the receiver unit (115).The RF limiter (100) is designed to be scalable and adaptable, allowing integration of various transistor types to meet diverse system needs.

[0035] Additionally, the transistor (165, fig 2) is configured to ground a first end (175, fig 2) of a quarter-wavelength (λ/4) transmission line (170) in response to the high incident power radio frequency signal. This grounding action is triggered by the control signal generated in response to the detected high RF power by the power detection unit (120), allowing the transistor (165, fig 2) to conduct. By grounding the first end (175, fig 2) of the λ/4 transmission line, a second end (180, fig 2)other end connected to the RF path presents a high impedance under normal conditions and a short circuit under limiting conditions. This design effectively blocks or redirects excessive RF energy, protecting sensitive components downstream. The use of a λ/4 line allows frequency-selective and rapid response to over-power conditions with minimal impact on normal signal flow.

[0036] The quarter-wavelength (λ/4) transmission line (170) includes the first end (175) and the second end (180) and the quarter-wavelength (λ/4) transmission line (170) is adapted to operate as an impedance transformer to reflect an open circuit at the second end (180), thereby preventing a high incident power radio frequency signals from reaching the input terminal of the receiver unit (115). The quarter-wavelength (λ/4) transmission line (170) is a segment of transmission line whose physical length corresponds to one-quarter of the wavelength of the signal it carries. These lines are typically formed using strip line structures with precise dimensions matched to the signal frequency. The unique property of the quarter-wavelength λ/4 transmission line (170) is its impedance transformation characteristic when one end is terminated with a particular impedance, the other end presents a transformed impedance based on the line's length and frequency.

[0037] The quarter wavelength λ/4 transmission line (170) is used in RF limiter circuits (110) primarily as an impedance transformer and a frequency-selective element. An impedance transformer is a device or transmission line that converts one impedance value to another to optimize power transfer or signal reflection .By grounding the first end (175, fig 2), the second end (180, fig 2) behaves as an open circuit due to the quarter-wavelength transformation, effectively blocking or reflecting unwanted high-power signals. This property allows the RF limiter circuits (110) to protect sensitive components by reflecting excessive RF energy away from the receiver unit (115) input terminal, ensuring normal signal transmission during safe power levels and limiting only under high-power conditions.

[0038] In one embodiment, the quarter-wavelength λ/4 transmission line (170) is implemented as at least one of a microstrip and coplanar waveguide to achieve a quarter-wavelength impedance transformation with minimal loss at an operating radio frequency. The microstrip and coplanar waveguide are planar transmission line configuration used in RF limiter circuits (110) , ideal for implementing quarter-wavelength impedance transformers due to their compact size and low insertion loss. These structures efficiently convert impedances to match circuit elements while preserving signal integrity. This configuration enables minimal signal loss while ensuring proper impedance matching at the designated operating frequency. It contributes to effective signal routing and power handling within the RF limiter circuit (110). The quarter-wavelength λ/4 transmission line (170) design is optimized to support high-frequency RF performance and integration flexibility. Additionally, the radio frequency limiter (100) is adaptable and scalable, allowing integration of other waveguide or microstrip types as needed based on design requirements or frequency ranges.

[0039] In one embodiment, the second capacitor (140) is configured with a value selected to maintain a stable rectified DC voltage across fast signal fluctuations, thereby providing a reliable gate drive for a transistor (165, fig 2). The second capacitor (140) is specifically configured with a selected capacitance value to stabilize the rectified DC voltage during rapid RF signal fluctuations. This ensures consistent voltage levels are maintained, which is critical for providing a dependable gate drive to the transistor (165, fig 2). By minimizing voltage ripple, the second capacitor (140) enhances the reliability and efficiency of the radio frequency limiter circuit (110). This design choice improves overall radio frequency limiter (100) performance in high-frequency signal environments.

[0040] Additionally, the control unit (160) includes a third resistor (185) adapted to supply the DC control bias (155) to the transistor (165), wherein the DC control bias (155) is set to a logic low level to ensure that the first diode (130), the second diode (135) and the transistor (165) remain non-conductive during a nominal radio frequency signal conditions. This DC control bias (155) is deliberately set to a logic low level, ensuring that the first diode (130), the second diode (135), and the transistor (165) remain in a non-conductive state during nominal radio frequency signal conditions. The nonconductive state refers to a condition where the electronic components, such as diodes including the first diode (130) and the second diode (135) and transistor (165, fig 2), do not allow current to pass through, effectively acting like an open switch. Typically, a logic low level is a voltage level recognized by digital circuits as a binary 0, typically close to 0 volts, which is used here to keep the transistor (165, fig 2) off. The nominal radio frequency signal conditions are the standard or expected RF signal levels and characteristics under normal operation, without any abnormal spikes or interference that could trigger component conduction. This configuration prevents unwanted current flow through the plurality of components, maintaining signal integrity and reducing power loss under normal operating frequencies. The third resistor (185) thus plays a critical role in stabilizing the radio frequency limiter circuit (110) by controlling the transistor (165, fig 2) bias and protecting the diodes from unintended conduction.

[0041] In one embodiment, the first resistor (145), the second resistor (150) and the third resistor (185, fig 2) are selected to maintain a low DC current path, thereby ensuring low power consumption and minimal noise coupling into the primary radio frequency transmission path. The first resistor (145), second resistor (150), and third resistor (185) are strategically selected with high resistance values to establish a low DC current path within the radio frequency limiter (100). This configuration significantly reduces overall power consumption, making the radio frequency limiter circuit (110) more energy-efficient during operation. By minimizing current flow through the DC control bias (155), the design also helps suppress unwanted noise injection into the primary RF transmission path. The resistors are positioned to decouple DC biasing from the sensitive high-frequency signal line. This separation preserves signal integrity and enhances radio frequency limiter (100) performance under high-frequency conditions. With such careful resistor selection, the radio frequency limiter (100) ensures stable operation with minimal electromagnetic interference or power loss.

[0042] Furthermore, the radio frequency limiter circuit (110) includes a reuse radio frequency switching unit (190, fig 3) comprising the transistor (165) and the quarter-wavelength (λ/4) transmission line (170), wherein the transistor (165) and the quarter-wavelength (λ/4) transmission line (170) is being repurposed from a single-pole double-throw (SPDT) switch architecture (195, fig 3), thereby enabling an integration of the reuse radio frequency switching unit (190, fig 3) on a single semiconductor chip. The reuse radio frequency switching unit (190, fig 3) operates by leveraging the transistor's (165, fig 2) switching capabilities and the quarter-wavelength (λ/4) transmission line’s (170) impedance transformation to direct RF signals with minimal loss and high isolation. Uniquely, the transistor (165, fig 2) and the quarter-wavelength (λ/4) transmission line (170) are repurposed from a conventional single-pole double-throw (SPDT) switch architecture (195, fig 3), allowing the same components to serve dual functions. This innovative reuse reduces radio frequency limiter circuit (110) complexity and enhances integration, enabling the entire reuse radio frequency switching unit (190, fig 3) to be fabricated on a single semiconductor chip, thereby improving performance and reducing manufacturing costs.

[0043] The single-pole double-throw (SPDT) switch (195, fig 3) is a fundamental RF component that routes a single input signal to one of two outputs using a control transistor (165, fig 2). In the proposed design, the SPDT switch architecture (195, fig 3) provides the basis for the switching elements, with the transistor (165, fig 2) and quarter-wavelength transmission line (170) working together to toggle signal paths. By integrating and reusing these SPDT components, the radio frequency limiter (100) achieves a compact, multifunctional RF switch unit, which simplifies the radio frequency limiter circuit (110) design and supports monolithic chip implementation. This approach is done to optimize space, reduce power consumption, and enhance signal integrity within integrated RF limiter and its devices.

[0044] In one embodiment, the reuse radio frequency switching unit (190, fig 3) allows monolithic integration of the transistor (165) and quarter-wavelength λ/4 transmission line (170) on a common chip using at least one of a CMOS or GaAs process technology, thereby enabling compact and cost-efficient fabrication. This integration is achieved using at least one of CMOS or GaAs process technologies, supporting high-frequency operation while minimizing form factor and manufacturing cost. The shared substrate ensures reduced parasitic and enhanced performance through tight layout control. This design approach facilitates mass production and simplifies assembly. The CMOS (Complementary Metal-Oxide-Semiconductor) is a widely used semiconductor process ideal for low-power, high-density integration of digital and RF components. Additionally, the GaAs (Gallium Arsenide) technology offers superior high-frequency performance, low noise, and faster electron mobility, making it suitable for RF applications. In the proposed radio frequency limiter (100) design, at least one of a CMOS and GaAs can be selected based on performance and cost requirements, enabling flexibility in fabrication while ensuring optimal RF switching behaviour. Overall, it promotes a compact, efficient, and scalable RF limiter (100) architecture.

[0045] In one embodiment, the radio frequency limiter (100) further includes a noise performance unit configured to activate the power detection unit (120) and reuse radio frequency switching unit (190) only during the high incident power radio frequency signals, thereby preserving the noise figure of the input terminal of the receiver unit (115) under the nominal radio frequency signal conditions. The noise performance unit acts as a control mechanism to isolate noise-generating components during standard RF levels, preventing degradation of the receiver unit (115) sensitivity. Under normal signal conditions, these components remain inactive to avoid introducing additional noise. This selective activation helps preserve the low noise figure at the receiver unit's (115) input terminal, maintaining signal clarity. The design ensures high sensitivity during nominal operation while enabling protection when power surges occur. By only engaging in active radio frequency limiter circuitry (110) during high power events, the noise performance unit helps maintain optimal signal-to-noise ratio and overall radio frequency limiter’s (100) fidelity. This feature is crucial in sensitive RF units where preserving the noise figure is essential for accurate signal reception.
[0046] In one embodiment, the proposed radio frequency limiter (100) is adapted to be both scalable and adaptable, making it suitable for a wide range of modern applications. With the inclusion of the first capacitor (125), second capacitor (140), the first diode (130), second diode (135), and the first , second and third resistors (145, 150, 185), the RF limiter (100) is capable of altering the number of capacitors, diodes, and resistors based on specific system requirements and applications. This flexibility allows the radio frequency limiter circuit (110) to scale up or down while maintaining the core functionality and innovative approach. The proposed design ensures that the essential concept of power detection and protection remains intact regardless of configuration changes. Additionally, the radio frequency limiter (100) is adapted to include a plurality of switching devices, such as additional FET transistors (165), to meet complex integration needs. This adaptability supports smart chip-level integration, catering to evolving RF and communication demands. The scalable structure makes it ideal for compact, high-frequency systems. Ultimately, the invention supports efficient, customizable deployment across various RF technologies.

[0047] FIG. 2 is an internal circuit diagram representation of a control unit of a radio frequency limiter with integrated power detection control of FIG. 1 in accordance with an embodiment of the present disclosure. The control unit (160) includes the transistor (165) with the gate terminal couple to the power detection unit (120) via the third resistor (185). Additionally, the first end (175) of the quarter-wavelength (λ/4) transmission line (170) is grounded in response to the high incident power radio frequency signal and the second end (180)of the quarter-wavelength (λ/4) transmission line (170) functions as an impedance transformer. It reflects an open circuit condition back through the quarter-wavelength (λ/4) transmission line (170). This reflection blocks high-power RF signals from continuing toward the receiver unit (115) and as a result, the receiver unit (115)input terminal is protected from excessive incident power.

[0048] FIG. 3 is a block diagram representation of a reuse radio frequency switching unit of a radio frequency limiter with integrated power detection control of FIG. 1 in accordance with an embodiment of the present disclosure. The reuse radio frequency (RF) switching unit (190) comprises the transistor (165) and the quarter-wavelength (λ/4) transmission line (170), both repurposed from a conventional single-pole double-throw (SPDT) switch architecture design (195). The repurpose includes like instead of serving their original function in signal routing, the transistor (165) is used for switching control, while the quarter-wavelength (λ/4) transmission line (170) functions as an impedance transformer. This reuse allows the RF switching unit (190) to be integrated onto a single semiconductor chip, reducing the need for discrete components. The quarter-wavelength (λ/4) transmission line (170) acts as an impedance transformer, while the transistor provides switching functionality. By leveraging existing SPDT architecture (190), the design simplifies the radio frequency limiter circuit (110) layout and conserves chip area. The effect achieved is improved integration and miniaturization of RF front-end circuits. This results in cost-effective manufacturing and enhanced performance to be utilized in compact wireless systems.

[0049] In a non-limiting example, consider a scenario, the disclosed radio frequency (RF) limiter with integrated power detection control is utilized in modern military radar systems mounted on fighter aircraft. These radar systems require extremely sensitive receiver units capable of detecting weak reflected RF signals from distant objects. However, during high-power transmissions or when encountering strong jamming signals from enemy countermeasures, the incoming RF signal strength can spike dramatically, risking permanent damage to the receiver circuitry. To address this, the radio frequency limiter (100) with integrated power detection control is utilized. The radio frequency limiter (100) includes a radio frequency limiter circuit (110) employed along a primary RF transmission path connected to a receiver unit (115) input terminal. In this setup, a power detection unit (120) is utilized coupled through a first capacitor (125) and adapted to be activated selectively during high incident power RF conditions. The first capacitor (125) attenuates low power signals while allowing high-power signals to trigger the power detection unit(120). A first diode (130) and a second diode (135) connected in series within the power detection unit (120) perform rectification, generating a DC voltage adapted to be stored in a second capacitor (140). This voltage is proportional to the RF power level and serves as a control signal. When the voltage exceeds a threshold, it biases the gate of an integrated transistor (165), turning it on. The transistor (165) then grounds a first end (175) of a quarter-wavelength (λ/4) transmission line (170). Due to its impedance transformation property, the quarter-wavelength (λ/4) transmission line (170) reflects an open circuit at a second end (180), effectively blocking the high-power RF signal from reaching sensitive receiver components. During normal conditions, the plurality of resistors ensure the transistor (165) and the first diode (130), and the second diode (135) remain inactive, preserving signal integrity. Interestingly, the proposed radio frequency limiter circuit (110) prudently reuses components from a standard SPDT switch architecture (195), allowing efficient integration of both RF protection and switching functionality on a single chip. This integration is crucial in space-constrained and weight-sensitive environments like fighter jet avionics, offering protection, performance, and cost-effectiveness in one compact design.

[0050] FIG. 4 illustrates a flow chart representing the steps involved in a method for integrated power detection control utilizing a radio frequency limiter in accordance with an embodiment of the present disclosure. The method (200) includes connecting an RF limiter circuit in shunt with a primary RF transmission path coupled to an input terminal of a receiver unit and coupling a power detection unit to the primary RF transmission path via a first capacitor in the step (205). The method (200) includes connecting an RF limiter circuit in shunt with the primary RF transmission path leading to the receiver’s input terminal to protect against high-power signals. A power detection unit is then coupled to this transmission path through a first capacitor, allowing it to monitor signal power without disrupting the main path. This setup enables real-time detection and limitation of excessive RF power. As a result, the receiver is safeguarded from damage while maintaining signal integrity.

[0051] The method (200) also includes passing high incident power RF signals through a first capacitor to a power detection unit while attenuating low power signals, thereby selectively activating the power detection unit in response to high signal conditions in the step (210). The step (210) includes passing high incident power RF signals through a first capacitor to a power detection unit, which selectively responds to strong signals. The low power signals are attenuated, preventing unnecessary activation of the detection unit. This selective coupling ensures the power detection unit only triggers under high signal conditions. As a result, the radio frequency limiter efficiently monitors and protects against potentially damaging RF power levels.

[0052] Additionally, the method (200) includes rectifying the RF signal unidirectionally via the first and the second diodes upon anode voltage exceeding respective knee voltages, followed by storing a DC voltage proportional to the incident RF power in a second capacitor in the step (215). The first and the second diode rectifies the RF signal unidirectionally, once the anode voltage surpasses their knee voltages, converting the RF energy into DC form. This rectified signal is then stored as a DC voltage in a second capacitor, proportional to the incident RF power. By doing so, the radio frequency limiter circuit is adaptable to effectively measures the strength of the incoming RF signal. This enables accurate power detection and monitoring for improved protection and control.

[0053] Furthermore, the method (200) includes providing a DC control bias to the first and the second diodes using a first resistor and a second resistor and the output of the power detection unit being electrically coupled through a gate terminal of a transistor in a control unit to regulate the conduction state of the transistor in the step (220). A DC control bias is supplied to the first and second diodes through a first and second resistor to ensure proper diode operation and signal rectification. The output from the power detection unit is then electrically coupled to the gate terminal of a transistor within a control unit. This arrangement regulates the transistor’s conduction state based on detected power levels. As a result, the radio frequency limiter dynamically controls signal flow, enhancing protection and performance.

[0054] Moreover, the method (200) includes turning on the transistor by the rectified DC voltage to ground one end of a quarter-wavelength (λ/4) transmission line, thereby functioning as an impedance transformer and reflecting an open circuit at the opposite end, thereby blocking high incident power RF signals from reaching the receiver input terminal in the step (225). The radio frequency limiter circuit blocks high incident power RF signals from reaching the receiver input by turning on a transistor using the rectified DC voltage. This action grounds one end of a quarter-wavelength (λ/4) transmission line, causing it to act as an impedance transformer. The grounded end creates a reflected open circuit at the opposite end of the line. As a result, harmful RF power is diverted away from the receiver, ensuring safe and reliable operation.

[0055] Moreover, the method (200) includes supplying a DC control bias to the transistor via a third resistor to maintain the transistor and both diodes in a non-conductive state under nominal RF conditions, thereby enabling integration of the transistor and the quarter-wavelength (λ/4) transmission line with a repurposed SPDT-based RF switching unit on a single semiconductor chip in the step (230). The radio frequency limiter circuit maintains the transistor and both diodes in a non-conductive state during nominal RF conditions by supplying a DC control bias through a third resistor. This ensures minimal interference with normal signal transmission under typical operating levels. The controlled biasing allows the RF protection circuitry to remain passive until high-power conditions arise. As a result, the transistor and quarter-wavelength (λ/4) transmission line can be seamlessly integrated with a repurposed SPDT-based RF switching unit. This enables efficient on-chip integration, reducing component count and enhancing compact RF front-end design for the overall radio frequency limiter.

[0056] Various embodiments the radio frequency limiter with integrated power detection control and the method thereof described above enable various advantages. One major advantage is the automatic and selective response to high-power conditions, achieved through the use of capacitors including the first capacitor (125) and the second capacitor (140) that differentiate between high and low signal strengths. This enables real-time protection without the need for external intervention or mechanical switching. The inclusion of the first diode (130) and the second diode (135) that perform unidirectional rectification allows the radio frequency limiter circuit (110) to generate a DC voltage proportional to the RF power level, which is then used to activate a transistor (165). This transistor (165), in combination with a quarter-wavelength (λ/4) transmission line (170), acts as an impedance transformer to reflect high-power signals away from the receiver input, ensuring minimal signal interference during normal operations. The application part of the proposed radio frequency limiter (100) span across military communication systems, satellite receivers, and 5G infrastructure, where signal integrity and receiver protection are critical. The reuse of components such as the transistor (165) and the quarter-wavelength (λ/4) transmission line (170), from a single-pole double-throw (SPDT) switch architecture (195) enhances integration and reduces chip area, contributing to more compact and efficient designs. Additionally, the integrated design minimizes parasitic and improves reliability, making it suitable for high-frequency, high-density electronic environments. The plurality of resistors supplying DC control bias (155) further ensure that the radio frequency limiter circuit (110) remains passive during standard operation, thus preserving signal quality. This level of integration on a single semiconductor chip reduces cost, power consumption, and complexity. Overall, the proposed RF limiter (100) provides a smart, scalable, and energy-efficient solution for modern wireless communication systems.

[0057] It will be understood by those skilled in the art that the foregoing general description and the following detailed description are exemplary and explanatory of the disclosure and are not intended to be restrictive thereof. While specific language has been used to describe the disclosure, any limitations arising on account of the same are not intended.

[0058] The figures and the forgoing description give examples of embodiments. Those skilled in the art will appreciate that one or more of the described elements may well be combined into a single functional element. Alternatively, certain elements may be split into multiple functional elements. Elements from one embodiment may be added to another embodiment. For example, the order of processes described herein may be changed and is not limited to the manner described herein. Moreover, the actions of any flow diagram need not be implemented in the order shown; nor do all the acts need to be necessarily performed. Also, those acts that are not dependent on other acts may be performed in parallel with the other acts. The scope of embodiments is by no means limited by these specific examples.
, Claims:1. A radio frequency limiter with integrated power detection control comprising:
a radio frequency limiter circuit connected in shunt with a primary radio frequency transmission path, wherein the primary radio frequency transmission path is electrically coupled to an input terminal of a receiver unit, wherein the radio frequency limiter circuit comprises:
a power detection unit electrically coupled to the primary radio frequency transmission path through a first capacitor, wherein the first capacitor is configured to pass a high incident power radio frequency signals and attenuate a low incident power radio frequency signals, thereby enabling a selective activation of the power detection unit in response to a high signal condition, wherein the power detection unit comprises:
a first diode and a second diode each comprising an anode terminal and a cathode terminal, wherein each of the first diode and the second diode is configured to conduct a current in response to a voltage at the anode terminal exceeding a knee voltage, thereby performing a unidirectional rectification of a radio frequency signal;
a second capacitor configured to store a DC voltage generated by rectifying the radio frequency signal, wherein the second capacitor is adapted to store the DC voltage proportional to an incident power radio frequency signal; and
a first resistor and a second resistor adapted to provide a DC control bias to the first diode and the second diode;
a control unit comprising a transistor with a gate terminal, wherein the gate terminal is electrically coupled to an output of the power detection unit and the transistor is configured to:
turn on in response to the rectified voltage; and
ground a first end of a quarter-wavelength (λ/4) transmission line in response to the high incident power radio frequency signal,
wherein the quarter-wavelength (λ/4) transmission line comprises the first end and a second end and the quarter-wavelength (λ/4) transmission line is adapted to operate as an impedance transformer to reflect an open circuit at the second end, thereby preventing a high incident power radio frequency signals from reaching the input terminal of the receiver unit; and
a third resistor adapted to supply the DC control bias to the transistor, wherein the DC control bias is set to a logic low level to ensure that the first diode, the second diode and the transistor remain non-conductive during a nominal radio frequency signal conditions; and
a reuse radio frequency switching unit comprising the transistor and the quarter-wavelength (λ/4) transmission line, wherein the transistor and the quarter-wavelength (λ/4) transmission line is being repurposed from a single-pole double-throw (SPDT) switch architecture, thereby enabling an integration of the reuse radio frequency switching unit on a single semiconductor chip.
2. The radio frequency limiter as claimed in claim 1, wherein the first capacitor presents a low reactance to the high incident power radio frequency signals and a high reactance to low incident power radio frequency signals, thereby enabling an optimized high-power detection while rejecting noise and a low-amplitude signals.
3. The radio frequency limiter as claimed in claim 1, wherein the diodes are utilized from at least one of a metal semiconductor diode comprising Schottky diode selected for their low forward voltage drop and fast switching characteristics to accurately rectify high incident power radio frequency signals.
4. The radio frequency limiter as claimed in claim 1, wherein the second capacitor is configured with a value selected to maintain a stable rectified DC voltage across fast signal fluctuations, thereby providing a reliable gate drive for the transistor.
5. The radio frequency limiter as claimed in claim 1, wherein the transistor is a field-effect transistor (FET) having a threshold voltage selected to match an expected rectified output of the power detection unit, thereby ensuring precise switching behaviour.
6. The radio frequency limiter as claimed in claim 1, wherein the quarter-wavelength λ/4 transmission line is implemented as at least one of a microstrip and coplanar waveguide to achieve a quarter-wavelength impedance transformation with minimal loss at an operating radio frequency.
7. The radio frequency limiter as claimed in claim 1, wherein the first resistor, the second resistor and the third resistor are selected to maintain a low DC current path, thereby ensuring low power consumption and minimal noise coupling into the primary radio frequency transmission path.
8. The radio frequency limiter as claimed in claim 1, further comprises a noise performance unit configured to activate the power detection unit and reuse radio frequency switching unit only during the high incident power radio frequency signals, thereby preserving the noise figure of the input terminal of the receiver unit under the nominal radio frequency signal conditions.
9. The radio frequency limiter as claimed in claim 1, wherein the reuse radio frequency switching unit allows monolithic integration of the transistor and quarter-wavelength λ/4 transmission line on a common chip using at least one of a CMOS or GaAs process technology, thereby enabling compact and cost-efficient fabrication.
10. A method for integrated power detection control utilizing a radio frequency limiter comprising:
connecting an RF limiter circuit in shunt with a primary RF transmission path coupled to an input terminal of a receiver unit and coupling a power detection unit to the primary RF transmission path via a first capacitor;
passing high incident power RF signals through a first capacitor to a power detection unit while attenuating low power signals, thereby selectively activating the power detection unit in response to high signal conditions;
rectifying the RF signal unidirectionally via the first and the second diodes upon anode voltage exceeding respective knee voltages, followed by storing a DC voltage proportional to the incident RF power in a second capacitor;
providing a DC control bias to the first and the second diodes using a first resistor and a second resistor and the output of the power detection unit being electrically coupled through a gate terminal of a transistor in a control unit to regulate the conduction state of the transistor;
turning on the transistor by the rectified DC voltage to ground one end of a quarter-wavelength (λ/4) transmission line, thereby functioning as an impedance transformer and reflecting an open circuit at the opposite end, thereby blocking high incident power RF signals from reaching the receiver unit input terminal; and
supplying a DC control bias to the transistor via a third resistor to maintain the transistor and both diodes in a non-conductive state under nominal RF conditions, thereby enabling integration of the transistor and the quarter-wavelength (λ/4) transmission line with a repurposed SPDT-based RF switching unit on a single semiconductor chip.
Dated this 01st day of August 2025
Signature

Manish Kumar
Patent Agent (IN/PA-5059)
Agent for the Applicant