Abstract: In one embodiment, the operating method is for operating a semiconductor module (10) and comprises: - providing the semiconductor module (10), wherein the semiconductor module (10) comprises a plurality of power semiconductor devices (1), the power semiconductor devices (1) are arranged next to each other seen in top view, and the power semiconductor devices (1) are interconnected by a bus line (5), - controlling a current through the power semiconductor devices (1) via a first voltage (Vg,bus) provided by the bus line (5), - providing control signals (Ucont) to the power semiconductor devices (1) via the bus line (5) modulated as a second voltage onto the first modulated voltage (Vg,bus).
| # | Name | Date |
|---|---|---|
| 1 | 202547053951-STATEMENT OF UNDERTAKING (FORM 3) [04-06-2025(online)].pdf | 2025-06-04 |
| 2 | 202547053951-REQUEST FOR EXAMINATION (FORM-18) [04-06-2025(online)].pdf | 2025-06-04 |
| 3 | 202547053951-PROOF OF RIGHT [04-06-2025(online)].pdf | 2025-06-04 |
| 4 | 202547053951-NOTIFICATION OF INT. APPLN. NO. & FILING DATE (PCT-RO-105-PCT Pamphlet) [04-06-2025(online)].pdf | 2025-06-04 |
| 5 | 202547053951-FORM 18 [04-06-2025(online)].pdf | 2025-06-04 |
| 6 | 202547053951-FORM 1 [04-06-2025(online)].pdf | 2025-06-04 |
| 7 | 202547053951-DRAWINGS [04-06-2025(online)].pdf | 2025-06-04 |
| 8 | 202547053951-DECLARATION OF INVENTORSHIP (FORM 5) [04-06-2025(online)].pdf | 2025-06-04 |
| 9 | 202547053951-COMPLETE SPECIFICATION [04-06-2025(online)].pdf | 2025-06-04 |
| 10 | 202547053951-Proof of Right [05-06-2025(online)].pdf | 2025-06-05 |
| 11 | 202547053951-FORM-26 [05-06-2025(online)].pdf | 2025-06-05 |
| 12 | 202547053951-FORM 3 [18-11-2025(online)].pdf | 2025-11-18 |