Claims:We claim:
1. A circuit for a common mode rejection, wherein the circuit comprises:
? a capacitive divider network coupled to at least two outputs of a multi-channel multiplexer (MUX), wherein the capacitive divider network comprises:
– at least two capacitors coupled in parallel to the at least two outputs of the multi-channel multiplexer to form a common point Vg, wherein the two capacitors are a first capacitor and a second capacitor;
– the common point Vg is connected to a system ground; and
– a parasitic capacitor formed by an earth and the system ground forms the capacitive divider network comprising at least one of the first capacitor and the parasitic capacitor or the second capacitor and the parasitic capacitor.
2. The circuit as of claim 1, wherein the first capacitor and the second capacitor is selected based on a discharge time.
3. The circuit as of claim 1, wherein the discharge time depends on a scan time to scan the channels of the multi-channel multiplexer (MUX).
4. A circuit for measuring a voltage of a microvolt level comprising:
? at least one low voltage device for sensing a variable and generating a voltage corresponding to the variable sensed.;
? a multi-channel multiplexer (MUX) configured to receive the voltage and provide at least two outputs;
? a capacitive divider network coupled to the at least two outputs of the multi-channel multiplexer (MUX) to generate a differential output, wherein the capacitive divider network comprising:
– at least two capacitors coupled in parallel to the at least two outputs to form a common point Vg, wherein the two capacitors are a first capacitor and a second capacitor;
– the common point Vg is connected to a system ground through a switch;
– a parasitic capacitor formed by an earth and the system ground forms the capacitive divider network between the first capacitor and the parasitic capacitor or between the second capacitor and the parasitic capacitor and the maximum common mode voltage drops across the parasitic capacitor; and
? an operational amplifier configured to receive the differential voltage output from the capacitive divider network.
5. The circuit as of claim 4, wherein the operational amplifier is a programmable gain amplifier.
6. The circuit as of claim 4, wherein the low voltage device is at least one of a thermocouple or pressure transducer.
7. The circuit as of claim 4, wherein the variable sensed is at least one of a temperature or pressure.
8. A method for rejecting a common mode voltage, wherein the method includes the steps of:
– receiving at least two inputs from at least two outputs of a multi-channel multiplexer (MUX), wherein the at least two inputs comprise a first signal and a second signal;
– applying the common mode voltage appearing across the at least two inputs to a capacitive divider network; and
– generating a differential output by the capacitive divider network, wherein the capacitive divider network drops a maximum common mode voltage across a parasitic capacitor formed by a system ground and an earth.
9. The method as of claim 8, wherein the differential output is a difference between the common mode voltage and a voltage drop across the system ground and the earth.
, Description:FIELD OF THE INVENTION:
[001] The present invention relates to circuits for voltage measurement in the order of microvolt levels. More specifically the invention relates to the circuit for rejecting common mode voltage in circuits for voltage measurement in the order of microvolt levels.
[002] BACKGROUND OF THE INVENTION
[003] During the measurement of voltages in the order of micro volt levels, the appearance of common mode voltage that can appear on the measurement voltage could be 350 V peak AC or 400V DC. To ensure the correct measurement of the microvolt voltages there is a need to filter the noise caused due to common mode voltage using a minimum circuit.
[004] There are many existing solutions to solve the problem arising from common mode voltage. The exiting solutions include a resistive network circuit that attenuates the noise to the measurable level but also attenuates the signal under measurement causing accuracy issues. Whereas another existing solution is use of circuits such as operational amplifier circuits that are designed to reject the common mode noise but it gives results that are lower in level of voltage to be measured and thus results in low accuracy.
[005] Hence, there is a need for a low complexity circuit that solves the problem of common mode noise without attenuating the measurement signals.
SUMMARY OF THE INVENTION
[006] According to an embodiment, the present invention discloses a circuit for a common mode rejection. The circuit includes a capacitive divider network coupled to at least two outputs of a multi-channel multiplexer (MUX). The capacitive divider network includes at least two capacitors coupled in parallel to the at least two outputs of the multi-channel multiplexer to form a common point Vg. The two capacitors are a first capacitor and a second capacitor. The common point Vg is connected to a system ground. A parasitic capacitor formed by an earth and the system ground forms the capacitive divider network that includes at least one of the first capacitor and the parasitic capacitor or the second capacitor and the parasitic capacitor.
[007] According to an embodiment, the present invention discloses a circuit for measuring a voltage of a microvolt level. The circuit for measuring the voltage of the microvolt level includes at least one low voltage device for sensing a variable and generating a voltage corresponding to the variable sensed; a multi-channel multiplexer (MUX) configured to receive the voltage and provide at least two outputs; a capacitive divider network coupled to the at least two outputs of the multi-channel multiplexer (MUX) to generate a differential output. The capacitive divider network includes at least two capacitors coupled in parallel to the at least two outputs to form a common point Vg, wherein the two capacitors are a first capacitor and a second capacitor. The common point Vg is connected to a system ground through a switch. The capacitive divider network includes a parasitic capacitor formed by an earth and the system ground that forms the capacitive divider network between the first capacitor and the parasitic capacitor or between the second capacitor and the parasitic capacitor and the maximum common mode voltage drops across the parasitic capacitor. The circuit for measuring the voltage of the microvolt level further includes an operational amplifier configured to receive the differential voltage output from the capacitive divider network.
[008] According to another embodiment, the present invention discloses a method for rejecting a common mode voltage. The method includes the steps of receiving at least two inputs from at least two outputs of a multi-channel multiplexer (MUX), wherein the at least two inputs comprise a first signal and a second signal; applying the common mode voltage appearing across the at least two inputs to a capacitive divider network; and generating a differential output by the capacitive divider network wherein the capacitive divider network drops a maximum common mode voltage across a parasitic capacitor formed by a system ground and an earth.

BRIEF DESCRIPTION OF THE DRAWINGS
[009] The foregoing and other features of embodiments of the present invention will become more apparent from the following detailed description of embodiments when read in conjunction with the accompanying drawings. In the drawings, like reference numerals refer to like elements.
[010] Fig 1 illustrates a circuit diagram for a common mode rejection, in accordance with an embodiment of the invention.
[011] Fig 2 illustrates a block diagram of the circuit for measuring voltages of microvolt level, in accordance with an embodiment of the invention.
[012] Fig 3 illustrates a flow chart of a method for rejecting a common mode voltage, in accordance with an embodiment of the invention.
DETAILED DESCRIPTION
[013] In the following detailed description, reference is made to the accompanying drawings that form a part hereof, and in which shown by way of illustration specific embodiments that may be practiced. These embodiments are described in sufficient detail to enable a person skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, mechanical, and other changes may be made within the scope of the embodiments. Also, the words “comprising,” “having,” “containing,” and “including,” and other similar forms are intended to be equivalent in meaning and be open ended in that an item or items following any one of these words is not meant to be an exhaustive listing of such item or items, or meant to be limited to only the listed item or items. The singular forms “a,” “an,” and “the” include plural references unless the context clearly dictates otherwise. The following detailed description is, therefore, not be taken as limiting the scope of the invention, but instead the invention is to be defined by the appended claims.
[014] Fig 1 illustrates the circuit diagram (100) for a common mode rejection, in accordance with an embodiment of the invention. The circuit includes a capacitive divider network (102) coupled to at least two outputs (106 and 108) of a multi-channel multiplexer (MUX) (104). The capacitive divider network (102) includes two capacitors (110 and 112) coupled in parallel to the at least two outputs (106 and 108) of the multi-channel multiplexer (104) to form a common point Vg. The two capacitors (110 and 112) are a first capacitor (110) and a second capacitor (112). The common point Vg is connected to a system ground (114). A parasitic capacitor (116) is formed by an earth and the system ground forms the capacitive divider network (102) comprising at least one of the first capacitor (110) and the parasitic capacitor (116) or the second capacitor (112) and the parasitic capacitor (116).
[015] According to an embodiment of the present invention, the parasitic capacitor value is a combination of circuit capacitors. In one embodiment of the present invention the parasitic capacitor is a combination of at least one stray capacitor present on the printed circuit board (PCB) connected between the earth and the system ground and the capacitor between the earth and ground plane formed on the printed circuit board.
[016] In yet another embodiment of the present invention as shown in Fig.1, the at least two outputs from the multi-channel multiplexer is to the capacitive divider network through switches (SW1 and SW2) and filters. Typically, the switches are closed during measuring the low-level voltages. In yet another embodiment of the present invention, the at least two outputs from the multi-channel multiplexer is coupled to the capacitive divider network through filters (FB1 and FB2) to filter out high frequency noise. In yet another embodiment of the present invention, the common point Vg is connected to a system ground through a switch SW3.
[017] According to another embodiment of the present invention, the first capacitor and the second capacitor is selected based on a discharge time. The discharge time is the time with which the capacitors are discharged. According to another embodiment of the present invention, the discharge time depends on a scan time to scan the channels of the multi-channel multiplexer. Typically, the two capacitors are selected such that the two capacitors get discharged before the start of next round of scanning the multi-channel multiplexer channels. In an example embodiment of the present invention time available to read a channel is approximately 20.4 msec as the multi-channel multiplexer has to scan 48 channels in one second.
[018] Fig 2 illustrates the block diagram (200) of the circuit for measuring voltages of microvolt level, in accordance with an embodiment of the invention. The circuit for measuring voltage of microvolt level includes at least one low voltage device (202) for sensing a variable and generating a voltage corresponding to the variable sensed. Typically, the voltage generated is of different level depending on the value of the variable. The circuit for measuring voltage of microvolt level includes a multi-channel multiplexer (MUX) (204) configured to receive the voltage and provides at least two outputs. The circuit for measuring voltage of microvolt level further includes a capacitive divider network (206) coupled to the at least two outputs of the multi-channel multiplexer (MUX) to generate a differential output. The capacitive divider network (206) includes at least two capacitors coupled in parallel to the at least two outputs to form a common point Vg, wherein the two capacitors are a first capacitor and a second capacitor. The common point Vg is connected to a system ground through a switch. The capacitive divider network (206) includes a parasitic capacitor formed by an earth and the system ground forms the capacitive divider network comprising at least one of the first capacitor and the parasitic capacitor or the second capacitor and the parasitic capacitor. Typically, the capacitive divider network is formed between the first capacitor and the parasitic capacitor or between the second capacitor and the parasitic capacitor. Because of the capacitive divider network, the maximum common mode voltage drops across the parasitic capacitor.
[019] According to another embodiment of the present invention, the operational amplifier is a programmable gain amplifier. In another embodiment of the present invention, the programmable gain amplifier receives the differential output from the capacitive divider network.
[020] According to another embodiment of the present invention, the low voltage device is a thermocouple temperature sensor to sense the variable temperature. In another embodiment of the present invention the thermocouple temperature sensor includes a plurality of thermo couples to generate voltages. In yet another embodiment of the present invention, the low voltage device includes a pressure transducer to sense the variable pressure. Typically, the low voltage device is any low voltage application device that is used to measure the low voltage signal generated such as in case of temperature sensor or pressure transducer.
[021] Fig 3 illustrates a flow chart of a method (300) for rejecting a common mode voltage, in accordance with an embodiment of the invention. The method (300) includes the step (302) of receiving at least two inputs from at least two outputs of a multi-channel multiplexer (MUX), wherein the at least two inputs comprise a first signal and a second signal. The method (300) further includes the step (304) of applying the common mode voltage appearing across the at least two inputs to a capacitive divider network. The method (300) also includes the step (306) of generating a differential output by the capacitive divider network, wherein the capacitive divider network drops a maximum common mode voltage across a parasitic capacitor formed by a system ground and an earth. In yet another embodiment of the present invention, the differential output is a difference between the common mode voltage and a voltage drop across the system ground and the earth.
[022] According to another embodiment of the present invention, the drop in the voltage across the capacitive divider network is inversely proportional to the capacitor value present in the capacitive divider network. Typically, in a low voltage application device, the value for the parasitic capacitor may be in the range of 2 nF to 4 nF. In an example embodiment, the parasitic capacitor value is approximately 3nF. This value is combination of circuit capacitors i.e. the stray capacitors present on the printed circuit board connected between earth and ground and the capacitor between earth and ground plane formed on the printed circuit board (PCB). In an example embodiment, the capacitors used in the capacitive divider network is of 0.1uF. Therefore, the ratio between the capacitor in the capacitive divider network (0.1uF) and the parasitic capacitance (3nF) is 33K: 1. Thus, the voltage drop across the parasitic capacitance is 33K times than the 0.1uF. As the maximum AC peak voltage may be 325V with respect to earth, minimal voltage appears across the 0.1uF capacitor.
[023] According to another embodiment, the circuit for common mode rejection helps in eliminating common mode noise to the order of 350 Volts AC peak. According to another embodiment of the present invention, the circuit for measuring a voltage of a microvolt level is for measurement of voltage from microvolt level to 10V. In yet another embodiment of the present invention, the circuit for common mode rejection creates a circuit with zero loss and lowest complexity and cost. In yet another embodiment, the circuit for common mode rejection that is part of the data acquisition circuit is completely isolated from other circuitry. In yet another embodiment, the circuit for common mode rejection is built with discrete components and hence there is no dependency of integrated circuit availability. In yet another embodiment of the present invention, the circuit for common mode rejection improves yield in production.
[024] The foregoing description of the preferred embodiment of the present invention has been presented for the purpose of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Furthermore, all examples recited herein are principally intended expressly to be only for pedagogical purposes to aid the reader in understanding the principles of the present subject matter and are to be construed as being without limitation to such specifically recited examples and conditions. Many modifications and variations are possible in light of the above teachings.