BACKGROUND OF THE INVENTION
This patent application relates to a field effect transistor and a gas detector
including a plurality of field effect transistors.
Field effect transistors (FET) are well known and include three terminals
being a source, drain and gate. There are many different types of FETs
with various structures and methods of fabrication.
In terms of gas sensors, traditional gas sensor devices based on
semiconductor materials employ two terminals to measure impedance of
the material when in the presence or absence of gases.
In order to enhance the sensitivity as well as gas-specificity, such devices
have to be heated at moderately high temperatures.
However, heating not only limits large-scale integration in small micro-chips
but also is a major cost which hinders the operation and demands highly on
battery life.
The present invention seeks to provide an improved FET structure together
with an application for the improved FET in an improved gas detector.
SUMMARY OF THE INVENTION
According to a first aspect of the invention there is provided a field effect
transistor comprising:
a source including a plurality of electrode projections with spaces in
between;
a drain including a plurality of electrode projections each located in
one of the spaces between the electrode projections of the source
thereby forming a drain-source electrode connection area of
alternating drain and source projections;
a gate spaced apart from the drain-source electrode area thereby
forming a channel between the gate and the drain-source electrode
connection area wherein the gate runs parallel to the channel; and
a plurality of nano-structures located in the drain-source electrode
area thereby to form an electrical connection between the electrode
projections of the drain and source in the drain-source electrode
connection area.
The drain, source and the gate are preferably in the same plane.
The electrode projections of the drain may be elongate in shape and
connected at or near one of their ends.
The electrode projections of the source may be elongate in shape and
connected at or near one of their ends.
The plurality of nano-structures located in the drain-source electrode area
are positioned randomly on the drain-source electrode area.
The drain-source electrode connection area is approximately 90 micron by
90 micron.
According to a second aspect of the invention there is provided a gas
detector including a plurality of field effect transistors located on a
substrate, each of the field effect transistors including:
a source including a plurality of electrode projections with spaces in
between;
a drain including a plurality of electrode projections each located in
one of the spaces between the electrode projections of the source
thereby forming a drain-source electrode connection area of
alternating drain and source projections;
a gate spaced apart from the drain-source electrode area thereby
forming a channel between the gate and the drain-source electrode
connection area wherein the gate runs parallel to the channel; and
a plurality of nano-structures located in the drain-source electrode
area thereby to form an electrical connection between the electrode
projections of the drain and source in the drain-source electrode
connection area.
The gas detector may include eight field effect transistors located on a
substrate.
The gas detector may include a processor to receive signals from each of
the field effect transistors and to process the signals to determine the
presence of one or more gases.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 shows a schematic drawing of a field effect transistor (FET)
in accordance with an example embodiment;
Figure 2 shows a more detailed schematic drawing of the FET of
Figure 1, particularly showing the source, drain and gate
areas in greater detail;
Figure 3 (a) shows four main scenarios of the mechanisms of the
effect of the gate voltage (Vg) on the source to drain current
(Ids) of the FET illustrated above when the drain-source
voltage, VDS, is constant, (b) are the schematics of the four
main ways (A, B, C and D) of connecting the gate terminal
positive or negative relative to the drain-source polarities
illustrating the fact that in this new kind of transistor two
configurations lead to smooth output characteristics and the
other two lead to random and disordered output
characteristics;
Figure 4 shows an illustration of how nano-ribbons of V02 spread
throughout the inter-digitated drain source area;
Figure 5 shows a schematic drawing of a gas detector using a
plurality of the FETs shown in Figures 1 and 2 , in
accordance with an example embodiment;
Figure 6 shows another schematic drawing of one of the FETs of the
gas detector shown in Figures 5;
Figure 7 shows forward current-voltage characteristics for V02/V205
core-shell nano-ribbons in normal conditions and after being
exposed to humid air showing the conductance decreases
upon exposure to humid air and the influence of the gate
voltage on the drain (output current);
shows the resistance across the V02/V205 core shell nanoribbons
in time in normal air and when they are exposed to
humid air, the response times are typically 5 seconds
whereas recovery times are in the order of minutes;
shows forward current-voltage (Id versus Vds)
characteristics for the MWCNT fibre in normal conditions and
after being exposed to humid air;
shows drain current plotted against gate voltage when the
CNT chip is in normal air and under the influence of humid
air;
shows the resistance across a multiwall carbon nano-tube in
time as it was exposed to humid air;
shows an example application of the present invention in the
detection of acetone in diabetic patient breath correlated to
the blood sugar levels;
is a block diagram illustrating how a gas detector may be
wired for the detection of up to eight different gases at
ambient temperature;
shows forward current-voltage characteristics for V02/V205
core-shell nano-ribbons;
Figure 15 shows forward current-voltage (ID versus VDS)
characteristics for the MWCNT fibre;
Figure 16 shows a response to different level of humidity of a typical
V02/V205 FET sensor on the chip versus gate voltage; and
Figure 17 shows a family tree of all transistors and highlights where in
this family the present invention is located.
DESCRIPTION OF PREFERRED EMBODIMENTS
In the following description, for purposes of explanation, numerous specific
details are set forth in order to provide a thorough understanding of an
embodiment of the present disclosure. It will be evident, however, to one
skilled in the art that the present disclosure may be practiced without these
specific details.
Referring to the accompanying Figures, an example field effect transistor
(FET) 10 is illustrated.
The FET 10 includes a drain 12, a source 14 and a gate 16 all located on a
base 18.
Connecting the drain 2 and the source 14 are a plurality of nano structures
20 which will be described in more detail below.
Referring to Figure 2, the source 14 includes a plurality of electrode
projections 24 with spaces in between as illustrated.
The electrode projections of the source 14 may be elongate in shape and
connected at or near one of their ends.
The drain 12 also includes a plurality of electrode projections 22 each
located in one of the spaces between the electrode projections of the
source thereby forming a drain-source electrode connection area 26 of
alternating drain and source projections.
The electrode projections of the drain 12 may be elongate in shape and
connected at or near one of their ends.
This forms a drain-source electrode connection area 26 including
interdigitated electrode projections 24 and 26 that are interlocked like the
fingers of clasped hands.
The gate 16 is spaced apart from the drain-source electrode area 26
thereby forming a channel 28 between the gate and the drain-source
electrode connection area 26 so that the gate 16 runs parallel to the
channel 28.
t will be appreciated that the gate 16 rests in the same surface plane as
the drain 12 and the source 14 but does not touch the drain 12 or the
source 14.
It will be appreciated that the drain 2, source 14 and the gate 16 are in the
same plane.
A plurality of nano-structures 20 are located in the drain-source electrode
area 26 thereby to form an electrical connection between the electrode
projections of the drain and source in the drain-source electrode connection
area. These are schematically represented in Figure 1 and will be
described in more detail below.
In a prototype embodiment, the FET 10 was manufactured as follows.
First the base 18 is formed from alumina square substrates. These are
then coated with a metal film, preferably gold, by d.c. sputtering.
The gold film is scribed with a T-shaped groove by means of a diamond
knife whose tip is typically 30-60 micro-meters. The scribing is made to
ensure that the gold film is completely dug out in the areas desired to be
insulated in such a way that only the parts of the film designated to be the
drain, the source and the gate are left as-coated with gold.
It will be appreciated that this technique is simple when compared to the
complexity and costs of accomplishing the same task in a standard clean
room facility.
On-chip growth of three different types of one dimensionally nanostructured
material (Ti0 nano-fibres, V 0 nano-fibres, Sn0 nanowires
and ZnO nano-rods) can be carried out by different techniques, for
example: (1) electro-spinning (2) chemical vapor deposition and (3)
hydrothermal synthesis. This forms the nano-structures 20.
Thus, gold contacts in the form of interdigitated electrodes, printed on an
area of 90 microns by 90 micron, form the drain and source terminal. A
third electrode is placed parallel and in the same plane as the drain-source
area. Only when the nano-materials are placed on the drain-source area,
does the device become a transistor. This kind of transistor can be called
the lateral gate interdigitated drain-source FET (LGIDSFET). An illustration
is given in Figure 2. Such eight transistors are arranged in an array on 1
mm by 1 mm Si/Si0 2 wafer and each electrode is wire bonded on the each
of the 24 pins of a chip carrier as will be explained further below.
For a FET 10 to be used in a gas detector, as will be described in more
detail below, the FET 10 was manufactured with either of two nanomaterials
to make the nano-structures 20.
These two nano-materials were V0 2 V20 core-shell nano-ribbons and
multi-wall carbon nano-tubes.
In order to accomplish this, a suspension of V0 V20 nano-ribbons or
multi-wall carbon nano-tubes in isopropanol liquid is formed.
In one example, the suspension of V0 2A 0 5 core-shell nano-ribbons in
isopropanol is prepared by weighing 5, 3, 1, 0.5, 0.2 mg of V0 2 V20 coreshell
nano-ribbons and transferring the powder into 100 mL of isopropanol
tube. Similarly 5, 3, 1, 0.5, 0.4, 0.2 mg of carbon nano-tubes can be
released into 100 mL of isopropanol liquid.
The suspension is placed in an ultrasonic bath for 5 minutes in order for the
nano-structures to be shaken and dispersed into the liquid evenly.
After several tests, it was found that, for V0 V20 core-shell nano-ribbons,
the most optimum concentration was 1 mg/100 mL whereas it was 0.4
mg/100 mL for carbon nanotubes
Once the suspensions have been prepared, micro-litre droplets were
transferred using a dropper onto the FET in the area 26 containing the
drain source electrodes.
After drop casting the nanostructures, scanning electron microscopy is
performed to be sure that the nanostructures are in place. Figure 4 is a
SEM image showing how V0 2 V20 5 core-shell nano-ribbons are spread out
on the drain-source area 26.
As can be seen, the nano-particles placed on the interdigitated contacts
between the drain electrodes and the source electrodes fall randomly in
such a way that the drain-source channel in the nano-particles or nanowires
orients at random angles with the gate direction. This arrangement
offers much more degrees of freedom of the interaction between the
electric field in the gate and the electron current in the drain and source
which has not been possible previously.
In traditional transistors, the nano-structure mostly runs perpendicular to
the gate terminal. In this situation the drain current is given by the
Shockely's equation for a MOSFET:
And for junction FET (JFET) we have:
where W and L correspond to the channel diameter and length respectively
and C is the gate dielectric capacitance per unit length, r - U2 is the radius
of the channel, h is the thickness of the dielectric and the rest of the
symbols carry the usual meanings. By placing one-dimensional nanostructures
such as nano-wires, nano-rods and nanotubes on the drainsource
area in this invention, any angle between the gate electrode and the
nano-structure is possible in such a way that a new equation different from
the Shockley's equation has to be determined. From the first empirical
results on this invention, it has become clear that there are two possibilities
viz: (1) the cubic law rather than the Shockely's square law is preferred
thus:
S = o + a VG + v + (3)
where the value and polarity of the coefficients a , 2 and a 3 have to be
determined for a specific gas interacting with a particular sensing nanomaterial
after fitting equation 2 to experimental data from the currently
invented micro-chip.
or (2) for reverse bias: since the D vs VGS shows the opposite of the
Shockley equation, one can adopt the exponential decay equation. In the
forward bias, the D vs VGS again shows the opposite profile of the
Shockley equation. Here we may adopt the negative of Equation 1. The
sum of the both the forward and reverse bias equations lead to
It shall be noted that when the differential diDs/dV (or transconductance
gm) is performed on Equation 1 to Equation 3, only Equation 3 (pertaining to
the present invention) yields a differential that, when plotted with V S on the
ordinate axis, displays a hump at a characteristic value of VGs Gate voltage
dependent response, ( S) ,s transistor, when it is applied in sensing,
can be obtained from the differential of Equation 3 and 4 as follows:
(6)
This type of analysis on this kind of transistor sensor is one unique
characteristic that wilt aid in the ability to distinguish one gas environment
from the other by simply "tuning" to the desired stimulus by the gate voltage
of the transistor sensor, as will be shown in the next sections.
There is also an interesting effect of the electric field in the gate on the
drain-source current in the nano-structures placed in the drain-source area
that, it is possible, as given in the illustration in Figure 3 (a) that when the
gate voltage exceeds the threshold voltage (VT), the current from the
source to drain reverts back to the source.
This has not been observed in any kind of transistor. In traditional
transistor, the drain-source current only tends to to "pinch-off' but does flow
in the negative direction. This new property may be related to the Gunn
effect where the current experiences a decrease and hence the differential
with voltage becomes negative conductance. In the present invention the
current actually flows in the opposite direction. Thus when V < 0 , ld is
considerably large as the negative Vg causes the Ids flow to spread out
which is not the case when Vg = 0. When Vg > 0 , the current continues to
drop until Vg reaches pin - ff when ids is stopped. The gate voltage that
causes zero current is sometimes referred to as threshold voltage or V-r.
When Vg goes higher than V , the transistor shows a reversal in the lds.
Another new feature of this new transistor, owing to its geometry is the four
main ways of connecting the gate as either positive or negative relative to
the polarity of drain-source current. The polarity of the drain-source has an
effect on the output characteristics of the LGIDSFET. In Figure 3 (b) a
schematic is given where the polarities of D and S are swapped when G is
either + or - and output characteristics are smooth or random. It is smooth
when the polarity of the source is the same polarity of the gate and random
when the polarities are opposing.
The FET 10 described above was used to create a gas detector 30 as
illustrated in Figures 5 and 6.
In the illustrated embodiment, a plurality of the FETs 10 are used to form
the gas detector. The prototype embodiment included eight FETs 10 but it
will be appreciated that this number may differ depending on the application
required.
The eight FET platform was manufactured as follows.
On a 000 urn by 1000 urn Si/Si02 substrate 32, eight FET components 10
are placed, each having three gold terminals shown as s 1;d1;g1, s2;d2;g2
and so forth. A space of 25 urn was left all around the substrate.
Each component measures 250um by 25um, with a spacing of 100um in
between them.
Each of the three gold terminals measure 70 um by 70um. A spacing of 20
um is given between the terminals. Two out of the three gold terminals are
connected to the 'finger' interdigitated features via 30 um long gold strips.
These strips are 1 um in width.
The third gold terminal leads via a 70 um bend to a gold plate measuring
100um by 3um and placed 1 um away from the inter-digitated finger
features.
The main high-ways of the finger features are 90 um apart. The
interdigitated fingers are 1 um in width but one finger connected to one
high-way leaves a 1 um space on the opposite highway and in between the
neighboring fingers and so on. With a pitch of 1 um between the finger
digits and the interdigitated area measuring 100 um in length leads to about
100 digitations (50 fingers from each of the two highways).
An initial sensing test is to check the current-voltage (l-V) characteristics of
the drain-source area after the V0 2 V 0 nano-ribbons or carbon
nanotubes are placed.
It should be noted that it is possible to place different nano-structures at
each FET platform especially those nano-structures that are suited to
sense a particular and specific gas.
However, a common problem in nano-scale sensors is that nano-sca!e
sensors have high sensitivity but have low selectivity and so one alternative
is to place the same kind of nano-structures at all locations on the micro¬
chip. Selectivity of each FET to a particular gas can be accomplished by
varying the gate voltage bias at each FET. This will be described in more
detail below.
In any event, this test is carried in order to ascertain that the chip feature
size of 1 um establishes electrical connections to the nano-structures.
After establishing that the contacts are secure, transient
resistance/conductance on the drain-source is determined and recorded via
chart recorder software.
Transient resistance/conductance plots, that is to say,
resistance/conductance versus time plots, are used to determine response
S es, recovery S c. response time, , recovery time, c , defined
respectively in the following paragraphs.
When deciding which materials are to be employed as sensors of a
particular gas, it is important to assess the range of materials based on a
valid yardstick. The following figures of merit have been used extensively to
assess sensors. These are more comprehensively described in the list of
references 1-10 cited below in appendix A:
(a) Response, S e , (the relative change in resistance of a material in
presence or absence of a gas). In order to study the response, for
instance, there are two major definitions in literature: either S = |Rin-
R t Ri or simply S = t n where R is the resistance of the
sensor material when in presence of the analyte gas and R t is the
resistance in the absence of such a gas. Response as function of
temperature was already derived by the inventor to take the form of
S(T) = (Rin/Rout) exp((E -E0 n)/kBT)) or S(T) = 1- (Ri /R ) exp((Ea-
OP) BT where Ea and E , are the activation energies of the
sensor material in the absence and presence of the analyte gas
respectively and k is the Boltzmann constant. This equation
suggests that response increases (decreases) as temperature is
increased when Ea > E 0 h (Ea < E0in), that is, when the analytesensor
interaction is oxidative (reductive).
(b) Recovery, Sfec, the relative change in resistance from when the
sensor is fully exposed to the analyte and when the stimulus is fully
removed.
(c) Selectivity (the ability of a material to respond to that particular gas
and not to other gas types present).
(d) Response time, s, which is the period of time, tres taken for the
resistance to change {|Ri -R0 utl) to 90% of the original resistance or by
one-order of magnitude.
(e) Recovery time, t , the time taken for the resistance to return to
90% of the original resistance or by one-order of magnitude to the
original resistance after sensing).
Other parameters that important in deciding the performance of the sensors
are:
(f) Working temperature, Topt> which is the temperature at which the sensor
material must be heated up to in order to get the most optimum response
(g) Relative humidity of the surroundings (H).
(h) Atmospheric pressure (patm).
It was found in the prototype that for a V0 2 V20 5 system, the response time
is typically about 5 seconds but the recovery time is much longer which is
typical of nano-structures. This drawback can be address by introducing a
pulse in the gate and the sensor is refreshed again.
However, it has been found that the resistance-time profile of multiwall
carbon nano-tube have a faster response with the response time of lower
than 3 seconds and much more rapid recovery at 7 seconds. Thus there is
no need of a gate refreshing or UV light activation.
It should also be highlighted that response times and recovery times are
affected by the gate voltage (VGS) - This is illustrated in Figure 14(f) where
one can observe that recovery times is 20 minutes when s = but
become much shorter (about 1 minute) when bias voltage becomes -5V.
In order to pursue how selectivity, as in definition (c) above, gate voltages
are varies and corresponding drain-sources are taken before and after
exposure to various gases. In the prototype of the present invention it was
found that the drain current decreases as one sweeps the gate voltage
from negative voltage to positive. This is different from norma! back-gate
transistors where the drain current increases as one increases the gate
voltage. In the positive gate voltage, the drain current drastically drops to a
"pinch-off' state. Each gas environment gives a unique pinch-off voltage or
threshold voltage V . This property helps in calibrating each of the eight
sensors on this chip to a specific gas (Figure 11).
A plot of drain current against gate voltage when the chip is in normal air
and when under the influence of humid air shows a downward trend to a
drain current of zero where the threshold voltage value, VT, depends on the
environment surrounding the sensor. This trend shows that each gas
environment has its unique V .
Materials with the highest response are ideal but it would be futile if this
high response is only achieved at extremely low or high temperatures in
which case it will be energy expensive to operate such a sensor device. A
good sensor should have high response at room temperature even in
relatively high humidity conditions. These characteristics are necessitated
by the increasing demand for long battery lifetime. If the sensor has to be
heated above or cooled below room temperature, the demand on battery
power becomes enormous and the sensor cannot operate for a long
enough time. Operation at room temperature avoids this extra heating or
cooling. n addition, a good sensor must have a very short response time to
the analyte gas as well as a rapid recovery when the analyte gas is
removed. Response and recovery times are in turn temperature dependent.
All these good qualities are difficult to get out of a single material.
With the present invention, one gets closer to getting all the good qualities
of any single sensing material.
The inventor and collaborators have published a method of assessing
several sensing materials on the above properties. The method uses some
mathematical formulae which united sensor response S e , sensor recovery
S c, response and recovery times ( res , e ) , temperature T, atmospheric
pressure p, humidity H. The equation for how efficient any sensing material
can be is given as:
(7)
In this recent publication, the materials were contacted as powders. The
method was very crude in that the modes of contacts were not the same for
all materials considered.
In order to illustrate the present invention, one gives all the parameters
obtained by the crude method in Table 1 (where CoP stands for coefficient
of performance which is different from sensing efficiency) and compares
this with the properties for the same two materials tested so far - V0 2 and
Carbon nanotubes- on the invented microchip. This means that by
employing the new invention, one gets great performance improvements.
For instance, V0 nano-rods perform with 1 % efficiency improvement
when placed on the present micro-chip (from h = 36.5 to
h = 47.5) whereas carbon nanotubes improve from h - 8.5 to
h = 42.2 which is 34% efficiency improvement. This means practically any
sensing material can now sense at room temperature with this invention.
The invention not only displays better performance but shows the fastest
sensing and fastest recovery over and above what is in literature so far.
The efficiency improvement also comes with an added feature of selectivity
improvement. This is incorporated in the design by having the gate where
the voltage polarity and magnitude can both be used to tune the device to
be sensitivity to only certain gases and to "shut off other gases.
The ease of placing nano-materials on the device is another important
advantage of this invention.
in a prototype of the present invention, the detector was used to detect and
quantify the following gases which are typically emitted in the mines,
Methane (CH ) , radon (Rn), and industrial-related pollution such as
ammonia (NH3) , nitrogen oxides (NOx), carbon monoxide (CO) and silane
(SiH ) as shown in Figure 8 (e) where the V0 V 0 5 FET sensors display to
be more selective to NH3 than the other gases.
An innovative aspect of the present invention is the ability to use the gate
voltage as the "tuning" variable of the FET sensor. In accordance with
Equations 3 and 4, the drain-source current is affected greatly by the gate
voltage as in traditional FETs but, here, the drain current experiences
reversal in direction (negative conductance/resistance) when the gate
voltage exceed a characteristic threshold voltage (VT). This behavior is
novel in FETs and this is ascribed to the geometry of the interdigitate drain
source area and the gate. An added feature is the ability to display a hump
in the plot of response versus gate voltage. This hump appears at a
characteristic gate voltage for each material on the FET sensor as well as
for each stimulus. This has been tried before with backgate FETs [2,3]
where finally the research failed to show that the traditional backgate
transistor could show the same critical gate voltage regardless of the
concentration of the stimulating gas.
However in the present invention, regardless of the concentration of
acetone or level of humidity, both the V02/V205 and CNT FET sensor
show the repeatedly the same critical gate voltage for a particular gas.
These humps are in agreement with Equation 6 above. This will be a
turning point in the sensing industry across the globe where selectivity of
nano-materials has been the weakest link.
In Figure 16(a) is shown the response to different level of humidity of a
typical V02/V205 FET sensor on the invented chip versus gate voltage
and (b) an zoom-in of the lower humidity lineshapes. In both (a) and (b)
there is a characteristic optimum response to humidity at a critical gate
voltage of 8 V regardless of the level of humidity, in (c) response to different
levels of humidity of one of the eight CNT FET sensors versus gate voltage.
In this case the CNT responds to humidity optimally at a critical voltage of 3
V. In (d) is shown response of the one of the eight V02/V205 FET sensors
to both humidity and acetone vapor. Acetone, regardless the level of it,
shows a peak at VGS = -5V whereas humidity, regardless of the intensity of
it, shows a peak at VGS = 8 V
The detector could also be configured for the following uses:
• Detect breath odor from patients for early detection of diabetes,
renal (kidney and liver) failure and ulcers.
• Detection of parts per billion of gas concentrations emitted from
TNT and other explosives) from concealed explosives such as land
mines and mobile bombs in public places such as airports.
• Control of drug trafficking by detecting gases emitted from the
various types of intoxicating drugs such as mandrax, marijuana etc.
It will be appreciated that the FET described above, being at the nanoscale,
allows for room temperature gas detection enabling pollution
monitoring without the need of heating the sensors as is common in
traditional electronic noses.
Figure 12 shows an example application of the sensor to diabetes
monitoring. The invented sensor response is plotted against glucose
concentrations in a patient's blood. It will be appreciated that in the first
results, a linear correlation is suggestive between blood sugar and the
sensor response.
This shows that the painful finger-pricking ordeal a patient has to undergo
more than twice a day with traditional means of monitoring blood glucose
can be replaced with the device wherein the patient will simply be required
to exhale his/her breath onto the sensor and the same read-out of blood
sugar is obtained.
Integration on a single wafer of this kind, that is the traditional heater-based
sensors, is not possible with traditional gas sensors which employ a heater
for each sensor, as the heat from one spot flows to other parts of the chip.
In traditional gas sensors, the sensing material is heated via printed Pt or
CoPt electrodes at the back of the substrate on top of which the sensing
material is placed. The need for a heater at the back of the sensor device
stems from the observation that each particular gas interacts uniquely and
optimally with the sensor material at a specific optimum temperature. The
gap between the features on the printed heater can be 150 - 180 mhi.
Similarly, the feature size between the electrodes that harness the sensing
materials will traditionally have feature sizes of the same order of
magnitude as the printed heater.
If one has to place several such devices on one microchip, each device has
to be set at its particular temperature for that particular device to be
calibrated to a specific gas. It is difficult to place several of such sensing
modules in one micro-chip because the heat from one sensor would defuse
into other sensor devices if the devices are on a single substrate. In this
way, it would be extremely difficult to keep the temperature on a particular
device at a desired constant temperature since there would be a lot of
thermal cross-talk between the devices and, for this reason, gas specificity
has been the most difficult challenge in the contemporary gas sensing
community globally.
The new invention removes heating but rather controls the interaction of the
one gas with the sensing material via the gate voltage of the field-effect
transistor. The feature sizes can now be as small as 1 m h and therefore it
is possible now to place eight FET sensing modules in a very small spot
without suffering from the said cross-talk.
In any event, Figure 13 shows a schematic of how the invented micro-chip
including the plurality of FETs may be inter-connected with electronics
featuring interfaces with micro-processor, data storage and display of up to
eight different gases.
The signals received from the sensor are amplified and then converted to a
digital signal by an analogue to digital converter. The various signals from
each of the chips are multiplexed and then via a USB connector, fed into a
computer including software operating that processes the signals received
and allows them to be displayed, stored and manipulated.
Thus the processor receives signals from each of the field effect transistors
and processes the signals to determine the presence of one or more gases.
It will be appreciated that the size of the micro-chip makes it possible to
integrate with modern devices like cell phones receivers and other memory
devices
It will also be appreciated that in the present invention, there is no contact
between the gate and the drain-source. This yields new FET properties.
Random placement of nano-particles between the drain-source allows for
tuning of the channel-to-gate length (CGL) which is a new parameter to
FETs
Such LGNFETs are integrated onto a single 1mm by 1mm Si/Si02 wafer
making this micro-chip one of the smallest areas so far to contain up to
eight 8) sensing elements.
Each FET can be calibrated to sense one particular gas type making this
chip a 1 mm-square-eight-gas detector.
Figure 14(a) shows forward current-voltage characteristics for V02/V205
core-shell nano-ribbons in normal conditions for different levels of gate
voltage. In (b) is shown a plot of D versus VGS. Note the reversal in drain
current when VGS becomes greater than VT. In (c-d) are shown drain
current versus time as one of the eight V02/V205 FET sensor are exposed
to humid air of various relative humidity levels and as gate voltage (VGS) is
varied from 0 to 15V. in (e) are shown typical responses of V02 to various
gases (CO, CH4, N02, NH3 and H2S) and the preferential selectivity to
NH3. In (f) are shown resistance of the drain-source channel versus time as
the gate voltages are varied from -5V to 5V. Note the rapid recovery when
the sensor is biased with a gate voltage of -5V. More analysis of these data
are displayed in Figure 16.
Figure 15 shows (a) forward current-voltage (ID versus VDS)
characteristics for the MWCNT fibre (FET1) in normal conditions (b) D vs
VGS at a VDS = 5V of FET1 in normal atmospheris conditions and after
being exposed to humid air and acetone vapour; (c-d) drain current vs time
for FET 1 and FET 6 on the micro-nanochip in the presence of humid air (c)
at various gate voltage showing the increase and decrease in response to
humidity as the gate voltage is increased from 0 to 12V. The maximum
response shows at a VGS of 3-5V beyond which the humidity response
deceases.
Figure 16(a) Response to different level of humidity of a typical V02/V205
FET sensor on the chip versus gate voltage and (b) a zoom-in of the lower
humidity line shapes. In both (a) and (b) there is a characteristic optimum
response to humidity at a critical gate voltage of 8 V regardless of the level
of humidity (c) response to different levels of humidity of one of the eight
CNT FET sensors versus gate voltage. In this case the CNT responds to
humidity optimally at a critical voltage of 3 V. In (d) is shown response of
the one of the eight V02/V205 FET sensors to both humidity and acetone
vapor. Acetone, regardless the level of it, shows a peak at VGS = -5V
whereas humidity, regardless of the intensity of it, shows a peak at VGS = 8
Figure 17 (I) shows a family tree of all transistors and highlights where in
this family the present invention is located (II) Some distinguishing currentvoltage
characteristics of the present invention against traditional transitors.
(Ill) Exploded schematic diagrams showing (a) a traditional hot-plate
underneath an interdigitated platform whereupon the sensing materials are
placed (b) a traditional gasFET showing a gate electrode added and our
present heater-less gasFET. Note the difficulty and many processes in
designing and implementing schematic (b). However our present design in
(c) not only yields new FET properties but also it is an easier design to
implement as well as easier to introduce the active sensing material than
the traditional gasFET in (b).
Appendix A
[1 Bonex Mwakikunga, Sarah Motshekga, Lucky Sikhwivhilu, Mathew
Moodley, Gerald Malgas, Manfred Scriba, Suprakas Sinha-Ray, A
classification and ranking system on H2 gas sensing capabilities of nanomaterials
based on proposed coefficients of sensor performance and
sensor efficiency equations, Sensors & Actuators B 84 (2013) 170- 178
[2] Chao Li, Daihua Zhang, Xiaolei Liu, Song Han, Tao Tang, Jie Han, and
Chongwu Zhou, In203 nanowires as chemical sensors, Applied Physic
Letters 82 (2003) 1613-1615
[3] Daihua Zhang, Zuqin Liu, Chao Li, Tao Tang, Xiaolei Liu, Song Han, Bo
Lei, and Chongwu Zhou, "Detection of N02 down to ppb Levels Using
Individual and Multiple In203 Nanowire Devices, NANO LETTERS 2004
Vol. 4 , No. 10 1919-1924
[4] Arash Dehzangi, A Makarimi Abdullah, Farhad Larki, Sabar D
Hutagalung, Elias B Saion, Mohd N Hamidon, Jumiah Hassan and
Yadollah Gharayebi, Electrical property comparison and charge
transmission in p-type double gate and single gate junctionless
accumulation transistor fabricated by AFM nanolithography, Nanoscale
Research Letters 2012, 7:381
[5] Farhad Larki, Arash Dehzangi, E . B. Saion, Sabar D. Hutagalung,
A.Makarimi Abdullah, M. N .Hamidon, Study of carrier velocity of lateral
gate p-type silicon nanowire transistor (PSNWT), Solid State Science and
Technology Letter, Vol. 17 No.1 (2012)
[6] Farhad Larki, Sabar D. Hutagalung, Arash Dehzangi, E. B. Saion, Alam
Abedini, A. Makarimi Abdullah, M. N. Hamtdon, Jumiah Hassan, Electronic
Transport Properties of Junctionless Lateral Gate Silicon Nanowire
Transistor Fabricated by Atomic Force Microscope Nanolithography,
Microelectronics and Solid State Electronics 2012, 1(1): 15-20
[7] J. Martinez, R. V. Martinez, and R. Garcia, Silicon Nanowire Transistors
with a Channel Width of 4 nm Fabricated by Atomic Force Microscope
Nanolithography, NANO LETTERS 2008 Vol. 8, No. 11 3636-3639
[8] Bonex Mwakikunga, Suprakas Sihna Ray, Malose Mokwena, John
Dewar, Irina Giebelhaus, Tri!ok Singh, Thomas Fischer, Sanjay Mathur, Tin
dioxide nano-wire device for sensing kinetics of acetone and ethanol
towards diabetes monitoring, IEEE Sensors Xplore 2013
[9] Bonex Mwakikunga, Suprakas Sihna Ray, Malose Mokwena, John
Dewar, Irina Giebelhaus, Trilok Singh, Thomas Fischer, Sanjay Mathur,
IEEE Sensors Journal (2014)
[10] Heng Yuan, Bo Wang, Se-Hyuk Yeom, Dae-Hyuk Kwon, Shin-Won
Kang, Room temperature benzene gas detection using gated lateral BJT
with assembled so!vatochromic dye, IMCS 2012 - The 14th International
Meeting on Chemical Sensors.

CLAIMS:
1. A field effect transistor comprising:
a source including a plurality of electrode projections with spaces in
between;
a drain including a plurality of electrode projections each located in
one of the spaces between the electrode projections of the source
thereby forming a drain-source electrode connection area of
alternating drain and source projections;
a gate spaced apart from the drain-source electrode area thereby
forming a channel between the gate and the drain-source electrode
connection area wherein the gate runs parallel to the channel; and
a plurality of nano-structures located in the drain-source electrode
area thereby to form an electrical connection between the electrode
projections of the drain and source in the drain-source electrode
connection area.
2. A field effect transistor according to claim 1 wherein the drain, source
and the gate are in the same plane.
3 . A field effect transistor according to claim 1 or claim 2 wherein the
electrode projections of the drain are elongate in shape and connected
at or near one of their ends.
4 . A field effect transistor according to any preceding claim wherein the
electrode projections of the source are elongate in shape and
connected at or near one of their ends.
5 . A field effect transistor according to any preceding claim wherein the
plurality of nano-structures located in the drain-source electrode area
are positioned randomly on the drain-source electrode area.
6. A field effect transistor according to any preceding claim wherein the
drain-source electrode connection area is approximately 90 micron by
90 micron.
7. A gas detector including a plurality of field effect transistors located on a
substrate, each of the field effect transistors including:
a source including a plurality of electrode projections with spaces in
between;
a drain including a plurality of electrode projections each located in
one of the spaces between the electrode projections of the source
thereby forming a drain-source electrode connection area of
alternating drain and source projections;
a gate spaced apart from the drain-source electrode area thereby
forming a channel between the gate and the drain-source electrode
connection area wherein the gate runs parallel to the channel; and
a plurality of nano-structures located in the drain-source electrode
area thereby to form an electrical connection between the electrode
projections of the drain and source in the drain-source electrode
connection area.
8. A gas detector according to claim 7 including eight field effect
transistors located on a substrate.
9. A gas detector according to claim 7 or claim 8 wherein the gas detector
includes a processor to receive signals from each of the field effect
transistors and to process the signals to determine the presence of one
or more gases.