CLIAMS:
1. A system for synthesizing impedance in a radio frequency (RF) circuit, the system comprising:
a passive mixer, wherein the passive mixer is operable to:
receive a first signal at a radio frequency,
perform down-conversion of the first signal into an intermediate frequency;
an analogue to digital converter to convert the down-converted first signal into a digital signal;
a digital filter to perform convolution of the digital signal with an impulse response, wherein the impulse response is of a low frequency impedance and is programmable; and
a digital to analogue converter to generate a second signal at the intermediate frequency based on output of the convolution, wherein the second signal is fed back to the passive mixer.

2. The system as claimed in claim 1, wherein the passive mixer is further operable to:
receive the second signal;
perform up-conversion of the second signal; and
synthesize a desired impedance in the RF circuit, thereby controlling frequency response of the RF circuit.

3. The system as claimed in claim 2, wherein the passive mixer comprises one or more switches driven with clocking signals from a local oscillator.

4. The system as claimed in claim 3, wherein the desired impedance is dependent on frequency of the clocking signals from the local oscillator.

5. The system as claimed in claim 3, wherein the clocking signals have at least one of fundamental frequency and harmonics at the radio frequency.

6. The system as claimed in claim 3, wherein the clocking signals are one of overlapping and non-overlapping clocking signals.

7. The system as claimed in claim 1, wherein the intermediate frequency is one of zero hertz and non-zero hertz.

8. The system as claimed in claim 1, wherein the impulse response is one of real-valued function and complex-valued function.

9. The system as claimed in claim 1, wherein if the first signal is a voltage signal then the second signal is a current signal, and if the first signal is a current signal then the second signal is a voltage signal.

10. The system as claimed in claim 1, wherein the RF circuit is at least one of a low noise amplifier, a power amplifier device, and a pre-power amplifier.

11. The system as claimed in claim 1, wherein impulse response of the digital filter is implemented as at least one of a processor, a Field Programmable Gate Array, and an Application Specific Integrated Chip.

12. The system as claimed in claim 1, further comprising an image rejecting filter to attenuate image frequency components from the second signal.

13. The system as claimed in claim 1, further comprising an instantaneous response element to provide an approximation of the impulse response to the first signal, wherein the instantaneous response element is one of a passive component and an active component.

14. The system as claimed in claim 13, wherein the instantaneous response element is operable to perform analogue convolution on the first signal.

15. The system as claimed in claim 1, further comprising an anti-aliasing filter to filter the first signal.

16. A method of synthesizing impedance in a radio frequency (RF) circuit, the method comprising:
receiving a voltage signal at radio frequency in a passive mixer, wherein the passive mixer down-converts the voltage signal into an intermediate frequency;
converting the down-converted voltage signal into a digital signal;
performing convolution of the digital signal with an impulse response, wherein the impulse response is of a low frequency impedance and is programmable;
generating a current signal at the intermediate frequency based on output of the convolution;
performing up-conversion of the current signal in the passive mixer, wherein the passive mixer performs impedance transformation of the low frequency impedance; and
providing the current signal via the passive mixer to synthesize a desired impedance in the RF circuit, thereby controlling frequency response of the RF circuit.

17. The method as claimed in claim 16, wherein the desired impedance is dependent on frequency of clocking signals from a local oscillator.

18. The method as claimed in claim 16, wherein the passive mixer comprises one or more switches driven with one of overlapping and non-overlapping clocking signals.

19. The method as claimed in claim 16, wherein the impulse response is implemented in at least one of a processor, a Field Programmable Gate Array, and an Application Specific Integrated Chip.

20. A method of synthesizing impedance in a radio frequency (RF) circuit, the method comprising:
receiving a current signal at a radio frequency in a passive mixer, wherein the passive mixer down-converts the current signal into an intermediate frequency;
converting the down-converted current signal into a digital signal;
performing convolution of the digital signal with an impulse response, wherein the impulse response is of a low frequency impedance and is programmable;
generating a voltage signal at intermediate frequency, based on output of the convolution;
performing up-conversion of the voltage signal in the passive mixer, wherein the passive mixer performs impedance transformation of the IF impedance; and
providing the voltage signal via the passive mixer to synthesize a desired impedance in the RF circuit, thereby controlling frequency response of the RF circuit.

21. The method as claimed in claim 20, wherein the desired impedance is dependent on frequency of clocking signals from a local oscillator.

22. The method as claimed in claim 20, wherein the passive mixer comprises one or more switches driven with one of overlapping and non-overlapping clocking signals.

23. The method as claimed in claim 20, wherein the impulse response is implemented in at least one of a processor, a Field Programmable Gate Array, and an Application Specific Integrated Chip.
,TagSPECI:IMPEDANCE SYNTHESIS FOR OPTIMUM FREQUENCY RESPONSE OF RADIO FREQUENCY (RF) CIRCUITS

FIELD OF THE INVENTION

[1] The present invention relates to the field of impedance synthesis and more specifically to synthesizing impedance in a Radio Frequency (RF) circuit to alter frequency response of the RF circuit.

BACKGROUND

[2] Recent years have witnessed the advent of Radio Frequency (RF) circuits requiring filters with High Q factors and sharp stop bands. Existing systems are capable of providing filters with High Q factors and stop bands to RF circuits.

[3] One existing prior art employs SAW filters to provide filters with High Q factor in the RF circuits. SAW filters are filters with High Q factors and sharp stopbands. However, use of the SAW filter in RF circuits is associated with several drawbacks. Firstly, the SAW filters are too bulky to be realized on-chip. As a result, the SAW filters are implemented externally. Further, the SAW filters increase the size and cost of the RF circuits. Moreover, insertion loss of the SAW filters adds to the noise figure of the RF circuits. Furthermore, impulse response, filter bandwidth and center frequency of the SAW filter lack programmability. As a result, the RF circuits require a different SAW filter for every frequency, band and mode of operation. Moreover, the drawbacks of the SAW filter make the RF circuit bulky and expensive. As a result, there is a need for a low cost on-chip system capable of performing the function of a High Q filter in an RF circuit. Existing systems employ a plurality of methods to simulate a High Q filter in RF circuits.

[4] In another existing prior art, an RF circuit uses mixers, notch filters, amplifiers, and signal subtractors to simulate a filter in the RF circuit. In an example, a mixer in the RF circuit converts an RF signal at radio frequency to an Intermediate Frequency (IF) signal at Baseband frequency. Further, the RF circuit feeds the IF signal simultaneously into a first path and a second path. The first path includes a first amplifier. The IF signal fed into the first path is hereinafter referred to as a first signal. The first amplifier amplifies the first signal. The second path includes a notch filter and a second amplifier. The IF signal fed into the second path is hereinafter referred to as a second signal. The notch filter allows undesired frequency bands of the second signal to pass through and attenuates desired frequency bands of the second signal. Further, the second amplifier amplifies the second signal. A signal subtractor subtracts the second signal from the first signal. As a result, output of the signal subtractor lacks the undesired frequency bands. In effect, the RF circuit performs frequency translation of the low Q baseband filter to a High Q notch filter. However, the RF circuit has several disadvantages. Impulse response of the notch filter lacks programmability. Further, use of the signal subtractor, the first amplifier, and the second amplifier adds to the noise figure of the RF circuit.

[5] In yet another existing prior art, an RF circuit uses the impedance transformation property of passive mixers to generate a High Q band pass filter from a low Q baseband impedance. Center frequencies of the High Q band pass filters are governed by frequency of a local oscillator fed into the passive mixer. The system generates the High Q filter using a passive mixer based on switches and a low Q baseband impedance. In an example, the low Q baseband impedances are capacitors. However, impulse response of the High Q filters generated lack programmability.

[6] One solution to problems displayed by existing systems is synthesizing impedance in the RF circuit thereby altering frequency response of the RF circuit to frequency response of a High Q band pass filter.

[7] In light of the foregoing discussion, there is a need for a system to synthesize a High Q impedance in an RF circuit and thereby altering frequency response of the RF circuit to frequency response of a High Q band pass filter. It is desired that the system enables synthesis of High Q impedance in the RF circuit via impedance transformation of low Q baseband impedance. Moreover, it is desired that the synthesized High Q impedance in the RF circuit is programmable. Further, it is desired that the central frequency of frequency response of the RF circuit is programmable. It is desired that the impulse response of the High Q impedance filter is programmable. It is also desired that any type of filter be incorporated into the RF circuit through impedance transformation.

SUMMARY

[8] The above mentioned needs are met by a method and system for synthesizing impedance in an RF circuit.

[9] An example of a system for synthesizing impedance in a radio frequency (RF) circuit includes a passive mixer. The passive mixer is operable to receive a first signal at a radio frequency. The passive mixer is operable to perform down-conversion of the first signal into an intermediate frequency. Further, the system includes an analogue to digital converter to convert the down-converted first signal into a digital signal. Furthermore, the system includes a digital filter to perform convolution of the digital signal with an impulse response. The impulse response is of a low frequency impedance and is programmable. Furthermore, the system includes a digital to analogue converter to generate a second signal at intermediate frequency based on output of the convolution. The second signal is fed back to the passive mixer.

[10] An example of a method of synthesizing impedance in a radio frequency (RF) circuit includes receiving a voltage signal at radio frequency in a passive mixer. The passive mixer down-converts the voltage signal into an intermediate frequency. Furthermore, the method includes converting the down-converted voltage signal into a digital signal. Furthermore, the method includes performing convolution of the digital signal with an impulse response. The impulse response is of a low frequency impedance and is programmable. The method includes generating a current signal at intermediate frequency based on output of the convolution. Furthermore, the method includes performing up-conversion of the current signal in the passive mixer. The passive mixer performs impedance transformation of the baseband impedance. Moreover, the method includes providing the current signal via the passive mixer to synthesize a desired impedance in the RF circuit, thereby controlling frequency response of the RF circuit.

[11] An example of a method of synthesizing impedance in a radio frequency (RF) circuit includes receiving a current signal at radio frequency in a passive mixer. The passive mixer down-converts the current signal into an intermediate frequency. Further, the method includes converting the down-converted current signal into a digital signal. Moreover, the method includes performing convolution of the digital signal with an impulse response. The impulse response is of a low frequency impedance and is programmable. Furthermore, the method includes generating a voltage signal at intermediate frequency based on output of the convolution. Moreover, the method includes performing up-conversion of the voltage signal in the passive mixer. The passive mixer performs impedance transformation of the low frequency impedance. The method includes providing the voltage signal via the passive mixer to synthesize a desired impedance in the RF circuit, thereby controlling frequency response of the RF circuit.

[12] The features and advantages described in this summary and in the following detailed description are not all-inclusive, and particularly, many additional features and advantages will be apparent to one of ordinary skill in the relevant art in view of the drawings, specification, and claims hereof. Moreover, it should be noted that the language used in the specification has been principally selected for readability and instructional purposes, and may not have been selected to delineate or circumscribe the inventive subject matter, resort to the claims being necessary to determine such inventive subject matter.

BRIEF DESCRIPTION OF FIGURES

[13] In the following drawings like reference numbers are used to refer to like elements. Although the following figures depict various examples of the invention, the invention is not limited to the examples depicted in the figures.

[14] FIG. 1 is a block diagram of a system for performing impedance transformation with a passive mixer in accordance with a prior art;

[15] FIG. 2 is a block diagram of a system for synthesizing impedance in a Radio Frequency (RF) circuit, in accordance with one embodiment of the present invention;

[16] FIG. 3 is a block diagram of a system for synthesizing impedance in a Radio Frequency (RF) circuit with a quadrature passive mixer, in accordance with another embodiment of the present invention;

[17] FIG. 4 is a block diagram of a system for synthesizing impedance in a Radio Frequency (RF) circuit with a quadrature passive mixer, in accordance with yet another embodiment of the present invention; and

[18] FIG. 5 is a flowchart of method for synthesizing impedance in a Radio Frequency (RF) circuit, in accordance with one embodiment of the present invention.

DESCRIPTION

[19] In the present disclosure, relational terms such as first and second, and the like, may be used to distinguish one entity from the other, without necessarily implying any actual relationship or order between such entities. The following detailed description is intended to provide example implementations to one of ordinary skill in the art, and is not intended to limit the invention to the explicit disclosure, as one or ordinary skill in the art will understand that variations can be substituted that are within the scope of the invention as described.

[20] Embodiments of the present disclosure described herein disclose a method and system for synthesizing impedance in a Radio Frequency (RF) circuit. The present invention alters frequency response of the RF circuit into frequency response of a High Q impedance filter. The High Q impedance filter is synthesized from low Q low frequency impedance using the impedance transformation property of a passive mixer. The present invention enables the center frequency of frequency response of the High Q impedance to be programmed. Moreover, the present invention allows digital synthesis of High Q impedances in the RF circuit. The various methods and embodiments for synthesizing impedance in a Radio Frequency (RF) circuit are explained in detail in conjunction with the description of FIGs 2 to 5.

[21] FIG. 1 is a block diagram of a system for performing impedance transformation with a passive mixer in accordance with a prior art. The system includes a first low frequency impedance 115 whose impulse response is Zb(t)/2, and a second low frequency impedance 120 with impulse response Zb(t)/2. Further, the system includes a first switch 105, and a second switch 110. The first switch 105 and the second switch 110 function together as a passive mixer. Examples of the first switch 105 and the second switch 110 include but are not limited to MOS switches and CMOS switches. Gates of the first switch 105 and the second switch 110 are clocked by square wave signals from a local oscillator. The square wave signals fed to the gates of the first switch 105 and the second switch 110 are 180 degrees out of phase with each other. The passive mixer converts signals in Radio frequency to an intermediate frequency. Vrf (t) is voltage at the RF side of the system. Vb (t) is the voltage in the baseband side of the system. Irf (t) is the current in the RF side of the system.

[22] The first switch 105 and the second switch 110 commutes the current Irf (t) into the first low frequency impedance 115 and the second low frequency impedance 120. Further, the first switch 105 and the second switch 110 down-converts the signal at RF frequency to the intermediate frequency. Action of the first switch 105 and the second switch 110 results in the current Ib(t). Ib(t) is a down-converted version of Irf (t). The local oscillator generates a clocking signal c(t). The local oscillator operates at a frequency of ?LO. The current Ib(t) is the product of the current Irf (t) and a clocking signal c(t):

………………………………….. (1)

[23] After down conversion, the Irf (t) splits into different currents. Further, the generated currents have higher order harmonics at frequencies 3?Lo and 5?Lo. However, the higher order harmonics are ignored because of the baseband nature of the first low frequency impedance 115 and the second low frequency impedance 120. The fundamental components of Ib(t) are:

……………….. (2)

[24] The first low frequency impedance 115 and the second low frequency impedance 120 are assumed to be Linear Time Invariant systems. As a result, the voltage Vb (t) is convolution integral of the current Ib (t) and low frequency impedance Zb (t). Replacing Ib(t) with equation (2), the following equation is obtained:

……………………… (3)

[25] The first switch 105 and the second switch 110 act as the passive mixer and performs an up-conversion of the voltage Vb(t) to the Vrf(t). Further, voltage drops across the first switch 105 and the second switch 110 adds to the Vrf(t). Rsw is the resistance across the first switch 105 and the second switch 110. As a result, the value of Vrf(t) is calculated by the following equation:

……(4)

[26] Laplace transform converts equation (4) into the following equation.

……………….(5)

[27] Rearranging and omitting terms other than the terms signifying frequency of the local oscillator, ?Lo, we obtain the following equation:

……… (6)

[28] The term Vrf(s)/Irf(s) is the input impedance of the system. According to equation (6), the input impedance of the system is sum of switch resistance RSW and a band pass impedance. The band pass impedance is created by scaling and frequency shifting the low frequency impedance Zb(t). As a result, the system generates High Q band pass impedance from low frequency impedance. However, impulse response of the High Q band pass impedances lacks programmability.

[29] FIG. 2 is a block diagram of a system for synthesizing impedance in a Radio Frequency (RF) circuit, in accordance with one embodiment of the present invention. The system includes a passive mixer 210, a voltage buffer 215, an instantaneous response element 220, an Analogue to Digital Convertor (ADC) 225, a digital filter 230, and a Digital to Analogue Convertor (DAC) 235. Further, the system includes a port 205. Impedance across the port 205 determines frequency response of the RF circuit. The system synthesizes a desired impedance at the port 205. The desired impedance alters frequency response of the RF circuit into a desired frequency response. In one embodiment of the present invention, the desired impedance is a High-Q band pass impedance. The port 205 is a part of an RF circuit. Frequency response of the RF circuit depends on the impedance synthesized at the port 205. In one embodiment of the present invention, the RF circuit is atleast one of a Low noise amplifier, a Power amplifier, and a pre-power amplifier. The port 205 connects to the voltage buffer 215 via the passive mixer 210.

[30] The passive mixer 210 is a non-linear electronic circuit capable of altering frequency of an electronic signal. Process of altering frequency of an electronic signal from one frequency range to another is referred to as heterodyning. Types of the passive mixer 210 include, but are not limited to unbalanced mixers, balanced mixers, and double balanced mixers. The passive mixer 210 consists of switches S1 and S2. The passive mixer 210 receives a first signal at radio frequency from the port 205. The first signal is a voltage signal Vrf across the port 205. The switches S1 and S2 toggles between ‘ON’ and ‘OFF’ in accordance with a clocking signal from Local Oscillator. It is noted that frequency of the local oscillator determines center frequency and impulse response of the desired impedance generated at the port 205. The clocking signals received by the switches S1 and S2 are 180 degrees out of phase with each other. Further, the clocking signals have a duty cycle of 50%. The switches S1 and S2 down-converts the voltage signal Vrf having radio frequency to voltage signal Vif at an intermediate frequency. Further, the passive mixer 210 feeds the down-converted voltage Vif to the voltage buffer 215.

[31] The voltage buffer 215 is a buffer amplifier. The voltage buffer 215 transfers the voltage signal Vif from the passive mixer 210 to the instantaneous response element 220 and the ADC 225. The voltage buffer 215 is necessary to prevent input impedance of the ADC 225 from loading the passive mixer 210. Further, the voltage buffer 215 prevents the ADC 225 from excessively loading the port 205. The voltage buffer 215 is a unity gain amplifier. However, the voltage buffer 215 provides current gain and power gain to the voltage signal Vif. The voltage buffer 215 supplies the voltage signal Vif to the instantaneous response element 220 and the ADC 225.

[32] The ADC 225 converts the down-converted voltage signal Vif into a digital signal. Examples of the ADC 225 include but are not limited to a flash ADC, a successive approximation ADC, a ramp-compare ADC, and a Wilkinson ADC. The ADC 225 feeds the digital signal corresponding to the voltage signal Vif into the digital filter 230.

[33] The digital filter 230 simulates a signal processing component with a desired impulse response. To simulate the signal processing component, the digital filter 230 performs convolution of the digital signal and the desired impulse response. The desired impulse response is impulse response of a low frequency impedance filter. In one embodiment of the present invention, the filter is a low pass filter with a low Q. The desired impulse response is one of a real-valued function and a complex-valued function. As a result, output of the convolution is the digital signal filtered by the low pass filter. The impulse response of the digital filter 230 is programmable. In one embodiment of the present invention, the digital filter 230 is a processor. In another embodiment of the present invention, the digital filter 230 is at least one of a Field Programmable Gate Array and an Application Specific Integrated circuit. Further, the impulse response and frequency response of the digital filter 230 are programmable. The impulse response is implemented in at least one of a Field Programmable Gate Array (FPGA) and an Application Specific Integrated circuit. As a result, the digital filter 230 is capable of providing functionality of a plurality of signal processing components. Examples of signal processing components include but are not limited to Finite Impulse Response Filters, Chebyshev Filters, and Butterworth filters.

[34] In one embodiment of the present invention, the Digital filter 230 has the impulse response of a low pass filter. In another embodiment of the present invention, the digital filter 230 has the impulse response of a notch filter. In yet another embodiment of the present invention, the digital filter 230 has the impulse response defined by a user. Programmability of the impulse response of the digital filter 230 makes the system flexible and dynamic. Hence, the digital filter 230 performs convolution of the digital signal and the impulse response of the digital filter 230 to generate an output signal. The digital 230 filter supplies the output signal to the DAC 235.

[35] The DAC 235 receives the output signal from the digital filter 230. The DAC 235 generates a second signal. The second signal is a current at the intermediate frequency generated in accordance with the output signal of the digital filter 230. The intermediate frequency is one of zero hertz and non-zero hertz. Examples of the DAC 235 include but are not limited to Pulse width modulation DACs, delta-sigma DACs, and R2R ladder DACs. The DAC 235, the ADC 225, and the digital filter 230 work in combination to simulate a filter with impulse response equal to the impulse response of the digital filter 230. The DAC 235 supplies the current at the intermediate frequency to the passive mixer 210.

[36] The digital filter 230 is implemented on a processor. The processor requires significant amount of processing time to operate. Hence, a combination of the ADC 225, the digital filter 230, and the DAC 235 takes time to process the voltage signal and to simulate the baseband current. Thus, the combination fails to process high frequency voltage signals. Hence, the combination fails to simulate the filter with the desired impulse response for high frequency voltage signals. The instantaneous response element 220 is one of an active component and a passive component. Examples of the instantaneous response element 220 include but are not limited to resistors, capacitors, inductors, linear amplifiers, diodes and transistors. Hence the instantaneous response element 220 takes lesser time than the combination of the ADC 225, the digital filter 230, and the DAC 235 to process the voltage signals and generate the current signal at the intermediate frequency. Further, the instantaneous response element 220 provides impulse response equal to an approximation of the impulse response of the digital filter 230. The instantaneous response element 220 is further operable to perform analogue convolution on the first signal. Thus, the instantaneous response element 220 processes the voltage signals and generates the current signal at the intermediate frequency.

[37] The passive mixer 210 up-converts the current at intermediate frequency to radio frequency. Further, the passive mixer 210 supplies the up-converted current signal into the port 205. As a result, the system synthesizes the desired impedance at the port 205. The system generates the desired impedance by performing impedance transformation on the low frequency impedance of the digital filter 230. In effect, the system causes the port 205 to act as the desired impedance with impulse response equal to a frequency translated impulse response of the digital filter 230 and the instantaneous response element 220. Impulse response of the desired impedance is programmable because of programmability of the digital filter 230. Presence of the desired impedance in the RF circuit alters frequency response of the RF circuit into frequency response of an impedance filter with the desired impedance.

[38] FIG. 3 is a block diagram of a system for synthesizing impedance in a Radio Frequency (RF) circuit with a quadrature passive mixer 310, in accordance with one embodiment of the present invention. The system includes the passive mixer 310, a voltage buffer 315, an analogue filter 320, an Analogue to Digital Convertor (ADC) 325, a digital filter 330, a Digital to Analogue Convertor (DAC) 335, an instantaneous response element 340 and an image rejecting filter 345. Further, the system includes a port 305. Impedance of the RF circuit determines frequency response of the RF circuit. As a result, synthesizing impedance in the RF circuit alters frequency response of the RF circuit. The system synthesizes a desired impedance on the port 305. In one embodiment of the present invention, the desired impedance is High-Q impedance. The port 305 is a part of an RF circuit. Frequency response of the RF circuit depends on the impedance synthesized at the port 305. In one embodiment of the present invention, the RF circuit is atleast one of a Low noise amplifier, a Power amplifier, and a pre-power amplifier. The port 305 connects to the voltage buffer 315 via the passive mixer 310.

[39] The passive mixer 310 is a non-linear electronic circuit capable of altering frequency of an electronic signal. Process of altering frequency of an electronic signal from one frequency range to another is referred to as heterodyning. The passive mixer 310 consists of a plurality of switches. The passive mixer 310 receives a first signal at radio frequency from the port 305. The first signal is a voltage signal Vrf across the port 305. The plurality of switches include switches S1, S2, S3, and S4. The switches S1, S2, S3, and S4 in the passive mixer 310 senses the voltage signal Vrf across the port 305. The switches S1, S2, S3, and S4 toggles between ‘ON’ and ‘OFF’ in accordance with a clocking signal from Local Oscillator. The desired impedance is dependent on the local oscillator frequency. It is noted that frequency of the local oscillator determines center frequency of the desired impedance generated at the port 305. The clocking signals received by the switches S1, S2, S3, and S4 are 90 degrees out of phase with each other. Further, the clocking signals have a duty cycle of 25%. The switches S1, S2, S3, and S4 down-converts the voltage signal Vrf having radio frequency to a voltage signal Vif at intermediate frequency. Further, the passive mixer 310 feeds the voltage Vif to the voltage buffer 315. The passive mixer 310 provides control over phase response of the desired impedance generated at the port 305.

[40] The voltage buffer 315 is a buffer amplifier. The voltage buffer 315 transfers the voltage signal Vif from the passive mixer 310 to the analogue filter 320. The voltage buffer 315 is necessary to prevent input impedance of the ADC 325 from loading the passive mixer 310. Further, the voltage buffer 315 prevents the ADC 325 from excessively loading the port 305. The buffer amplifier in the voltage buffer 315 is a unity gain amplifier. However, the voltage buffer 315 provides current gain and power gain to the voltage signal Vif. The voltage buffer 315 supplies the voltage signal Vif to the analogue filter 320.

[41] The analogue filter 320 filters the voltage signal Vif to attenuate undesirable signals from the voltage signal Vif. The analogue filter 320 operates in the frequency range of the voltage signal Vif. The analogue filter 320 attenuates undesirable signals from the voltage signal Vif, and as a result, reduces dynamic range necessary for the ADC 325. Moreover, the analogue filter 320 is an anti-aliasing filter. The analogue filter 320 removes higher order harmonics generated by the local oscillator. Furthermore, the analogue filter 320 reduces sampling frequency required by the ADC 325. The analogue filter 320 supplies the output of the analogue filter 320 to the ADC 325.

[42] The ADC 325 converts the down-converted and filtered voltage signal Vif into a digital signal. The ADC 325 feeds the digital signal corresponding to the voltage signal Vif into the digital filter 330.

[43] The digital filter 330 simulates a signal processing component having a desired impulse response. To simulate the signal processing component, the digital filter 330 performs convolution of the digital signal and the desired impulse response. The desired impulse response is impulse response of a low frequency impedance filter. In one embodiment of the present invention, the filter is a low pass filter with a Low Q factor. As a result, output of the convolution is the digital signal filtered by the low frequency impedance filter. The impulse response of the digital filter 330 is programmable.

[44] In one embodiment of the present invention, the digital filter 330 is a processor. In another embodiment of the present invention, the digital filter 330 is at least one of a Field Programmable Gate Array and an Application Specific Integrated circuit. Further, impulse response and frequency response of the digital filter 330 are programmable. As a result, the digital filter 330 is capable of providing functionality of a plurality of signal processing components. In one embodiment of the present invention, the Digital filter 330 has the impulse response of a low pass filter. In another embodiment of the present invention, the digital filter 330 has the impulse response of a notch filter. In yet another embodiment of the present invention, the digital filter 330 has the impulse response defined by a user. Programmability of the impulse response of the digital filter 330 makes the system flexible and dynamic. Hence, the digital filter 330 performs convolution of the digital signal and the impulse response of the digital filter 330 to generate an output signal. The digital filter 330 supplies the output signal to the DAC 335.

[45] The DAC 335 receives the output signal from the digital filter 330. The DAC 335 generates a second signal at an intermediate frequency. In one embodiment of the present invention, the second signal is a voltage signal at the intermediate frequency. The voltage signal has the intermediate frequency. In another embodiment of the present invention, the second signal is a current signal generated at the intermediate frequency in accordance with the output signal of the digital filter 330. The DAC 335, the ADC 325, and the digital filter 330 work in combination to simulate a filter with impulse response equal to the impulse response of the digital filter 330. The DAC 335 supplies the current at the intermediate frequency generated in the DAC 335 to the passive mixer 310.

[46] The digital filter 330 is implemented on a processor. The processor requires significant amount of processing time to operate. Hence, a combination of the ADC 325, the digital filter 330, and the DAC 335 takes time to process the voltage signal and to generate the current signal at the intermediate frequency. The combination fails to process high frequency voltage signals if the time periods of the voltage signals are smaller than the processing time required by the processor. Hence, the combination fails to simulate the filter with the desired impulse response for high frequency voltage signals. The instantaneous response element 340 is one of an active component and a passive component. Hence the instantaneous response element 340 takes lesser time than the combination of the ADC 325, the digital filter 330, and the DAC 335 to process the voltage signals and generate the current signal. Further, the instantaneous response element 340 provides impulse response equal to an approximation of the impulse response of the digital filter 330. The instantaneous response element 340 is further operable to perform analogue convolution on the first signal. Thus, the instantaneous response element 340 processes the voltage signals and generates the current signal at the intermediate frequency. The image rejecting filter 345 filters the current signal at the intermediate frequency to attenuate undesirable signals at image frequencies. Examples of the image rejecting filter 345 include but are not limited to Butterworth filters, Chebyshev filters, and Elliptic filters.

[47] The passive mixer 310 up-converts the current at the intermediate frequency to radio frequency. Further, the passive mixer 310 supplies the up-converted current signal into the port 305. As a result, the system synthesizes a desired impedance at the port 305. The system generates the desired impedance by performing impedance transformation on the low frequency impedance of the digital filter 330. In effect, the system causes the port 305 to act as the desired impedance with impulse response equal to a frequency translated impulse response of the digital filter 330. Impulse response of the desired band pass impedance is programmable because of programmability of the digital filter 330. Presence of the desired band pass impedance in the RF circuit alters frequency response of the RF circuit into frequency response of the desired impedance.

[48] FIG. 4 is a block diagram of a system for synthesizing impedance in a Radio Frequency (RF) circuit, in accordance with one embodiment of the present invention. The system includes a passive mixer 410, a current buffer 415, an analogue filter 420, an Analogue to Digital Convertor (ADC) 425, a digital filter 430, a Digital to Analogue Convertor (DAC) 435 and an instantaneous response element 440. The instantaneous response element 440 is one of an active and a passive element. Further, the system includes a port 405. The system synthesizes a desired impedance on the port 405. In one embodiment of the present invention, the desired impedance is a High-Q impedance. The port 405 is a part of an RF circuit. Frequency response of the RF circuit depends on the impedance synthesized at the port 405. In one embodiment of the present invention, the RF circuit is atleast one of a Low noise amplifier, a Power amplifier, and a pre-power amplifier. The port 405 connects to the current buffer 415 via the passive mixer 410.

[49] The passive mixer 410 is a non-linear electronic circuit capable of altering frequency of an electronic signal. Process of altering frequency of an electronic signal from one frequency range to another is referred to as heterodyning. Types of the passive mixer 410 include, but are not limited to unbalanced mixers, balanced mixers, and double balanced mixers. The passive mixer 410 consists of switches S1, S2, S3, and S4. The passive mixer 410 receives a first signal at radio frequency from the port 405. The first signal is a current signal Irf flowing across the port 405. The switches S1, S2, S3, and S4 in the passive mixer 410 senses the current signal Irf across the port 405. The switches S1, S2, S3, and S4 toggles between ‘ON’ and ‘OFF’ in accordance with a clocking signal from Local Oscillator. The clocking signal has at least one of fundamental frequency and harmonics of the fundamental frequency at the radio frequency. The clocking signals are one of overlapping and non-overlapping signals. It is noted that frequency of the local oscillator determines center frequency of the desired impedance generated at the port 405. The clocking signals received by the switches S1, S2, S3, and S4 are 90 degrees out of phase with each other. Further, clocking signals have a duty cycle of 25%. The switches S1, S2, S3, and S4 down-converts the current signal Irf having radio frequency to current signal Iif at the intermediate frequency. Further, the passive mixer 410 feeds the current Iif to the current buffer 415. In one embodiment of the present invention, the passive mixer 410 consists of a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, and an eighth switch. Presence of four additional switches provides the passive mixer 410 with control over phase response of the desired impedance generated at the port 405. The local oscillator feeds each switch in the passive mixer 410 with a clocking signal with a duty cycle of 12.5%. The clocking signals received by the switches the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, the seventh switch, and the eighth switch are 45 degrees out of phase with each other. In another embodiment of the present invention, the passive mixer 410 includes one or more switches.

[50] The current buffer 415 is a buffer amplifier. The current buffer 415 transfers the current signal Iif from the passive mixer 410 to the analogue filter 420. The current buffer 415 is necessary to prevent input impedance of ADC 425 from loading the passive mixer 410. Further, the current buffer 415 prevents the ADC 425 from excessively loading the port 405. The current buffer 415 is a unity gain amplifier. However, the current buffer 415 provides voltage gain and power gain to the current signal Iif. The current buffer 415 supplies the current signal Iif to the analogue filter 420.

[51] The analogue filter 420 filters the current signal Iif to attenuate undesirable signals from the current signal Iif. The analogue filter 420 operates in the frequency range of the current signal Iif. The analogue filter 420 attenuates undesirable signals from the current signal Iif, and as a result, reduces dynamic range necessary for the ADC 425. Moreover, the analogue filter 420 is an anti-aliasing filter. The analogue filter 420 removes higher order harmonics generated by the local oscillator. Furthermore, the analogue filter 420 reduces sampling frequency required by the ADC 425. Furthermore, the analogue filter 420 reduces sampling frequency required by the ADC 425. The analogue filter 420 supplies the output of the analogue filter 420 to the ADC 425.

[52] The ADC 425 converts the down-converted current signal Iif into a digital signal. The ADC 425 feeds the digital signal corresponding to the current signal Iif into the digital filter 430.

[53] The digital filter 430 simulates a signal processing component with a desired impulse response. To simulate the signal processing component, the digital filter 430 performs convolution of the digital signal and the desired impulse response. The desired impulse response is impulse response of a low frequency impedance filter. In one embodiment of the present invention, the filter is a low pass filter with a Low-Q. As a result, output of the convolution is the digital signal filtered by the low frequency impedance filter. The impulse response of the digital filter 430 is programmable. Further, impulse response and the frequency response of the digital filter 430 are programmable. As a result, the digital filter 430 is capable of providing functionality of a plurality of signal processing components. In one embodiment of the present invention, the Digital filter 430 has the impulse response of a low pass filter. In another embodiment of the present invention, the digital filter 430 has the impulse response of a notch filter. In yet another embodiment of the present invention, the digital filter 430 has the impulse response defined by a user. Programmability of the impulse response of the digital filter 430 makes the system flexible and dynamic. Hence, the digital filter 430 performs convolution of the digital signal and the impulse response of the digital filter 430 to generate an output signal. The digital filter 430 supplies the output signal to the DAC 435.

[54] The DAC 435 receives the output signal from the digital filter 430. The DAC 435 generates a second signal at the intermediate frequency. The second signal is a voltage signal at the intermediate frequency generated in accordance with the output signal of the digital filter 430. The DAC 435, the ADC 425, and the digital filter 430 work in combination to simulate a filter with impulse response equal to the impulse response of the digital filter 430. The DAC 435 supplies the voltage signal to the passive mixer 410.

[55] The digital filter 430, is implemented on a processor. The processor requires significant amount of processing time to operate. Hence, a combination of the ADC 425, the digital filter 430, and the DAC 435 takes time to process the current signal Iif and to simulate the voltage at the intermediate frequency. The combination fails to process high frequency current signals if the time periods of the current signals are smaller than the processing time required by the processor. Hence, the combination fails to simulate the filter with the desired impulse response for high frequency current signals. The instantaneous response element 440 is one of an active component and a passive component. Hence the instantaneous response element 440 takes lesser time than the combination of the ADC 425, the digital filter 430, and the DAC 435 to process the current signals and generate the voltage signal at the intermediate frequency. Further, the instantaneous response element 440 provides impulse response equal to an approximation of the impulse response of the digital filter 430. The instantaneous response element 440 is further operable to perform analogue convolution on the first signal. Thus, the instantaneous response element 440 processes the current signals and generates the voltage signal at the intermediate frequency.

[56] The passive mixer 410 up-converts the voltage signal at the intermediate frequency to radio frequency. Further, the passive mixer 410 supplies the up-converted voltage signal into the port 405. As a result, the system synthesizes a desired impedance at the port 405. In one embodiment of the present invention, the desired impedance is a High-Q band pass impedance. The system generates the desired impedance by performing impedance transformation on the low frequency impedance of the digital filter 430. In effect, the system causes the port 405 to act as the desired impedance with impulse response equal to a frequency translated impulse response of the digital filter 430. Impulse response of the desired impedance is programmable because of programmability of the digital filter 430. Presence of the desired impedance in the RF circuit alters frequency response of the RF circuit into frequency response of the desired impedance.

[57] FIG. 5 is a flowchart of method for synthesizing impedance in a Radio Frequency (RF) circuit, in accordance with one embodiment of the present invention. Impedance of the RF circuit determines frequency response of the RF circuit. As a result, synthesizing impedance in the RF circuit alters frequency response of the RF circuit. A process illustrated by the flowchart begins at step 505.

[58] At step 510, a passive mixer receives a first signal at radio frequency across a port in the RF circuit. The passive mixer consists of switches S1 and S2. The switches S1 and S2 down-converts the first signal having radio frequency to an intermediate frequency. In one embodiment of the present invention, the first signal is a voltage signal. In another embodiment of the present invention, the first signal is a current signal.

[59] At step 515, an Analogue to Digital convertor (ADC) converts the down-converted first signal into a digital signal. The ADC feeds the digital signal into the digital filter.

[60] At step 520, a digital filter performs convolution of the digital signal and an impulse response of the digital filter. In one embodiment of the present invention, the digital filter is a processor. In another embodiment of the present invention, the digital filter is at least one of a Field Programmable Gate Array and an Application Specific Integrated circuit. The impulse response of the digital filter is programmable. The digital filter simulates a low frequency impedance filter in the system. Further, the digital filter performs convolution of the digital signal and an impulse response of the digital filter to generate an output signal. The impulse response is impulse response of a low frequency impedance filter. In one embodiment of the present invention, the filter is a low pass filter with a Low-Q factor. The digital filter supplies the output signal to a Digital to Analogue converter (DAC).

[61] At step 525, the DAC generates a second signal at intermediate frequency in accordance with the output signal of the digital filter. If the first signal is a voltage signal, then the second signal is a current signal at the intermediate frequency. If the first signal is a current signal, then the second signal is a voltage signal. The second signal is a signal having the intermediate frequency. The DAC supplies the second signal generated in the DAC to the passive mixer.

[62] At step 530, the passive mixer up-converts the second signal to radio frequency. As a result, the system synthesizes a desired impedance on the RF impedance. In one embodiment of the present invention, the desired impedance is a High-Q band pass impedance. The system generates the desired impedance by performing impedance transformation of a low frequency impedance. In effect, the system causes the port to act as a filter with impulse response equal to a frequency translated impulse response of the digital filter.

[63] At step 535, the passive mixer supplies the up-converted second signal to the RF circuit, thereby synthesizing a desired impedance in the RF circuit and in turn a desired frequency response in the RF circuit.

[64] The process ends at step 540.

[65] Advantageously, the embodiments specified in the present disclosure provide a method of synthesizing impedance in a Radio Frequency (RF) circuit. The proposed invention enables alteration of frequency response to an optimum value of the RF circuit by synthesizing impedance in the RF circuit. The proposed invention reduces use of active components in the RF circuit and as a result, the proposed invention avoids addition to noise figure caused by the active components. The proposed invention enables in reduction of chip size of RF circuits by eliminating the use of bulky SAW filters.

[66] In the preceding specification, the present disclosure and its advantages have been described with reference to the specific embodiments. However, it will be apparent to a person with ordinary skill in the art that various modifications and changes can be made, without departing from the scope of the present disclosure, as set forth in the claims below. Accordingly, the specification and figures are to be regarded as illustrative examples of the present disclosure, rather than in restrictive sense. All such possible modifications are intended to be included within the scope of present disclosure.