Abstract: A power semiconductor device (10) comprises a semiconductor body (11) which includes a first main surface (12) and a second main surface (13), a gate insulator (14) arranged at the first main surface (12), and a gate electrode (15) separated from the semiconductor body (11) by the gate insulator (14). The semiconductor body (11) comprises a drift layer (16) of a first conductivity type, a well layer (27) of a second conductivity type being different from the first conductivity type and forming a first junction (18) to the drift layer (16), a source region (20) of the first conductivity type forming a second junction (21) to the well layer (27), and an island region (30) of the second conductivity type attaching the source region (20) such that the source region (20) separates the island region (30) from the well layer (27) in at least 50 % of an island surface area of the island region (30) in the semiconductor body (11).
| # | Name | Date |
|---|---|---|
| 1 | 202447003226-STATEMENT OF UNDERTAKING (FORM 3) [17-01-2024(online)].pdf | 2024-01-17 |
| 2 | 202447003226-PROOF OF RIGHT [17-01-2024(online)].pdf | 2024-01-17 |
| 3 | 202447003226-PRIORITY DOCUMENTS [17-01-2024(online)].pdf | 2024-01-17 |
| 4 | 202447003226-FORM 18 [17-01-2024(online)].pdf | 2024-01-17 |
| 5 | 202447003226-FORM 1 [17-01-2024(online)].pdf | 2024-01-17 |
| 6 | 202447003226-DRAWINGS [17-01-2024(online)].pdf | 2024-01-17 |
| 7 | 202447003226-DECLARATION OF INVENTORSHIP (FORM 5) [17-01-2024(online)].pdf | 2024-01-17 |
| 8 | 202447003226-COMPLETE SPECIFICATION [17-01-2024(online)].pdf | 2024-01-17 |
| 9 | 202447003226-FORM-26 [20-02-2024(online)].pdf | 2024-02-20 |
| 10 | 202447003226-FORM 3 [11-06-2024(online)].pdf | 2024-06-11 |