We Claim:
1. A power semiconductor device (1) comprising a semiconductor body (2), a gate electrode (31), a source 5 electrode (32) and an extraction electrode (34), the gate electrode (31) is separated from the semiconductor body (2) by a gate insulator which is electrically insulating, wherein the semiconductor body (2) comprises:
- a source region (21) of a first conductivity type directly 10 at the source electrode (32) and directly at the gate
insulator,
- a well region (22) of a second conductivity type different from the first conductivity type directly at the gate insulator and directly at the source region (21),
15 - a drift region (23) which is of the first conductivity type that electrically follows the well region (22) at a side remote from the source region (21) and is directly at the gate insulator,
- an extraction region (27) directly at the extraction
20 electrode (34) which is of the second conductivity type, and
- a barrier region (28) assigned to the extraction electrode (34) which is of the first conductivity type, the barrier region (28) is located directly between the drift region (23) and the extraction electrode (34) so that the extraction
25 region (27) is located between the barrier region (28) and
the extraction electrode (34) and is surrounded all around by the barrier region (28) which forms a well the extraction region (27) is located in, and the barrier region (28) is distant from the gate insulator,
30 wherein the well region (22) and the extraction region (27) have the same maximum doping concentrations and/or the same doping depth profile.
2. The power semiconductor device (1) according to the preceding claim,
wherein the semiconductor body (2) further comprises a deep doping region (29) which is of the second conductivity type, 5 the deep doping region (29) is located between the barrier region (28) and at least part of the drift region (23), wherein a depth of the deep doping region (29) into the semiconductor body (2) exceeds a depth of the well region (22) .
10 3. The power semiconductor device (1) according to the preceding claim,
wherein the deep doping region (29) is located directly at least at some lateral sides of the barrier region (28), wherein a maximum doping concentration of the deep doping
15 region (29) exceeds a maximum doping concentration of the well region (22) by at least a factor of two.
4. The power semiconductor device (1) according to claim 2 or 3,
wherein a bottom side of the barrier region (28) is at least 20 partially free of the deep doping region (29).
5. The power semiconductor device (1) according to any one of the preceding claims,
wherein the semiconductor body (2) further comprises an enhancement region (26) which is of the first conductivity
25 type,
wherein the enhancement region (26) is located directly at a bottom side of the well region (22) so that the enhancement region (26) is located between the drift region (23) and the well region (22),
30 wherein a maximum doping concentration of the enhancement
region (26) exceeds a maximum doping concentration of the drift region (23) by at least a factor of two.
6. The power semiconductor device (1) according to any one of the preceding claims,
5 wherein the gate electrode (31) is accommodated in a trench, wherein the gate electrode (31) extends deeper into the semiconductor body (2) than the well region (22).
7. The power semiconductor device (1) according to claim 2 and according to the preceding claim,
10 wherein the deep doping region (29) extends at least as far into the semiconductor body (2) as the gate electrode (31).
8. The power semiconductor device (1) according to any one of the preceding claims,
wherein, seen in top view of the semiconductor body (2), the 15 gate electrode (34) comprises 2N stripes (51), N is a natural number larger than or equal to one,
wherein the 2N stripes (51) define N active cells (5) of the power semiconductor device (1).
9. The power semiconductor device (1) according to the 20 preceding claim,
wherein the source electrode (32) comprises N lines, wherein, seen in top view of the semiconductor body (2), each one of the N lines is assigned to one of the N active cells (5) and is located between the respective two stripes (51) of 25 the gate electrode (31).
10. The power semiconductor device (1) according to claim 8 or 9,
wherein N is a natural number larger than or equal to two, wherein the extraction electrode (34) comprises a plurality
of contact points (52),
wherein, seen in top view of the semiconductor body (2), the contact points (52) are arranged in each case between two adjacent active cells (5).
5 11. The power semiconductor device (1) according to the preceding claim,
wherein, seen in top view of the semiconductor body (2), the contact points (52) are arranged along a straight line, wherein the contact points (52) fill at most 5% of the 10 straight line, and
wherein a length of each one of the contact points (52) along the straight line is at most 508 of a distance between the adjacent active cells (5).
12. The power semiconductor device (1) according to any one 15 of the preceding claims,
wherein the semiconductor body (2) further comprises a plug (24) which is of the second conductivity type, wherein the plug (24) is configured to electrically contact the well region (22), 20 wherein the source region (21), the plug (24) and the
extraction electrode (31) are configured to be at the same electric potential.
13. The power semiconductor device (1) according to any one of the preceding claims,
25 which is an insulated-gate bipolar transistor, IGBT,
configured for a voltage of at least 0.65 kV between a drain electrode and an emitter electrode of the IGBT.
14. A method to produce a power semiconductor device (1) according to at least claim 5, the method comprising:
30 providing the semiconductor body (2) having the drift region
(23) which is of the first conductivity type, simultaneously creating the enhancement region (26) and the barrier region (28) which are of the first conductivity type, simultaneously creating the well region (22) and the 5 extraction region (27) which are of the second conductivity type different from the first conductivity type, creating a source region (21) which is of the first conductivity type, and
applying the source electrode (32) at the source region (21), 10 the gate electrode (31) at the well region (22) and the
extraction electrode (34) at the extraction region (27), the barrier region (28) is located directly between the drift region (23) and the extraction electrode (34).