The present invention relates to a clock synchronization system, clock synchronization method, and clock synchronization program. 10 [Background Art] [0002]
In recent years, systems which make a plurality of nodes existing in a network operate in a coordinated manner have been used. In such a network, it is important to synchronize times of a master node and a slave 15 node with each other. [0003]
Synchronization of time between a plurality of nodes is carried out
based on a clock synchronization protocol which uses Ethernet (registered
trademark) frames and is defined in, for example, IEEE1588v2 or the like.
20 However, when the clock synchronization protocol is used, precision of the
time regenerated in a communication environment with large delay
fluctuation may deteriorate. In addition, accuracy of the regenerated
time may also deteriorate due to asymmetry of delays.
[0004]
25 The Best Master Clock Algorithm, in which a node is selected to
synchronize with by using Clock Quality or the like, which is communicated by a master node with Announce Message, is widely known. However, because the algorithm selects a node based on only precision and accuracy of a master node, influence from delay fluctuation and delay

3 asymmetry on the network cannot be avoided.
[0005]
In PTL 1, a clock synchronization system is disclosed which accomplishes clock synchronization between a master and a slave without 5 using a boundary clock in a network including, in a portion thereof, asymmetric paths of forward and return transmission paths . [0006]
In PTL 2, a correction method is disclosed which corrects an inaccurate temporal synchronization which takes place due to an 10 asymmetric delay in a communication link. [0007]
In PTL 3, a clock synchronization system is disclosed which, between a master node and a slave node, computes a difference between the times of the master node and the slave node based on a queuing delay 15 which takes place on a communication message and synchronizes the time of the slave node with the time of the master node. [Citation List] [Patent Literature] [0008] 20 [PTL 1]
Japanese Patent Application Laid-Open No. 2009-065579 [PTL 2]
Japanese Patent Application Laid-Open No. 2007-174680
[PTL 3]
25 Japanese Patent Application Laid-Open No. 2011-135482
[Summary of Invention] [Technical Problem] [0009]
A method to correlate each information among a plurality of slave

4 nodes as disclosed in PTL 1 and Transparent Clock (TC) defined in
IEEE1588v2 are effective as a method to mitigate delay fluctuation and
asymmetry in a network. However, there is a problem such that, to use
these methods, it is necessary to implement an information communication
5 function among a plurality of slave nodes and for all nodes to implement
the TC function, and, thus, the cost may increase. Moreover, it is desired
to further improve the precision and accuracy of the time of a slave node.
[Solution to Problem]
[0010]
10 A clock synchronization system according to the present invention
is a clock synchronization system to synchronize a time on a slave node based on time information received from a plurality of master nodes via a network, and the slave node communicates with a plurality of master nodes to compute a propagation delay between each master node and the slave
15 node, and includes a time regeneration unit configured to regenerate a time of each master node, a time comparison unit configured to individually compute a comparison result between a time of each master node which the time regeneration unit regenerates individually and a reference time held by the slave node, and a reference time determination unit configured to
20 compute a correction value for each comparison result by carrying out weighting for each comparison result computed by the time comparison unit based on a propagation delay computed by the time regeneration unit, and determine a reference time of the slave node by using each correction value.
25 [0011]
A clock synchronization method according to the present invention is a clock synchronization method to carry out synchronization of a time on a slave node based on time information received from a plurality of master nodes via a network, in which the slave node regenerates a time of each

5 master node, computes a comparison result between the individually
regenerated time of each of the master nodes and a reference time held by
the slave node, carries out weighting for each of the comparison results
based on a propagation delay between each master node and the slave node
5 to compute a correction value for each regenerated time, and determines a
reference time of the slave node by using each correction value.
[0012]
A clock synchronization program according to the present invention
is a clock synchronization program which carries out synchronization of a
10 time on a slave node based on time information received from a plurality of
master nodes via a network, and the program acquires a regenerated time of
each master node, acquires a propagation delay between each master node
and the slave node, computes a comparison result between the acquired
time of each master node and a reference time held by the slave node,
15 computes a correction value by carrying out weighting for each comparison
result based on the propagation delay, and determines a reference time of
the slave node by using each correction value.
[Advantageous Effects of Invention]
[0013]
20 It is possible to improve precision and accuracy of a slave node at
low cost in carrying out synchronization of a time. [Brief Description of Drawings] [0014]
Fig. 1 is a block diagram illustrating a configuration of a clock 25 synchronization system of a first exemplary embodiment.
Fig. 2 is a diagram illustrating details of a time regeneration unit of the first exemplary embodiment.
Fig. 3 is a diagram illustrating details of a time comparison unit, time correction unit, and frequency regeneration unit of the first exemplary

6 embodiment.
Fig. 4 is a flowchart illustrating an operation of the clock synchronization system of the first exemplary embodiment.
Fig. 5 is a diagram illustrating an operation of a protocol 5 processing unit of the first exemplary embodiment.
Fig. 6 is a schematic diagram of a network of the first exemplary embodiment.
[Description of Embodiments]
[0015]
10 First exemplary embodiment
An exemplary embodiment of the present invention will be described below with reference to the accompanying drawings. Fig. 1 is a block diagram illustrating a configuration of a clock synchronization system 10 according to the present invention. 15 [0016]
The clock synchronization system 10 includes a first master node
101, a second master node 102, a third master node 103, and a slave node
104.
[0017]
20 The first master node 101 is a topmost clock generation point which
is located at a vertex of a master-slave synchronization network and generates a signal with a reference frequency in the network by itself. The first master node 101 outputs the signal with the reference frequency and protocol frames to a first time regeneration unit 105. 25 [0018]
The second master node 102 is a topmost clock generation point which is located at a vertex of the master-slave synchronization network and generates a signal with the reference frequency in the network by itself. The second master node 102 outputs the signal with the reference

7 frequency and protocol frames to a second time regeneration unit 106.
[0019]
The third master node 103 is a topmost clock generation point
which is located at a vertex of the master-slave synchronization network
5 and generates a signal with the reference frequency in the network by itself.
The third master node 103 outputs the signal with the reference frequency
and protocol frames to a third time regeneration unit 107. It is assumed
that each master node is synchronized with an identical synchronization
source, e.g. Global Navigation Satellite System (GNSS).
10 [0020]
The slave node 104 includes the first time regeneration unit 105, the second time regeneration unit 106, the third time regeneration unit 107, a time comparison unit 108, and a reference time determination unit 109. [0021]
15 The first time regeneration unit 105 conforms to the IEEE1588v2
protocol and regenerates the time generated by the first master node 101. The first time regeneration unit 105 outputs information of the regenerated time to a time comparison unit 108. Fig. 2 is a diagram illustrating details of the first time regeneration unit 105. The first time regeneration
20 unit 105 includes a counter unit 202, a protocol processing unit 203, and a time correction unit 204. The second time regeneration unit 106 and the third time regeneration unit 107, as with the first time regeneration unit 105, includes a counter unit 202, a protocol processing unit 203, and a time correction unit 204.
25 [0022]
The counter unit 202 is a free-running counter which keeps counting up at timings in accordance with an after-mentioned reference frequency. The counter unit 202 outputs information of the counting to the time correction unit 204.

[0023]
The protocol processing unit 203 carries out processing of the protocol frames received from a master node and computes a propagation delay and time difference between the master node and the slave node. 5 The protocol processing unit 203 outputs a result of the processing of the protocol frames to the time correction unit 204. An operation of the protocol processing unit 203 will be described in detail later. [0024]
The time correction unit 204, in accordance with the result of the 10 processing by the protocol processing unit 203, corrects the output from the counter unit 202. More specifically, based on the propagation delay and time difference computed by the protocol processing unit 203, the output of the counter unit 202 is corrected. The time correction unit 204 outputs a result of the correction to the time comparison unit 108. 15 [0025]
The time comparison unit 108 computes results of comparison between the times, each of which is input from any of the first time regeneration unit 105, second time regeneration unit 106, and third time regeneration unit 107, and comparison of each of the times with a reference 20 time of the slave node generated by a frequency regeneration unit 111.
The time comparison unit 108 outputs the comparison results to a statistic unit 110.
The time comparison unit 108 and the reference time determination unit 109 constitute a PLL (Phase Locked Loopback) circuit. Fig. 3 is a 25 diagram illustrating details of configurations of these units. The time comparison unit 108 includes a first comparison unit 301, a second comparison unit 302, and a third comparison unit 303. [0026]
The reference time determination unit 109 includes the statistic unit

9 1 ] 0 and the frequency regeneration unit 111.
[0027]
The statistic unit 110 carries out time correction based on the
comparison results input from the time comparison unit 108. The
5 statistic unit 110 outputs the result of the time correction to the frequency
regeneration unit 111. More specifically, the statistic unit 110 includes a
first correction unit (al) 304, a second correction unit (a2) 305, a third
correction unit (a3) 306, and a statistical processing unit 307.
[0028]
10 The frequency regeneration unit 111 generates a signal with a
reference frequency and outputs a reference time to the time comparison unit 1 08. More specifically, the frequency regeneration unit 111 includes a reference frequency generation unit 309 and a reference time generation unit 310.
15 [0029]
The first comparison unit 301 compares the time output by the first time regeneration unit 105 with the reference time output by the reference time generation unit 310. The first comparison unit 301 outputs the comparison result Tdl to the first correction unit 304.
20 [0030]
The second comparison unit 302 compares the time output by the second time regeneration unit 106 with the reference time output by the reference time generation unit 310. The second comparison unit 302 outputs the comparison result Td2 to the second correction unit 305.
25 [0031]
The third comparison unit 303 compares the time output by the third time regeneration unit 107 with the reference time output by the reference time generation unit 310. The third comparison unit 303 outputs the comparison result Td3 to the third correction unit 306. The

10 first comparison unit 301, the second comparison unit 302, and the third
comparison unit 303 are independent from one another.
[0032]
The first correction unit 304 carries out weighting for the 5 comparison result Tdl input from the first comparison unit 301. The first
correction unit 304 outputs a weighted comparison result Tel to the
statistical processing unit 307.
[0033]
The second correction unit 305 carries out weighting for the 10 comparison result Td2 input from the second comparison unit 302. The
second correction unit 305 outputs a weighted comparison result Tc2 to the
statistical processing unit 307.
[0034]
The third correction unit 306 carries out weighting for the 15 comparison result Td3 input from the third comparison unit 303. The
third correction unit 306 outputs a weighted comparison result Tc3 to the
statistical processing unit 307. A method of weighting will be described
with an example later.
[0035]
20 The statistical processing unit 307 carries out statistical processing
based on the comparison results Tel, Tc2, and Tc3 input from the first
correction unit 304, the second correction unit 305, and the third
correction unit 306, respectively. With this processing, the statistical
processing unit 307 determines a correction amount for the slave node 104. 25 For example, the statistical processing unit 307 converts the determined
correction amount to a voltage and outputs the voltage. A method of
statistical processing by the statistical processing unit 307 will be
described later in detail.
[0036]

11
The reference frequency generation unit 309 generates a signal with a reference frequency. Typically, the reference frequency generation unit 309 is a voltage control oscillator (VCO), which is a circuit that can control frequency of an output signal based on an input voltage. In the 5 following description, it is assumed that the reference frequency
generation unit 309 is a VCO. The VCO 309 outputs the generated signal with the reference frequency to the reference time generation unit 310. Because the VCO is well known to those skilled in the art and does not have direct relevance to the scope of the present invention, a description of
10 detailed configuration will be omitted. [0037]
The reference time generation unit 310, based on the signal with the reference frequency input from the VCO 309, generates the reference time. Because the configuration of the reference time generation unit 310 is well
15 known to those skilled in the art, a description of configuration details will be omitted. The reference time generation unit 310 outputs the generated reference time to the first comparison unit 301, the second comparison unit 302, and the third comparison unit 303. [0038]
20 Next, detailed operation will be described below. Fig. 4 is a
flowchart of an operation of the clock synchronization system. [0039]
First, the time regeneration units acquire time information from the master nodes (step SI). Fig. 5 illustrates an example of an operation
25 using the protocol processing unit 203 between the first master node 101 and the slave node 104. In this description, an operation which conforms to the two-step operation of IEEE1588v2 will be described. [0040]
The master node 101 transmits a Sync message. At the

12 transmission, the master node 101 records a transmission time Tl (step
Sll).
[0041]
The slave node 104 receives the Sync message. At the reception, 5 the slave node 104 records a time T2 (step S12). [0042]
The master node 101 transmits the time Tl as a Follow-up message
(step S13).
[0043]
10 The slave node 104 transmits a Delay-Request message to the
master node 101 and records a transmission time T3 of the transmission (step S14). [0044]
The master node 101 records a time T4 at which the Delay-Request 15 message is received and transmits the time T4 as a Delay-Response message to the slave node 104 (step S15). [0045]
The protocol processing unit 203 determines the time of the slave node by using these pieces of time information Tl, T2, T3, and T4. A 20 procedure of the determination will be described below. [0046]
When it is assumed that T2 and T3 denote times on the slave node, an offset in a difference of a time on the slave node from a time (absolute time) on the master node is denoted by a, T2' denotes an absolute time at 25 which the slave node receives the Sync message, and T3' denotes an
absolute time at which the slave node transmits the Delay-Request message, the times T2 and T3 are expressed by the following formulae (1) and (2).
T2 = T2' + a ... (1)
T3 = T3' + a . . . (2)

13 [0047]
When it is also assumed that a propagation delay between the
master node 101 and the slave node 104 is denoted by D, T2' and T3' are
expressed by the formulae (3) and (4).
5 T2' = Tl + D . . . (3)
T4 = T3' + D, i.e. T3' = T4 - D . . . (4)
[0048]
From the formulae (1), (2), (3), and (4), a is expressed by the
following formulae.
10 a = T2 - T2' = T2 - (Tl + D) = T2 - Tl - D . . . (5)
a = T3 - T3' = T3 - (T4 - D) = T3 - T4 + D . . . (6)
From the formulae (5) and (6),
a = T2 - Tl - D = T3 - T4 + D . . . (7)
When the formula (7) is deformed,
15 2D = T2 - Tl - T3 + T4 = (T2 - Tl) + (T4 - T3)
D = {(T2 - Tl) + (T4 - T3)} / 2 ... (8)
[0049]
The protocol processing unit 203 can, with the formula (8),
compute the propagation delay D regardless of the time difference between
20 the slave node 104 and the master node 101. The protocol processing unit
203 can also compute the time difference between the slave node and the
master node based on the propagation delay D by using the formulae (1)
and (2).
[0050]
25 The protocol processing unit 203 outputs the propagation delay D
and the offset a to the time correction unit 204. The time correction unit
204 generates a regenerated time by adding the offset a to the counter
output from the counter unit 202.
[0051]

14 Next, the time comparison unit 108 outputs differences of times
input individually from a plurality of master nodes (step S2). In this
processing, while the regenerated time indicates an accurate time in an
ideal environment in which network delays are static and the delays are
5 symmetric, a delay amount is not static and symmetry is not assured due to
collisions of traffic or the like in an actual network. Therefore, the time
comparison unit 108 compares each regenerated time, which is generated
by each of the first time regeneration unit 105, the second time
regeneration unit 106, and the third time regeneration unit 107, with the
10 reference time generated by the frequency regeneration unit 111, and outputs the differences between the times as comparison results. [0052]
The statistic unit 110 carries out weighting for each comparison result output by the time comparison unit 108 (step S3). Specifically, the
15 first correction unit 304, the second correction unit 305, and the third
correction unit 306 carry out weighting for the comparison results output by the first comparison unit 301, the second comparison unit 302, and the third comparison unit 303, respectively. In this processing, weight is given so as to be inversely proportional to the propagation delay D but
20 proportional to clock precision of a master node. The clock precision of a master node is communicated from the master node with Clock Quality by Announce Message based on lEEE1588v2. [0053]
When a difference between the times output by each of the
25 comparison units 301, 302, and 303 is denoted by Td, the propagation
delay is denoted by D, and the clock precision of a master node is denoted by Q, a correction value Tc which is used for the statistical processing by the statistical processing unit 307 is expressed by the following formula (9).

15 Tc = Td X Q / D . . . (9)
[0054]
In this processing, small propagation delay D indicates that the
transmission distance between the master node and the slave node is short.
5 The slave node 104 prioritizes time information from a master node located
in a short distance and also prioritizes time information with high
precision.
[0055]
Fig. 6 is a schematic diagram illustrating a network of the clock
10 synchronization system 10. Referring to Fig. 6, the fact that, in the formula (9), the smaller the propagation delay D is, the shorter the transmission distance between the master node and the slave node is, will be described, and a reason for which the correction value Tc is determined so as to be inversely proportional to the propagation delay D will be
15 described. [0056]
For example, it is assumed that between the master node 101 and the slave node 104, a first Network Element (NE: network device such as a switch and a router) 505 and a second NE 506 exist, and, in a similar
20 manner, there is no NE between the master node 102 and the slave node
104, and there exists an NE 507 between the master node 103 and the slave
node 104.
[0057]
In the schematic diagram of Fig. 6, each of the master nodes, the
25 slave node, and each of the NEs are connected by wire or wireless
communication channels, and transmission time thereof is proportional to the transmission speed and transmission distance of, if a wire communication channel is used, an electrical signal or an optical signal and, if a wireless communication channel is used, a radio signal.

16 Although the transmission time varies slightly depending on the condition
of a transmission path, the transmission time hardly influences the
fluctuation of an internode transmission delay.
[0058]
5 The propagation delay D is mainly influenced by internal delays of
an NE. This is because at minimum a delay equivalent to the duration of
one frame is caused by a store-and-forward transmission method employed
by a usual NE, and, depending on a communication condition of the
network, buffering inside the NE further increases the delay. The length
10 itself of the propagation delay D is dominantly influenced by the buffering, and thus a delay variation amount is correlated with a propagation delay. [0059]
Accordingly, the greater the delay variation amount is, the longer the propagation delay D tends to become. Therefore, in the formula (9),
15 the correction value Tc is inversely proportional to the propagation delay D. [0060]
Next, the statistical processing unit 307 carries out statistical processing (step S4). Specifically, to the statistical processing unit 307,
20 Tcl, Tc2, and Tc3, which correspond to the master nodes 101, 102, and 103, respectively, are input. The statistical processing unit 307 independently computes mean values and sample variances with respect to Tcl, Tc2, and Tc3 and computes median values based on the computed mean values and sample variances. As described above, the statistical processing unit 307,
25 by estimating the time on the master node with which the slave node 104 should synchronize based on the regenerated times input from a plurality of master nodes, improves the precision and accuracy of the regenerated time. The statistical processing unit 307, based on the results of the statistical processing, determines a control voltage to the VCO 309 in the

17 frequency regeneration unit 111 and outputs the determined voltage.
[0061]
Lastly, the frequency regeneration unit 111, based on the statistical
results computed by the statistical processing unit 307, computes the time
5 on the slave node 104 (step S5). Specifically, the VCO 309 outputs a
clock signal in accordance with the control voltage output by the statistical
processing unit 307 based on the statistical results, and uses the frequency
of the clock signal as the reference frequency. The reference time
generation unit 310, based on the reference frequency, generates the
10 reference time.
[0062]
With this processing, by using signals from a plurality of
synchronization sources independently, it is possible to improve the
precision and accuracy of the time which is eventually acquired on the
15 slave node.
[0063]
In other words, on the slave node, by carrying out weighting
individually for each regenerated time acquired from a plurality of master
nodes and carrying out statistical processing independently to the weighted
20 values, it is possible, even in an environment which has fluctuation and
asymmetry in the network delay, to improve the precision and accuracy of
the regenerated time. On the slave node, it is also possible to improve
the precision of the regenerated frequency by improving the precision of
the regenerated time. Moreover, on the slave node, it is possible to
25 implement an independent time regeneration unit, time comparison unit,
and time correction unit by software, and thus no increase in the hardware
cost is caused.
[0064]
The present invention is not limited to the above-described

18 exemplary embodiment, and appropriate modifications can be made
without departing from the scope of the invention. For example, although
in the above description, a case in which three master nodes exist, and,
based on times acquired from the three master nodes, the precision and
5 accuracy of the time on a slave node are improved is described, the number
of masters and slaves can be any number of N (N denotes an integer of 2 or
more). Although the above description is based on the assumption that
IEEE1588v2 is used as a protocol for time synchronization, it is possible to
make the protocol processing unit in the time regeneration unit operate
10 based on another time synchronization protocol. Although a case of
two-step operation is described, even one-step operation does not produce any difference to the time regeneration operation. Although the time regeneration unit in the time regeneration unit is configured to carry out processing to correct a counter which operates in the reference frequency,
15 the processing is not limited to this configuration and a configuration by which the time on the master node can be regenerated suffices. Although a case of using, as weight in the time correction unit, an inverse proportion to the propagation delay, which is computed by using Delay Request and Delay Response of the lEEE1588v2 protocol, is described, if an actual
20 measurement of a network delay at each master node by an external
measuring instrument or the like is possible, the measured value may be used. Although, in the formula (9), three values, specifically the time difference Td, the propagation delay D, and the clock precision Q of the master node, are used for the determination of the correction value Tc, the
25 correction value Tc may be determined by using only the time difference Td and the propagation delay D. Moreover, for example, if the transmission distance between each master node and the slave node, or the like, is clarified in advance when the correction value Tc is determined, the transmission distance may be used in place of the propagation delay D.

19 The communication quality Q may be determined manually in advance
instead of being acquired through communication with the master node.
[0065]
Although, in the above description of the exemplary embodiment,
5 the present invention is assumed to be configured with hardware, the
present invention is not limited to the configuration. It is also possible to
implement any processing in the present invention by making a CPU
(Central Processing Unit) execute computer programs. In this case, it is
possible to provide the computer programs by recording the computer
10 programs in a recording medium, and it is also possible to provide the
computer programs by transmitting the computer programs via the Internet or other communication media. The recording media include, for example, a flexible disk, a hard disk, a magnetic disk, a magneto-optical disk, a CD-ROM, a DVD, a ROM cartridge, a RAM memory cartridge with
15 battery backup, a flash memory cartridge, and a non-volatile RAM cartridge. The communication media include a wire communication medium such as a telephone line and a wireless communication medium such as a microwave line. [Industrial Applicability]
20 [0066]
Use of the present invention on network equipment on which clock synchronization needs to be carried out, such as Long Term Evolution (LTE)-Time Division Duplex (TDD), is expected. Other than the network equipment, it is also possible to apply the present invention to all types of
25 equipment, which carries out clock synchronization by using IEEE1588v2 or NTP and on which an improvement in the precision of clock synchronization is required. Moreover, an improvement in the precision of frequency is also achievable by the improvement in the precision of clock synchronization, and thus the present invention can be applied to

20 fields where frequency synchronization with a high precision needs to be
accomplished.
[0067]
This application is based upon and claims the benefit of priority
5 from Japanese patent application No. 2012-137859, filed on June 19, 2012,
the disclosure of which is incorporated herein in its entirety by reference.
[Reference signs List]
[0068]
10 Clock synchronization system
10 101 First master node
102 Second master node
103 Third master node
104 Slave node
105 First time regeneration unit
15 106 Second time regeneration unit
107 Third time regeneration unit
108 Time comparison unit
109 Reference time determination unit
1 10 Statistic unit
20 111 Frequency regeneration unit
202 Counter unit
203 Protocol processing unit
204 Time correction unit
301 First comparison unit
25 302 Second comparison unit
303 Third comparison unit
304 First correction unit
305 Second correction unit
306 Third correction unit

21 307 Statistical processing unit
309 Reference frequency generation unit (VCO: Voltage Control Oscillator)
310 Reference time generation unit
5 505, 506, 507 Network Element (NE)

WE CLAIMS:-
A clock synchronization system which carries out synchronization of a time on a slave node based on time information received from a 5 plurality of master nodes via a network,
wherein the slave node comprises:
a time regeneration means that communicates with the master nodes, the number of which is N, computes a propagation delay between each master node and the slave node, and regenerates a time of each master 10 node;
a time comparison means that computes a comparison result
between a time of each master node, which is individually regenerated by
the time regeneration means, and a reference time held by the slave node;
and
15 a reference time determination means that, by carrying out
weighting for each comparison result computed by the time comparison means based on the propagation delay computed by the time regeneration means, computes a correction value for each comparison result and determines a reference time of the slave node by using each correction 20 value.
[Claim 2]
The clock synchronization system according to claim 1,
wherein the reference time determination means carries out weighting to the comparison result computed by the time comparison 25 means based on a clock precision acquired from each master node in
addition to the propagation delay to compute a correction value for each comparison result and determines the reference time of the slave node by using each correction value.
[Claim 3]

23 The clock synchronization system according to claim 1 or 2,
wherein the reference time determination means determines the
reference time of the slave node based on each computed correction value
and determines a reference frequency of the slave node.
5 [Claim 4]
The clock synchronization system according to any one of claims 1
to 3,
wherein the reference time determination means comprises:
a statistic means, comprising
10 a correction means that outputs a correction value which is
computed by carrying out weighting for each of the comparison results
computed by the time comparison means; and
a statistical processing means that carries out statistical
processing for each of the correction values output by the correction means
15 and outputs a result of the statistical processing; and
a frequency regeneration means, comprising:
a reference frequency generation means that generates a
reference frequency based on the result of the statistical processing; and
a reference time generation means that, based on the
20 reference frequency generated by the reference frequency generation
means, generates a reference time of the slave node.
[Claim 5]
The clock synchronization system according to any one of claims 1
to 4,
25 wherein the reference time determination means computes a mean
value and a sample variance for each of the correction values
independently, computes a median value based on the computed mean and
sample variance, and determines the reference time of the slave node.
[Claim 6]

24 The clock synchronization system according to any one of claims 1
to 5,
wherein the time regeneration means comprises:
a counter means that keeps counting up at timings in accordance 5 with the reference frequency;
a protocol processing means that, based on a delay time in transmission and reception of a protocol, computes a propagation delay and a time difference between the master node and the slave node; and
a time integration means that, based on the propagation delay and 10 the time difference computed by the protocol processing means, corrects a count of the counter means.
[Claim 7]
The clock synchronization system according to any one of claims 1
to 6,
15 wherein the reference time determination means carries out
weighting for each comparison result computed by the time comparison means based on a transmission distance between the master node and the slave node, computes each correction value, and determines the reference time of the slave node by carrying out statistical processing by using each 20 correction value.
[Claim 8]
A clock synchronization method which carries out synchronization of a time on a slave node based on time information received from a plurality of master nodes via a network, the method comprising the steps of, 25 executed by the slave node:
regenerating a time of each master node;
computing a comparison result between an individually regenerated time of each master node and a reference time held by the slave node;
carrying out weighting for each comparison result based on a

25 propagation delay between each master node and the slave node to compute
each correction value; and
determining a reference time of the slave node by using each
correction value.
5 [Claim 9]
A storage medium storing a clock synchronization program which
carries out synchronization of a time on a slave node based on time
information received from a plurality of master nodes via a network,
wherein the program carries out the steps of:
10 acquiring a regenerated time of each master node;
acquiring a propagation delay between each master node and the slave node;
computing a comparison result between the acquired time of each
master node and a reference time held by the slave node;
15 computing each correction value by carrying out weighting for each
comparison result based on the propagation delay; and
determining a reference time of the slave node by using each correction value.