[0001]The present invention relates to a video coding technique using a block division structure based on the quadtree and binary tree. BACKGROUND [0002] 　The video coding method described in Non-Patent Document 1, each frame of digitized video coding tree unit: is divided into (CTU Coding Tree Unit), each CTU is encoded in raster scan order. [0003] 　Each CTU is quadtree: In (QT Quad-Tree) structure encoding unit: is divided into (CU Coding Unit) to be encoded. Each CU has prediction unit: is predictive encoded is divided into (PU Prediction Unit). Note that the predictive coding is an intra prediction and inter-frame prediction. [0004] 　Prediction error of each CU is a quadtree structure, conversion unit: is divided into (TU Transform Unit) and is transform coding based on the frequency conversion. [0005] 　The most up to a large size of the CU CU (LCU: Largest Coding Unit), the minimum CU the CU smallest size: referred to as (SCU Smallest Coding Unit). It should be noted, it is the same as the LCU size and the CTU size. [0006] 　Next, intra prediction and inter-frame prediction, and, CTU, CU, signaling PU and TU will be described. [0007] 　Intra prediction is a prediction coded frame and the display time to generate the predicted image from the same reconstructed image. Non-Patent Document 1, the 33 kinds of angle intra prediction shown in FIG. 9 are defined. Angle intra prediction, extrapolating the reconstruction pixels around the target block to one of 33 different directions, and generates an intra prediction signal. In addition, Non-Patent Document 1, in addition to 33 kinds of angle intra prediction, DC intra prediction to average reconstruction pixels around the encoding target block, and a linear interpolation reconstruction pixels around the encoding target block Planar intra prediction is defined. Hereinafter, the encoded CU based on the intra prediction is called an intra CU. [0008] 　Inter-frame prediction is a prediction coded frame and the display time to generate the predicted image different from the reconstructed image (reference picture). Hereinafter also referred to as inter prediction interframe prediction. Figure 10 is an explanatory diagram showing an example of inter-frame prediction. Motion vector = MV (mv x , mv y ) indicates the amount of parallel movement of the reconstructed image blocks of the reference picture for the encoding target block. Inter prediction based on the reconstructed image block of the reference picture (using the pixel interpolation if necessary), and generates an inter prediction signal. Hereinafter, the encoded CU based on inter-frame prediction is called an inter CU. [0009] 　Intra CU only coded frames I-frame (or, I-picture) is called. The frame inter CU also encoded to include not only the intra CU P-frame (or, P-picture) is called. Not only one reference picture in the inter prediction block, is further encoded frames including inter CU using two reference pictures simultaneously called B frame (or, B-picture). [0010] 　Skip mode, target CU is predicted coded in frame prediction based on the shape of 2N × 2N of PU division shape to be described later, and indicates that there is no transformed and quantized values ​​which will be described later. Whether the CU is a skip mode is signaled by skip_flag syntax that is described in Non-patent Document 1. [0011] 　Each CU is not a skip mode is whether it is intra CU / inter CU, signaled by pred_mode_flag syntax that is described in Non-patent Document 1. [0012] 　11, the spatial resolution of the frame CIF (CIF: Common Intermediate Format), CU example of division of CTU example of divided frame t when CTU size is 64, and the eighth of CTU included in the frame t (CTU8) it is an explanatory view showing a. [0013] 　Figure 12 is an explanatory diagram showing a quadtree structure corresponding to the CU example of dividing CTU8. Quadtree structure of each CTU, i.e., CU division shape is signaled by cu_split_flag syntax that is described in Non-patent Document 1. [0014] 　Figure 13 is an explanatory diagram showing a PU division shape of CU. For intra CU, it can be selected PU split square. For inter CU, rectangular PU split in addition to a square can also be selected. PU division shape of each CU is signaled by part_mode syntax that is described in Non-patent Document 1. [0015] 　Figure 14 is an explanatory diagram showing a TU division example of CU. In the upper part, TU division example of an intra CU of 2N × 2N PU division shape is shown. For intra CU, quarter tree root (Root) is disposed in PU, the prediction error of each PU is represented by quadtree structure. In the lower part, TU division example of inter CU of 2N × N PU division shape is shown. For inter CU, quarter tree root (Root) is disposed in CU, the prediction error of the CU is represented by quadtree structure. Quadtree structure of the prediction error as described above, i.e., TU division shape of each CU is signaled by split_tu_flag syntax described in Non-Patent Document 1. [0016] 　Thus, the intra-prediction and inter-frame prediction, and ends CTU, CU, the description of the PU and TU signaling. [0017] 　Next, with reference to the block diagram of FIG. 15, and outputs the bit stream as the CU input image of each frame of the digitized video, the structure and operation of a typical video encoder. [0018] 　Video encoding apparatus shown in FIG. 15 includes a transformer / quantizer 101, entropy encoder 102, inverse quantizer / inverse transformer 103, buffer 104, predictor 105, and multiplexer 106. [0019] 　Predictor 105, for each CTU, determines the cu_split_flag syntax value that determines CU division shape that minimizes the coding cost. [0020] 　Subsequently, predictor 105, for each CU, to minimize the coding cost, Pred_mode_flag syntax value that determines intra prediction / inter prediction, Part_mode syntax value that determines PU division shape, Split_tu_flag syntax to determine the TU division shape value, an intra prediction direction, and determines a motion vector. [0021] 　Moreover, predictor 105 determines the skip_flag syntax value that determines the skip mode. [0022] 　Specifically, the target CU, determined pred_mode_flag indicates inter prediction, determined part_mode indicates 2Nx2N, and, when there is no transformed and quantized values ​​which will be described later, to 1 skip_flag (i.e., skip mode to.). At other times, a to 0 skip_flag (in other words, not a skip mode.). [0023] 　The predictor 105, determined cu_split_flag syntax value, Pred_mode_flag syntax value, Part_mode syntax value, Split_tu_flag syntax value, the intra prediction direction, and, based on such motion vectors, and generates a prediction signal for the input image signal of each CU . Prediction signal is generated on the basis of the intra prediction or inter-frame prediction mentioned above. [0024] 　Transformer / quantizer 101 is based on the TU division shape of predictor 105 is determined, frequency conversion of the prediction error image obtained by subtracting the prediction signal from the input image signal. [0025] 　Furthermore, transformer / quantizer 101 quantizes the prediction error image (frequency transformation coefficients) obtained by frequency conversion. Hereinafter referred to as transformed and quantized values ​​quantized frequency transform coefficients. [0026] 　The entropy coder 102, Cu_split_flag syntax value predictor 105 decides, skip_flag syntax value, Pred_mode_flag syntax value, Part_mode syntax value, Split_tu_flag syntax value, the difference information of the intra prediction direction, and the differential motion vector information (hereinafter, they say prediction parameter information related to prediction also.), as well as entropy-encodes the transformed and quantized values. [0027] 　Inverse quantization / inverse transformer 103 inverse-quantizes the transform quantization value. Furthermore, the inverse quantization / inverse transformer 103 inverse frequency converts the inverse quantized frequency transform coefficients. Inverse frequency transformed reconstructed prediction error image, the prediction signal is added, is supplied to the buffer 104. Buffer 104 stores the reconstructed image. [0028] 　Multiplexer 106 outputs the multiplexed entropy encoded data supplied from the entropy encoder 102 as bit stream. [0029] 　By the above-described operation, general video encoding apparatus generates a bitstream. [0030] 　Next, with reference to FIG. 16, outputs the video frame decoded bit stream as input, the structure and operation of a typical video decoding apparatus. [0031] 　Video decoding apparatus shown in FIG. 16 includes demultiplexer 201, an entropy decoder 202, inverse quantizer / inverse transformer 203, a predictor 204, a buffer 205. [0032] 　Demultiplexer 201 is to demultiplex the bit stream input, extracts the video bitstream entropy coding. [0033] 　The entropy decoder 202 entropy-decodes the video bit stream. The entropy decoder 202, the predictive parameters and transformed and quantized values ​​entropy decoding to the inverse quantization / inverse transformer 203 and the predictor 204. [0034] 　Inverse quantization / inverse transformer 203 inverse-quantizes the transform quantization value. Furthermore, the inverse quantization / inverse transformer 203 inverse frequency converts the inverse quantized frequency transform coefficients. [0035] 　After inverse frequency converter, predictor 204, based on the prediction parameters entropy decoding, it generates a prediction signal by using the reconstructed image stored in the buffer 205. [0036] 　After the prediction signal generator, the inverse frequency transformed reconstructed prediction error image in the inverse quantizer / inverse transformer 203, it is added prediction signal supplied from the predictor 204 is supplied to the buffer 205 as a reconstructed image . [0037] 　Then, reconstructed image stored in the buffer 205 is output as the decoded image (decoded image). [0038] 　Based on the above operation, a general video decoding apparatus generates a decoded image. [0039] 　Non-patent document 2 is called QuadTree plus Binary Tree (QTBT) is an extension method in the method described in Non-Patent Document 1 described above, quadtree and binary tree: block segmentation based on (BT Binary-Tree) It discloses a video image coding technique using a structure. [0040] 　In QTBT structure, based on the quadtree structure, the coding tree units (CTU) is recursively divided into squares of coding units (CU). Furthermore, based on the binary tree structure, for prediction processing and transform processing, each CU divided recursively is recursively divided into blocks of a rectangular or square. In QTBT structure, part_mode syntax is not utilized. [0041] 　Figure 17 is an explanatory diagram showing a QTBT structure described in Non-Patent Document 2. FIG. 17 (a) shows a block division example of CTU, FIG. 17 (b) shows the tree structure. 17, the solid line indicates a division based on quadtree structure, broken lines indicate divided based on the binary tree structure. The division based on the binary tree structure, the rectangular blocks are acceptable, it is necessary information indicating the division direction (direction dividing line extends). In FIG. 17 (b), 0 indicates that it is divided in the lateral direction (horizontal direction). 1 shows that it is divided in the vertical direction (vertical direction). QTBT structure, it is possible to more flexibly express the rectangular division shape, it is possible to increase the compression efficiency of the video scheme based on block division structure described in Non-Patent Document 1. CITATION Non-patent literature [0042] 非特許文献1 : High Efficiency Video Coding (HEVC) text specification draft 10 (for FDIS & Last Call) of ITU-T SG16 WP3 and ISO/IEC JTC1/SC29/WG11 12th Meeting: Geneva, CH, 14-23 January 2013 非特許文献2 : Jicheng An, et al., "Quadtree plus binary tree structure integration with JEM tools", JVET-B0023, Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 2nd Meeting: San Diego, USA, 20-26 February 2016 Summary of the Invention Problems that the Invention is to Solve [0043] 　Figure 18 is an explanatory diagram showing an example of block division and the tree structure of CTU based on QTBT structure. [0044] 　First, Cu_split_flag used in FIG. 18, bt_split_flag, and the definition of bt_split_vertical_flag be described. [0045] 　cu_split_flag shows either not either be split based on quadtree structure. When cu_split_flag is 0, not divided on the basis of the quadtree structure (i.e., the block is the block of quadtree end node.). When cu_split_flag is 1, it is divided on the basis of the quadtree structure. [0046] 　bt_split_flag shows either not or is divided on the basis of the binary tree structure. When bt_split_flag is 0, not divided on the basis of the binary tree structure (i.e., the block is the block of binary tree terminal node.) To. When bt_split_flag is 1, and is divided on the basis of the binary tree structure. [0047] 　bt_split_vertical_flag is, bt_split_flag is present at the time of the 1. bt_split_vertical_flag shows the division direction. When bt_split_vertical_flag is 0, and is divided horizontally. When bt_split_vertical_flag is 1, and is divided in the vertical direction. [0048] 　FIG. 18 (a), an example of block division is shown. FIG. 18 (b), syntax elements and QTBT structure corresponding to the division shown in FIG. 18 (a) is shown. [0049] 　In the example shown in FIG. 18 (a), since the block of 64 × 64 (64 pixels × 64 pixels) is divided into 4 blocks of 32 × 32 based on quadtree structure, QT 0-level (depth 0) in the value of cu_split_flag a value indicating that the divided (in this example, 1). [0050] 　In QT 1-level (depth 1), a block of 32 × 32 at the lower right is bisected in the vertical direction. For that block of 32 × 32, (in this example, 0) value indicating that the value of cu_split_flag will not divide a but, the value of bt_split_flag of BT 1-level (depth 1) is a value indicating that the divided ( in this example, 1). The value of bt_split_vertical_flag is (in this example, 1) a value indicating the vertical direction is. Note that the blocks of the other three 32 × 32, the value of bt_split_flag associated with the binary tree structure, a value indicating that no split (in this example, 0) is. [0051] 　In BT 2-level (depth 2), the 32 × 32 left 16 × 32 included in the block of the blocks under the right, because they are not split further, the value of bt_split_flag a value indicating that no division (this in the example, it is 0). [0052] 　The block on the right side of 16 × 32, since it is further divided, the value of bt_split_flag a value indicating that the divided (in this example, 1). The value of bt_split_vertical_flag is (in this example, 1) a value indicating the vertical direction is. [0053] 　In BT 3-level (depth 3), since the block of the left 8 × 32 included in the block of 16 × 32 at the lower right is not divided, the values ​​of bt_split_flag a value indicating that no split (in this example, 0 ) it is. Since blocks of the right 8 × 32 included in the block of 16 × 32 at the lower right is divided, the value of bt_split_flag a value indicating that the divided (in this example, 1). The value of bt_split_vertical_flag is (in this example, 0) value indicating the horizontal direction is. [0054] 　Since even blocks of the upper 8 × 16 included in the block of 8 × 32 at the lower right is also not divided block of the lower 8 × 16, for each block, the value of bt_split_flag a value indicating that no division (this in the example, it is 0). [0055] 　When using the above-described QTBT structure, quarter divided / undivided data blocks based on the tree structure (hereinafter, referred to. The quadtree division flag) in addition to the split / undivided information block based on the binary tree (hereinafter, referred to as a binary tree split flag.) and horizontal / vertical division direction information (hereinafter, referred to as a binary tree dividing direction flag.) requires the transmission of. [0056] 　Since the above binary tree division flag and a binary tree split direction flag is transmitted for each block, in particular under the bit rate is low, resulting in an increase in the level number of bits that can not be ignored. [0057] 　Therefore, the compression efficiency is reduced by the occurrence of the overhead code quantity by their flag information. Furthermore, entropy coding / decoding of these flag information increases. [0058] 　When using QTBT structure, it is possible to set the minimum size of the block. The minimum size is the concept including both the minimum value and the minimum value of the height of the lateral width. When the minimum size is set to "N", (the number of pixels in the horizontal direction) width of the block is reached to N, it is impossible to divide the block further longitudinally. Splitting is because the lateral width becomes N / 2. The height of the block (the number of vertical direction pixels) reaches the N, it is impossible to divide the block further laterally. Splitting is because the height becomes N / 2. [0059] 　That is, when one of the width and the height is the minimum size block is divided on the basis of the binary tree split, the direction of division uniquely determined. However, in the illustrated manner in FIG. 18 (b), even in such a case, (in other words, redundant) originally is not required bt_split_vertical_flag is transmitted. [0060] 　The present invention provides a video image encoding processing and image decoding processing using the block division structure based on the quadtree and binary tree, the compression performance was improved, to reduce the entropy encoding processing amount and entropy decoding processing amount for the purpose. Means for Solving the Problems [0061] 　Video encoding method according to the present invention is a video encoding method using a block division structure based on the quadtree and binary tree, entropy a flag indicating whether or not to divide the block based on quadtree structure horizontal showing the step of encoding comprises the steps of entropy encoding the skip flag quadtree terminal node, a flag and dividing direction indicating whether or not to split based on quarter block binary tree structure of the tree terminal node / a step of entropy encoding the vertical dividing direction flag, information indicating the minimum size of the division based on the binary tree structure and a step of multiplexing the bit streams, the minimum size equal to the size of the node is further binary tree structure when it is divided on the basis of the Japanese not to entropy coding the horizontal / vertical dividing direction flag in the node To. [0062] 　How video decoding according to the present invention is a video decoding method using a block division structure based on the quadtree and binary tree, a step of entropy decoding the skip flag quadtree terminal node, the quadtree terminal node a step of entropy decoding the horizontal / vertical dividing direction flag indicating flag and dividing direction indicating whether or not to split based blocks into binary tree structure, information indicating the minimum size of the division based on the binary tree structure from the bit stream and a step of extracting, when a minimum size equal to the size of the node is further divided on the basis of the binary tree structure, characterized in that it does not entropy decoding the horizontal / vertical dividing direction flag in the node. [0063] 　Image encoding apparatus according to the present invention is a video encoding apparatus using a block division structure based on the quadtree and binary tree, entropy a flag indicating whether or not to divide the block based on quadtree structure a quadtree division flag coding means for coding a skip flag encoding means for entropy encoding the skip flag quadtree terminal node, or divided based blocks quadtree terminal nodes in the binary tree structure size multiplexing to multiplex the binary tree information encoding means for entropy coding the horizontal / vertical dividing direction flag, information indicating the minimum size of the division based on the binary tree structure in the bit stream indicating the flag and dividing direction indicating no and a means, binary tree information encoding means, when the minimum size equal size node is further divided on the basis of the binary tree structure It is characterized in that no entropy coding the horizontal / vertical dividing direction flag in the node. [0064] 　Video decoding apparatus according to the present invention is a video decoding apparatus using a block division structure based on the quadtree and binary tree, a skip flag decoding means for entropy decoding the skip flag quadtree terminal node, quadtree a binary tree information decoding means for entropy decoding the horizontal / vertical dividing direction flag indicating flag and dividing direction indicating whether or not to split based blocks of terminal nodes in the binary tree structure, the minimum size of the division based on the binary tree structure and a size extracting means for extracting information from a bitstream indicating a binary tree information decoding means, horizontal / vertical dividing direction in the node when the minimum size equal size node is further divided on the basis of the binary tree structure wherein the flag is not entropy decode. [0065] 　Video encoding program according to the present invention is a video encoding program for implementing the video encoding method using a block division structure based on the quadtree and binary tree, the computer, based on the quadtree structure a process for entropy coding a flag indicating whether or not to divide the block, a process for entropy coding the skip flag quadtree terminal node splits based on binary tree structure blocks quadtree terminal node and whether the process of entropy coding the horizontal / vertical dividing direction flag indicating flag and dividing direction indicates a not or, to execute a processing for multiplexing information indicating the minimum size of the division based on the binary tree structure in the bit stream, when the minimum size equal size node is further divided on the basis of the binary tree structure, horizontal / vertical component of the node Wherein the not entropy encoded direction flag. [0066] 　Video decoding program according to the present invention is a video decoding program for implementing the video decoding method using a block division structure based on the quadtree and binary tree, the computer, entropy skip flag quadtree terminal node a process of decoding, a process for entropy decoding the horizontal / vertical dividing direction flag indicating flag and dividing direction indicating whether or not to split based on quarter block binary tree structure of the tree terminal node, based on the binary tree structure information indicating the minimum size of the split to execute the processing for extracting from the bit stream, when the minimum size equal size node is further divided on the basis of the binary tree structure, entropy decoding a horizontal / vertical dividing direction flag in the node characterized in that it does not give. Effect of the invention [0067] 　According to the present invention, compression performance is improved, the entropy encoding processing amount and entropy decoding processing amount is reduced. BRIEF DESCRIPTION OF THE DRAWINGS [0068] FIG. 1 is a block diagram illustrating a video encoding apparatus of the first embodiment. It is a flowchart showing the operation of FIG. 2 entropy encoder controller and the entropy encoder. 3 is an explanatory diagram showing a QTBT structure in the first embodiment. 4 is a block diagram illustrating an image decoding apparatus of the second embodiment. 5 is a flowchart showing the operation of the entropy decoder controller and entropy decoder. 6 is a block diagram showing a configuration example of a video encoding apparatus capable of realizing the functions information processing system. 7 is a block diagram showing a main part of a video encoding apparatus. 8 is a block diagram showing a main part of a video decoding apparatus. Is an explanatory view showing an example of FIG. 9 33 different angles intra prediction. Is an explanatory view showing an example of FIG. 10 inter-frame prediction. CTU division example of FIG. 11 frame t, and an explanatory view showing a CU example of division CTU8 frame t. It is an explanatory diagram showing a quad-tree structure corresponding to the CU division example of FIG. 12] CTU8. FIG. 13 is an explanatory diagram showing a PU split example of CU. FIG. 14 is an explanatory diagram showing a TU division example of CU. 15 is a block diagram showing a configuration example of a general video encoder. 16 is a block diagram showing a configuration example of a general video decoder. FIG. 17 is an explanatory diagram block division example of CTU described in Non-Patent Document 2 and shows the tree structure. FIG. 18 is an explanatory diagram showing an example of block division of CTU and the tree structure based on QTBT structure. DESCRIPTION OF THE INVENTION [0069] The first embodiment. 　Figure 1 is a block diagram showing an embodiment of a video encoding apparatus (first embodiment). Video encoding apparatus shown in Figure 1, transformer / quantizer 101, entropy encoder 102, inverse quantizer / inverse transformer 103, buffer 104, predictor 105, a multiplexer 106, and the entropy coding controller equipped with a 107. [0070] 　cu_split_flag used in the present embodiment, Bt_split_flag, and although the definition of bt_split_vertical_flag are as previously described, in the video decoding side, if the Bt_split_flag absence, Bt_split_flag is interpreted as implicit 0. Further, in the present embodiment, even bt_split_flag is 1, may bt_split_vertical_flag absence. [0071] 　Predictor 105, for each CTU, minimizing the coding cost is determined cu_split_flag, bt_split_flag, and bt_split_vertical_flag determining the QTBT division shape. [0072] 　Hereafter, a divided block based on quadtree structure or the binary tree structure of sub-blocks. [0073] 　Next, predictor 105, determined cu_split_flag, bt_split_flag, and for each sub-block which is QTBT split based on Bt_split_vertical_flag, to minimize the coding cost, Pred_mode_flag to determine the intra prediction / inter prediction, the TU division shape determining Split_tu_flag, determines intra prediction direction, and the motion vector. [0074] 　Then, predictor 105 determines the skip_flag which determines the skip mode. Specifically, the sub block to be processed, determined pred_mode_flag indicates inter prediction, when the transformed and quantized values ​​do not exist, the skip_flag to 1 (ie. To skip mode). At other times, a to 0 skip_flag (in other words, not a skip mode.). [0075] 　The predictor 105, determined cu_split_flag syntax value, Bt_split_flag syntax value, Bt_split_vertical_flag syntax value, skip_flag syntax value, Pred_mode_flag syntax value, Split_tu_flag syntax value, the intra prediction direction, and based on the motion vector, an input image of each sub-block generating a prediction signal for the signal. Prediction signal is generated on the basis of the intra prediction or inter-frame prediction mentioned above. [0076] 　Transformer / quantizer 101 is based on the TU division shape of predictor 105 is determined, frequency conversion of the prediction error image obtained by subtracting the prediction signal from the input image signal. Furthermore, transformer / quantizer 101, the prediction error image obtained by frequency conversion (frequency conversion coefficient) to generate a transformed and quantized value by quantizing. [0077] 　Entropy coding controller 107 is supplied from the predictor 105 to the entropy encoder 102 monitors the size of each sub-block based on the binary tree structure, determines whether to entropy encoding the Bt_split_vertical_flag. [0078] 　Specifically, if the width or height of the sub-block to be processed is equal to the minimum size, when the block is further divided, entropy coding controller 107, to the entropy encoder 102, entropy coding of bt_split_vertical_flag to skip the process. Below, the minimum size, expressed as minBTsize. The minimum size is be set arbitrarily, in the present embodiment, as an example, the minimum size "8". Also, the width of the sub-block to be processed CurPartW, expressed as curPartH height. [0079] 　The entropy coder 102, Cu_split_flag syntax value predictor 105 decides, Bt_split_flag syntax value, Bt_split_vertical_flag syntax value, skip_flag syntax value, Pred_mode_flag syntax value, Split_tu_flag syntax value, the difference information of the intra prediction direction, the difference motion vector information, and, entropy coding the transformed and quantized values. [0080] 　However, entropy encoder 102, for Bt_split_vertical_flag, when entropy encoding controller 107 decides to skip the entropy coding, skipping entropy coding. [0081] 　The above-described control, signaling redundant bt_split_vertical_flag is prevented. [0082] 　Inverse quantization / inverse transformer 103 inverse-quantizes the transform quantization value. Furthermore, the inverse quantization / inverse transformer 103 inverse frequency converts the inverse quantized frequency transform coefficients. Inverse frequency transformed reconstructed prediction error image, the prediction signal is added, is supplied to the buffer 104. Buffer 104 stores the reconstructed image. [0083] 　Multiplexer 106 outputs the multiplexed entropy encoded data supplied from the entropy encoder 102 as bit stream. Note that multiplexer 106 multiplexes in the bit stream minBTsize indicating the minimum size of the division based on the binary tree structure. [0084] 　By the above-described operation, the image encoding apparatus of the present embodiment generates a bitstream. [0085] 　Next, with reference to the flowchart of FIG. 2, bt_split_flag, bt_split_vertical_flag, and for skip_flag, illustrating the operation of the entropy encoding controller 107 and the entropy encoder 102 which is a characteristic part of the present embodiment in more detail. [0086] 　In step S101, the entropy coding controller 107 determines whether cu_split_flag is 0. If cu_split_flag is 0, the process proceeds to step S102. If cu_split_flag is 1, the process proceeds to the next quad-tree sub-blocks (blocks after the division based on the quadtree structure). [0087] 　In step S102, the entropy encoder 102 entropy-encodes the Bt_split_flag. In step S103, the entropy coding controller 107 determines whether bt_split_flag is 0. In the case of bt_split_flag 0, the process is terminated. Incidentally, the entropy coder 102, before ending the processing, entropy encoding skip_flag. If bt_split_flag is 1, the process proceeds to step S104. [0088] 　In step S104, the entropy coding controller 107 determines whether curPartW or curPartH equals MinBTsize. When one of the curPartW and curPartH equals MinBTsize, the process proceeds to the next binary tree sub-blocks (blocks after the division based on the binary tree structure). The processing of the next binary tree sub-blocks is a step S102 and subsequent steps. When none of the curPartW and curPartH is not equal to MinBTsize, the process proceeds to step S105. [0089] 　In step S105, the entropy encoder 102 entropy-encodes the Bt_split_vertical_flag. Then, the process proceeds to the next binary tree sub-blocks. [0090] 　By the processing of steps S103 ~ S105, the entropy coding controller 107, Bt_split_flag of processed sub-block is 1 (i.e., the processing target block is further divided on the basis of the binary tree composition.), And the curPartW when one of the curPartH equals MinBTsize, entropy encoding process bt_split_vertical_flag is skipped. [0091] 　Next, a specific example of the present embodiment. Figure 3 is an explanatory diagram showing a QTBT structure in the first embodiment. [0092] 　Figure 3 (a) is an example of block division is shown. In FIG. 3 (b), syntax elements and QTBT structure corresponding to the division shown in FIG. 3 (a) is shown. [0093] 　In the example shown in FIG. 3 (a), since the block of 64 × 64 (64 pixels × 64 pixels) is divided into 32 × 32 4 blocks on the basis of the quadtree structure (sub-block), QT 0-level in (depth 0), the value of cu_split_flag a value indicating that the divided (in this embodiment, 1). [0094] 　In QT 1-level (depth 1), a block of 32 × 32 at the lower right is bisected in the vertical direction. For that block of 32 × 32, (in this embodiment, 0) value indicating that the value of cu_split_flag will not divide a but, the value of bt_split_flag of BT 1-level (depth 1) is a value indicating that the divided (in this embodiment, 1). The value of bt_split_vertical_flag is (in this embodiment, 1) a value indicating the vertical direction is. [0095] 　In BT 2-level (depth 2), the 32 × 32 of the left 16 × 32 included in the block the block the lower right, because not split further, the value of bt_split_flag, the value (present indicating that no divided in embodiments, a 0). [0096] 　The block on the right side of 16 × 32, since it is further divided, the value of bt_split_flag a value indicating that the divided (in this embodiment, 1). The value of bt_split_vertical_flag is (in this embodiment, 1) a value indicating the vertical direction is. Incidentally, a width (curPartW) 16 is also height (curPartH) 32 also does not reach the MinBTsize. [0097] 　In BT 3-level (depth 3), the 8 × 32 block on the left side included in the 16 × 32 blocks the lower right, because not split further, the value of bt_split_flag, the value (present indicating that no divided in embodiments, a 0). [0098] 　Block of the right 8 × 32 (in FIG. 3 (a), a block surrounded by a bold line) because is further divided, the value of bt_split_flag a value indicating that the divided (in this embodiment, 1) is . However, since curPartW equals minBTsize (= 8), bt_split_vertical_flag is not entropy encoded, not transmitted. [0099] 　In BT 4-level (depth 4), so also the block of the upper 8 × 16 block also lower 8 × 16 included in the block of 8 × 32 at the lower right undivided, for each block, the value of bt_split_flag a value indicating that no split (in this example, 0) is. [0100] 　In the example shown in FIG. 3 (a), because it is divided in the horizontal direction on the basis of the block further binary tree structure of 8 × 32 surrounded by a thick line, in the indicated manner in FIG. 18 (b), the value 0 bt_split_vertical_flag is entropy encoded and included in the bit stream. However, for the 8 × 32 blocks enclosed by a thick line, CurPartW because it equals MinBTsize, dividing direction of the block, uniquely determined in the horizontal direction. [0101] 　Therefore, even if it is not transmitted syntax values ​​Bt_split_vertical_flag, video decoding device, (specifically, bt_split_flag) curPartW information about 8 × 32 block is equal to minBTsize only receive, block division of 8 × 32 It can recognize the direction. Accordingly, in the present embodiment (specifically, Bt_split_flag block 1 to be processed and, one of the curPartW and curPartH equals minBTsize.) A predetermined condition when the established image encoding device It does not entropy coding the syntax value of bt_split_vertical_flag. [0102] 　That is, according to the video encoding apparatus of the present embodiment using the entropy coding controller 107 and the entropy encoder 102 described above, is prevented transmitted redundant binary tree dividing direction flag, compression performance is improved that. Further, it reduces the entropy encoding processing of redundant binary tree dividing direction flag, processing complexity is reduced. [0103] 　The conditions according to the process of step S103, S104, when the block to be processed is further divided on the basis of the binary tree structure, the size of the blocks after the division is a condition that is less than MinBTsize. Therefore, in formulaic, 　min (CurPartW, CurPartH) / (1 + Bt_split_flag)