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Information Processor

Abstract: An information processor that carries out an affine transformation expressed by (1), wherein a matrix (2) that is the product of an affine transformation matrix A by &lgr; (≠ 0) is stored in a memory unit in advance. When coordinates (x, y, z)t are transformed to coordinates (x’, y’, z’)t by affine transformation, A’ and a matrix (t1, t2, t3)t are read from the memory unit, x’ = (a’11*x + a’12*y + a’13*z)/&lgr; + t1; y’ = (a’21*x + a’22*y + a’23*z)/ &lgr; + t2; z’ = (a’31*x + a’32*y + a’33*z)/ &lgr; + t3; are calculated, and the coordinates (x’, y’, z’)t are determined.

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
28 November 2003
Publication Number
17/2007
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
Parent Application

Applicants

HI CORPORATION
6-5, HIGASHIYAMA 1-CHOME, MEGURO-KU, TOKYO 153-0043,

Inventors

1. TANIOKA YASUHISA
C/O HI CORPORATION 6-5, HIGASHIYAMA 1-CHOME, MEGURO-KU, TOKYO 153-0043,
2. TSUTSUMI JUNYA
C/O HI CORPORATION 6-5, HIGASHIYAMA 1-CHOME, MEGURO-KU, TOKYO 153-0043,
3. KAWABATA KAZUO
C/O HI CORPORATION 6-5, HIGASHIYAMA 1-CHOME, MEGURO-KU, TOKYO 153-0043,
4. ODA KAZUTOSHI
C/O HI CORPORATION 6-5, HIGASHIYAMA 1-CHOME, MEGURO-KU, TOKYO 153-0043,

Specification

Documents

Application Documents

# Name Date
1 abstract1.jpg 2018-08-08