Description
Title of the Invention
Power Amplifier and Power Amplification Method
Technical Field
5 [OOOl]
The present invention relates to a power amplifier and a power amplification method.
Background Art
[0002]
10 Switched-mode power amplifiers are being investigated for the purpose of achieving
higher efficiency (lower power consumption) in wireless communication systems such as
poi-table telephone systems. The theoretic efficiency of switched-mode power amplifiers is
loo%, and switched-mode power amplifiers can be expected to achieve even higher efficiency
than conventional Class-A amplifiers, Class-B amplifiers, and Dohei-ty amplifiers.
15 [0003]
Wireless colnmunication systems such as poi-table telephone systems are experiencing
increased demand for higher speed and higher volume in order to deal with the increase in
poriabie teiephone subscribers and the rapid increase in the amouni ol'iraKc; brought about by
the popularization of sn~a~tphoneAs.c hieving higher speed and higher volume in a wireless
20 comlnunication system necessitates the securing of a broader signal band, and securing a
broader signal band necessitates higher output of the power amplifiers that are provided in the
base stations of the wireless coinmunication system.
[0004]
Regions such as foreign country having large area and regions such as mountainous areas
25 in which base stations cannot be easily installed call for longer wireless conlinunication
sections, and there is consequently a demand for higher output of wireless cominunication
transmission power. I11 addition, there is a demand for higher output of wireless cominunication
transmission power for the purpose of stabilizing communication quality. For these reasons, the
demand for the higher output of power amplifiers has been increasing.
30 [0005]
In a switched-mode power amplifier, switching devices are used that turn ONIOFF
according to input signals.
[0006]
For example, switching devices are provided on each of a high side and a low side in the
switched-mode power amplifiers that are described in Patent Document 1 and Non-Patent
Document 1. These two switching devices are in a relation such that when one is turned ON,
the other is turned OFF, and voltage is supplied that accords with the switching device that is
turned ON. In the case of an ideal switching device, current flows but a difference in potential
5 does not occur in the switching device that is turned ON, and conversely, current does not flow
but a difference in potential does occur in a switching device that is turned OFF. As a result, all
supplied power can be provided to the load without consumption of electric power in the
switching device, thereby efficiency of 100% is achieved.
[0007]
10 An actual example of this type of switched-mode power amplifier is next described.
[OOOS]
An example of a related switched-mode power amplifier is first described with reference
to FIG. I .
[0009]
15 The switched-mode power amplifier shown in FIG. 1 includes: pulse-width modulator
100, amplifiers (driver amplifiers) 200-1 and 200-2, power supplies 21 0-1 and 210-2, power
supplies 220-1 and 220-2, p-channel FET 300-1, power supply 3 10-1, n-channel FET 300-2,
,....A GI+-.. A n n allu LILLCI YVV.
[OOl 01
2 0 The voltage values shown within the parentheses ( ) of FIG. 1 are only examples, and the
values are not limited to these values (the same holds true for subsequent drawings).
[OOl 11
Pulse-width modulator 100 subjects RF (Radio Frequency) input signals to pulse-width
inodulation such as AC or PWM (Pulse Width Modulation) and supplies two in-phase signals,
25 Vin I and Vin2, to the high side and low-side, respectively.
[OO 121
The part that supplies the output pulse "High" that is supplied from the switched-mode
power amplifier is the high side, and the part that supplies "Low" is the low side.
[00 131
3 0 P-channel FET 300-1 is provided as the switching device in the final stage of the high
i side, and 11-channel FET 300-2 is provided as the switching device in the final stage of the low
side.
[00 141
One of p-channel FET 300-1 and n-channel FET 300-2 is turned ON and the other is
turned OFF according to the signal supplied from pulse-width modulator 100, whereby the
power-supply voltage of high-side power supply 3 10-1 is supplied if p-channel FET 300-1 is
ON and the ground voltage is supplied from low-side ground if n-channel FET 300-2 is ON.
The RF input signal is thus amplified and, following elimination of the unneeded band portion
5 by filter 400, is supplied to load (antenna) 500.
[00 1 51
As a result, the power of the signal that is extracted by load 500 is determined by load 500
and the power-supply voltage of high-side power supply 3 10- 1.
[0016]
10 The relation of resistance RL of load 500, power P that is extracted at load 500, and
power-supply voltage V of high-side power supply 3 10-1 can be represented by the following
equation (1).
[0017]
P = V A 2/(2 * RL) (1)
15 Here, as described above, the demand for higher output from power amplifiers is
increasing. As a result, when, for example, the production of power of 25 [W] for load 500 of
50R is desired, a high power-supply voltage of +50 [V] is required from high-side power
c i i n n l x ~3 1(j-I. " -YY'J
[00 181
20 However, in-phase signal Vinl is a low-amplitude pulse (Vh = +1V, VI = OV), and this
low-amplitude pulse must be amplified to an amplitude that can turn p-channel FET 300-1
ONIOFF.
[00 191
On the high side, in-phase signal Vinl is amplified by amplifier 200-1. Here, p-channel
25 FET 300-1 is assumed to turn ON at a gate-source voltage of Vgs = -1 V and to turn OFF at
Vgs = +5 V. In order to turn ON p-channel FET 300-1 at Vgs = -1 V, the amplitude that is
supplied from amplifller 200-1 must be made +49V. Further, the amplitude that is supplied from
amplifier 200-1 must be made +55 V in order to turn OFF p-channel FET 300-1 at Vgs = +5 V.
[0020]
30 On the low side, in contrast, in-phase signal Vin2 is amplified by amplifier 200-2. Here,
n-channel FET 300-2 is assumed to turn ON at Vgs = +1 V and turn OFF at Vgs = -5 V.
However, n-channel FET 300-2 is able to turn ONIOFF at a low amplitude, whereby the
amplitude that is supplied from amplifier 200-2 can be low amplitude, and the amplitude that is
supplied from amplifier 200-2 should be +1 V in order to turn ON n-channel FET 300-2 at Vgs
= +1 V. In addition, the amplitude that is supplied from amplifier 200-2 should be -5 V in order
to turn OFF n-channel FET 300-2 at Vgs = -5 V.
[002 11
At this time, in-phase signals Vinl and Vin2 are being supplied to the high side and low
5 side, respectively, and p-channel FET 300-1 and n-channel FET 300-2 therefore operate such
that when one is ON, the other is OFF, as described hereinabove.
[0022]
Accordingly, the voltage of the signal that is supplied from switched-mode power
amplifier is the power-supply voltage of high-side power supply 3 10-1 if p-channel FET 300-1
10 is ON and is the low-side groul~dv oltage if n-channel FET 300-2 is ON.
[0023]
The configuration of amplifiers (driver amplifiers) 200-1 and 200-2 is here described with
reference to FIG. 2. FIG. 2 is an example in which amplifiers 200-1 and 200-2 are made up of
p-channel FET 200.
15 [0024]
Referring to FIG. 2, when n-channel FET 200 is OFF, the drain-source opens and current
IL does not flow across the drain and source, whereby power-supply voltage V1 of power
supply 21 0 is supplied.
[0025]
20 On the other hand, when n-channel FET 200 is ON, current IL flows across the
drain-source, the drain-source is short-circuited, and power-supply voltage V2 of power supply
220 is supplied.
[0026]
However, when n-channel FET 200 is ON, current flows to load resistance RL and power
25 consun~ptiono ccurs. The consumed power Pdc [W] at this time can be expressed by the
following equation (2).
[0027]
Pdc = (V1 - V2) A 2 / (2 * RL) (2)
Again referring to FIG. 1, the switched-mode power amplifier shown in FIG. 1 is using
30 p-channel FET 300-1 in the switching device of the final stage on the high side.
[0028]
At this time, assuming that V1 = +55V, V2 = +49 V, and load resistance RL = 3R in
Equation (2), the consumed power Pdc of amplifier 200-1 is 6 [W]. Accordingly, although
details will be later described, the power consuniption can be drastically reduced compared to a
case of using an n-channel FET in the switching device of the final stage on the high side.
[0029]
However, as described above, a high power-supply voltage is required on the high side
and a device having a high drain-source withstand voltage must be used as the high-side
5 switching device, but a GaN HEMT p-channel FET having a high drain-source withstand
voltage does not currently exist. In addition, even though not GaN HEMT, the carriers in a
p-channel FET are positive holes, whereby the passing speed is low and high-speed operation
becomes problematic. Accordingly, the switched-mode power amplifier shown in FIG. 1 cannot
be applied for high-output purposes or for high-frequency purposes.
10 [0030]
Another example of a related switched-mode power amplifier is next described with
reference to FIG. 3.
[003 1 ]
The switched-mode power amplifier shown in FIG. 3 differs from FIG. 1 in that n-channel
15 FET 301-1 is provided as the switching device in the final stage of the high side and
pulse-width modulator 100 supplies two complementary signals Vin and V-in that are inutually
complementary.
[!I0321
Here, n-channel FET 301 -1 is assumed to turn ON at Vgs = +1 V and turn OFF at Vgs =
20 -5 V. In this case, the amplitude that is supplied from amplifier 200-1 to turn ON n-channel
FET 30 1 - 1 at Vgs = +l V must be made +5 1 V. In addition, because the source voltage is 0 [V]
(because low-side n-channel FET 300-2 is ON), the amplitude that is supplied from amplifier
200-1 must be made -5 V in order to turn OFF n-channel FET 301 - 1 at Vgs = -5 V.
[003 31
25 Assuming that V1 = t51 Vj V2 = -5 V and Load resistance = 3R in Eqrration (21, the
power consumption Pdc of amplifier 200-1 at this time swells to an enormous value of
approximately 533 [W].
Literature of the Prior Art
30 Patent Documents
[0034]
Patent Document 1 : Japanese Unexamined Patent Application Publication No.
20 1 1-077979
Non-Patent Documents
[0035]
Non-Patent Document 1 : David K. Choi, "High Efficiency Switched-Mode Power
Amplifiers for Wireless Communications," Chapter 3, University of California Doctorate
Dissel-tation March 200 1, [searched on 12/9/20 1 11, Internet
5
Summary of the Invention
Problem to be Solved by the Invention
[0036]
10 As described hereinabove, in related switched-mode power amplifiers, the demand for
higher output necessitates the use of a device having a high high-side drain-source withstand
voltage such as n-channel GaN HEMT, but in this case, the problem arises in which the power
consumption of the driver amplifier drastically increases.
[0037]
15 It is therefore an object of the present invention to provide a power amplifier and power
amplification method that can both achieve higher output and reduce power consumption and
thus solve the above-described problem.
Means for Solving the Problem
20 [0038]
The power amplifier of the present invention includes:
a branching unit that, according to the amplitude of an input signal, branches the input
signal into signals of a plurality of amplitude components;
a plurality of switched-mode power amplifiers that amplify each of the signals of the
25 ~'luuality of amplitude components that were branched by the branching ~mita; nd
a combiner that combines the signals that were amplified by each of the plurality of
switched-mode power amplifiers.
[0039]
The power amplification method of the present invention is a power amplification method
30 realized by power amplifiers and includes:
a branching step of, according to the amplitude of an input signal, branching the input
signal into signals of a plurality of amplitude components;
an amplification step of amplifying each of signals of the plurality of amplitude
components that were branched by a plurality of switched-mode power amplifiers; and
a combining step of combining signals that were amplified by each of the plurality of
switched-mode power amplifiers.
Effect of the Invention
5 [0040]
The prcsent invention obtains the effects of both enabling higher output and reducing
power consumption.
Brief Description of the Drawings
10 [0041]
FIG. 1 is a circuit diagram showing an example of the configuration of a related
switched-mode power amplifier.
FIG. 2 is a circuit diagram showing an example of the configuration of the amplifier
shown in FIG. 1.
15 FIG. 3 is a circuit diagram showing another example of the configuration of a related
switched-mode power amplifier.
FIG. 4 is a circuit diagram showing the configuration of the power amplifier of the first
cxcixplai*y emtvodiiiieiii of ilie present iii~eiiiioii.
FIG. 5 is a circuit diagram showing an example of the branching unit shown in FIG. 4 and
20 the surrounding configuration.
FIG. 6 is an explanatory view for describing the threshold value voltage that is set in the
branching unit shown in FIG. 4.
FIG. 7 is a circuit diagram showing another example of the branching unit shown in FIG.
4 and the surrounding configuration.
2.7 FIG 8 is a circuit diagram showing an example of the combiner shown in FIG. 4.
FIG. 9 is a circuit diagram showing another example of the combiner shown in FIG. 4.
FIG. 10 is a circuit diagram showing another example of the combiner shown in FIG. 4.
FIG. 12 is a view for describing the changes in the amount of traffic of a wireless
communication system during one day.
3 0 FIG. 13 is a circuit diagram showing the configuration of the power amplifier of the
second exemplary embodiment of the present invention.
Mode for Carrying Out the Invention
[0042]
Exemplary embodinlents of the present invention are next described with reference to the
accolnpanying drawings.
(1) First Exemplary Embodiment
(1-1) Overall Configuration of Power Amplifier
5 Referring now to FIG. 4, the power amplifier of the present exemplary embodiment
includes: branching unit 10, switched-mode power amplifier A for large amplitude,
switched-mode power amplifier B for small amplitude, combiner 60, and filter 70.
[0043]
The power amplifier of the present exemplary elnbodilnent uses a switched-mode power
10 amplifier of substantially the same configuration as FIG. 3 as switched-mode power amplifier A
for large amplitude, and is characterized by the addition of branching unit 10 and
switched-mode power amplifier B for small amplitude.
[0044]
Branching unit 10 compares the amplitude of the RF input signal with threshold value
15 voltage Vth and branches and supplies the large-amplitude component that has amplitude that is
equal to or greater than threshold value voltage Vth to a route for large amplitude and the
small-amplitude component that has amplitude that is less than threshold value voltage Vth to a
routc for small amplitude.
[0045]
20 Switched-mode power amplifier A of a configuration that is substantially identical to that
of FIG. 3 is provided on the route for large amplitude to amplify the RF input signal of the
large-amplitude component that was branched by branching unit 10.
[0046]
Switched-mode power amplifier A includes pulse-width modulator 30-A, amplifiers
25 (driver an~ptifiers4) 0-A1 and 40-h2, power supplies 41-A1 and 41-h2, n-channel FETs 50-A1
and 50-A2, and power supply 5 1 -A1.
[0047]
In switched-mode power amplifier A, an RF input signal of the large-amplitude
colnponent undergoes AX and PWM pulse width modulation by pulse-width modulator 30-A,
30 and complementary signals that are mutually complementary are supplied to the high side and
low side.
[0048]
On the high side, n-channel FET 50-A1 is assumed to turn ON at Vgs = +1 V and to turn
OFF at Vgs = -5 V. As a result, as in FIG. 3, the amplitude that is supplied from amplifier
40-A1 must be made +5 1 V in order to turn ON n-channel FET 50-A1 at Vgs = +1 V. In order
to turn OFF n-channel FET 50-A1 at Vgs = -5 V, the amplitude that is supplied from amplifier
40-A1 must be made -5 V.
[0049]
5 011 the low side, in contrast, n-channel FET 50-A2 is assumed to turn ON at Vgs = +1 V
and to turn OFF at Vgs = -5 V. As a result, similar to FIG. 3, in order to turn ON 11-channel
FET 50-A2 at Vgs = +1 V, the amplitude that is supplied from amplifier 40-A2 should be made
+l V. In order to turn OFF n-channel FET 50-A2 at Vgs = -5 V, the amplitude that is supplied
from amplifier 40-A2 should be made - 5 V.
10 [0050]
Thus, in switched-mode power amplifier A, because the configuration is substantially the
same as FIG. 3, the power consumption of amplifier 40-A1 becomes great when amplifying an
RF input signal,
coo5 l]
15 Switched-mode power amplifier By on the other hand, includes delay circuit 20,
pulse-width modulator 30-B, p-channel FET 50-B 1, power supply 5 1 -B 1, n-channel FET
50-B2, and power supply 5 1 -B2.
rnCc?1
L" JLJ
In switched-mode power amplifier By the RF input signal of the small-amplitude
20 component is delayed by a predetermined delay amount by means of delay circuit 20 and then
subjected to AX and PWM pulse width lnodulation by pulse-width modulator 30-B to supply
in-phase signals that are mutually in-phase to the high side and low side.
[0053]
Because switched-mode power amplifier B amplifies the RF input signal of the
2,5 sn~all-amplittidec omponent, switched-mode power amplifier £3 does not require large
an~plitudee ven when turning ONIOFF the switching device of the final stage on the high side.
As a result, p-channel FET 50-B1 having low withstand voltage across the drain and source
may be used as the switching device of the final stage on the high side, as in FIG. 1.
[0054]
30 In addition, p-channel FET 50-B1 and n-channel FET 50-B2 can also be turned ONIOFF
by the in-phase signals of small amplitude that are supplied from pulse-width modulator 30-B.
As a result, a driver amplifier need not be provided in stages that follow pulse-width modulator
3 0-B.
[0055]
As a result, compared to the RF input signal that was branched to the side of
switched-mode power amplifier B, the RF input signal that was branched to the side of
switched-mode power amplifier A is delayed by the delay amount of amplifiers (driver
amplifiers) 40-A1 and 40-A2.
5 [0056]
In switched-mode power amplifier B, the RF input signal of the small-amplitude
colnponent is delayed by the delay amount of the above-described driver amplifiers by means
of delay circuit 20.
[0057]
10 Combiner 60 combines the signals that are supplied from switched-mode power amplifiers
A and B. Conlbiner 60 is preferably provided with a DC cutting function in addition to
conlbining functions to prevent reverse current of the DC component between switched-mode
power amplifier A and switched-mode power amplifier B.
[005 81
15 Filter 70 eliminates the unwanted band component of the signal that was combined by
combiner 60 and supplies the resulting signal to load 80 (antenna).
[0059]
(1-2) Branching 'u'nft 10 an6 Sui-i-oundiiig Cuiifigiii-aifuii
An example of branching unit 10 and the surrounding configuration is next described with
20 reference to FIG. 5.
[0060]
Referring to FIG. 5, branching unit 10 includes coupler 1 1, delay circuit 12, envelope
detector 13, comparator 14, and switch 15. In addition, threshold value voltage generator 9 1
that generates threshold value voltage Vth is connected to comparator 14.
26 [0061]
Coupler 11 extracts a portion of the RF input signal.
[0062]
Envelope detector 13 detects the envelope of the RF input signal that was extracted in
coupler 1 1.
30 [0063]
Colnparator 14 compares the envelope that was detected in envelope detector 13 with
threshold value voltage Vth that was generated in threshold value voltage generator 9 1 and
supplies binary control signals. If the envelope is equal to or greater than threshold value
voltage Vth, comparator 14 outputs a control signal, for example, "High," that switches switch
15 to the large-amplitude-time route side and that supplies the RF input signal to
switched-mode power amplifier A. If the envelope is less than Vth, comparator 14 outputs a
control signal, for example, "Low," that switches switch 15 to the small-amplitude-time route
side and that supplies the RF input signal to switched-mode power amplifier B.
5 [0064]
Delay circuit 12 delays the RF input signal (main signal side) by the delay amount of
envelope detector 13 and comparator 14 to match the delay amount of the coupling side and the
main signal side.
lo0651
10 In FIG. 5, threshold value voltage Vth is fixed.
rr
[0066]
The value of threshold value voltage Vth is next described with reference to FIG. 6. FIG.
6 shows the input (RF input) waveforms and outprtt (pulse output) m~aveformsi n
switched-mode power amplifier A for large amplitude and switched-mode power amplifier B
15 for small amplitude.
[0067]
Referring to FIG. 6, the maximum amplitude Vmax of output pulses of switched-mode
power a~plificAr ziid th2 illiiliin~iiai~m plitude 'v'ii~liiio f ~uipupiu lses of swiiciieci-mode power
amplifier B are set in advance. For example, when power of 25 [W] is to be produced for load
20 80 of 50Q, Vmax is set to +50 [V].
[0068]
In addition, as shown in FIG. 4, the amplitude after switched-mode power amplifier A has
amplified the amplitude of Vth-Vmax of the RF input signal is represented by the pulse of 0 V
-+SO V (AV - high) and the amplitude after switched-mode power amplifier B has amplified the
25 amplitude of Vmin -Vth of the P-F input signal is rcprcscnted by the pulse of -I-+] V
(AV-low).
[0069]
In this case, threshold value voltage Vth must satisfy the following equation (3).
[0070]
30 (Vmax - Vth): (Vth -Vmin) = AV - high : AV - low (3)
However, the amplitude of the RF input signal that is applied as input to the power
amplifier for a base station of a wireless communication system varies in proportion to the
amount of traffic.
[0071]
Assuming a configuration in which threshold value voltage Vth varies according to the
amount of traffic of a wireless communication system such as a portable telephone system, the
achievement of higher efficiency than when Vth is fixed can be considered. An example of such
a configuration is described with reference to FIG. 7.
5 [0072]
In the example shown in FIG. 7, avcrage power detector 92 and voltage controller 93 are
added to the configuration of FIG. 5.
roo731
Average power detector 92 detects the average power of the RF input signal.
10 [0074]
Voltage controller 93 determines threshold value voltage Vth according to the average
power that was detected in average power detector 92 and supplies a signal according to the
threshold value voltage Vth that was determined to threshold value voltage generator 91 .
Threshold value voltage generator 91 that has received this signal generates threshold value
15 voltage Vth that was determined in voltage controller 93. For example, when the average power
becomes high, the time that switched-mode power amplifier A operates becomes longer, and
the power consumption increases, as will be described hereinbelow. As a result, threshold value
valtage generator 91 takcs into consideration raisiiig thesho:b value voltage 'v'ih accordiiig to
the increasing average power.
20 [0075]
In the example of FIG. 7, the power-supply voltage of high-side power supply 5 1 -A1 of
the route for large amplitude is fixed (because the low side of the route for large amplitude is
grounded, AV - high is fixed). The power-supply voltage of low-side power supply 5 1-B2 of the
route for small amplitude is fixed. Vinax and Vmin are set in advance.
25 LO0761
As a result, voltage controller 93 determines the power-supply voltage of high-side power
supply 5 1 -B 1 of the route for small amplitude so as to satisfy the equation (3) and supplies a
signal that accords with the power-supply voltage that was determined to power supply 5 1 -R 1.
Power supply 5 1 -B 1, having received this signal, generates the power-supply voltage that was
30 determined in voltage controller 93.
[0077]
In this way, threshold value voltage Vth can be varied according to the amount of traffic
of the wireless communication system, and Equation (3) can be satisfied.
[0078]
(1-3) Configuration of Combiner 60
The configuratio~lo f combiner 60 is next described with reference to FIGs. 8-1 1.
[0079]
Combiner 60 sl~ownin FIG. 8 is configured using a switch. This combiner 60 must
5 perform switching synchronized with switch 15 of branching unit 10. In addition, this combiner
60 realizes the DC-cutting function by means of a capacitor that is provided in a stage that
follows the switch.
[0080]
Combiner 60 that are shown in FIG. 9 and FIG. 10 are configured using transformers.
10 [0081]
In combiner 60 shown in FIG. 9, the middle point of the primary side is short-circuited,
and the primary side and secondary side are DC-separated by means of the characteristics of the
transformer, whereby the DC-cutting function is realized.
[0082]
15 Combiner 60 shown in FIG. 10 realizes the DC-cutting function by means of capacitors
that are provided between the primary side and each of switched-mode power amplifiers A and
B.
[0083]
Synchronizers 60 shown in FIGs. 8-1 0 are configured using switches or transforn~ers.
20 However, as shown in FIG. 11, the combining function can be realized at the connection point
that connects by wiring the outputs of switched-mode power amplifiers A and B under specific
conditions.
[0084]
The above-described specific conditions are that, at the time that switched-mode power
25 amplifier A is operatingj switched-mode power amplifier B be completely trrrned OFF, and the
impedance Zlow, when viewing the switched-mode power amplifier-B side from the connection
point, be sufficiently great (for example, Zlow is equal to or greater than 100 times the
impedance ZL when viewing the filter-70 and load-80 side from the connection point), and
moreover, that, at the time switched-mode power amplifier B is operating, switched-mode
30 power amplifier A be completely turned OFF, and impedance Zhigh, when viewing the
switched-mode power amplifier-A side from the connection point, be sufficiently great (for
example, Zhigh is equal to or greater than 100 times impedance ZL when viewing the filter-70
and load-80 side from the connection point). An additional condition is that the switching
frequency of the switching device of the output stage be sufficiently small (for example,
assuming that the output capacity of the switching device is C and that the output capacity of
the switching device is Fsw, 1/(2 * Fsw * C) is equal to or greater than 100 times ZL).
[OOSS]
Combining 60 shown in FIG. 11 realizes the DC-cutting function by means of capacitors
5 that are provided with each of switched-mode power amplifiers A and B.
[0086]
In the present exemplary embodiment as described hereinabove, branching unit 10
branches the RF input signal into a large-amplitude component and a small-amplitude
component according to the threshold value voltage Vth, switched-mode power amplifier A
10 amplifies the signal of the large-amplitude component, switched-mode power amplifier B
amplifies the signal of the small-amplitude component, and combiner 60 combines the signals
supplied from switched-mode power amplifiers A and B.
[0087]
Switched-mode power amplifier B for small amplitude amplifies the signal of the
15 small-amplitude component that was branched by branching unit 10, and large amplitude is not
required for ONIOFF of the switching device of the final stage. As a result, ONIOFF is possible
by the small-amplitude signal that is supplied from pulse-width modulator 30-B, and because
+L -..- ' .- - .- -- 1 r .. .-..--.1::. - -. - J.,! ---..
LIICIC is 11u 11t;t;u 101 ~ I U V I U I IaI ~u r~vera. iiiplifiei- iii the stage foliowiiig pulse-width rrloduiaior
30-B, the power consumption of a driver amplifier does not occur.
20 [0088]
On the other hand, switched-mode power amplifier A for large amplitude amplifies the
signal of the large-amplitude component that was branched by branching unit 10, whereby,
from the standpoint of the above-described withstand voltage, a p-channel FET cannot be used
in the switching device of the final stage and an n-channel FET must be used, with the result
25 that power consumption during amplification becomes great.
[0089]
However, as will be explained hereinbelow, a power amplifier for a base station of a
wireless comn~unication system typically operates at small amplitude for a longer time than it
operates at large amplitude, and the time of operation of switched-mode power amplifier A for
30 large amplitude is therefore short and switched-mode power amplifier B for small amplitude
that does not require a driver aniplifier operates nearly all the time.
[0090]
Accordingly, the effect can be realized in which, for the power amplifier taken as a whole,
the average power consunlption can be reduced.
[009 I]
The above-described effect is next described with reference to FIG. 12.
[0092]
Referring to FIG. 12, the amplitude of the input signal that is applied to the power
5 amplifier is proportional to the amount of traffic of the wireless commuilication system. In
addition, the amount of traffic of the wireless communication system is not fixed but increases
and decreases greatly even over the course of a day.
[0093]
In addition, system design of wireless communication systems is implemented such that
10 the amplitude of the input signal to a power amplifier has a margin for the maximum input
amplitude so that communication can be maintained even when the amount of traffic on
weekdays reaches a maximum.
100941
As a result, the power amplifier operates at large amplitude for short time periods and
15 operates at small amplitude nearly all the timc.
[0095]
Accordingly, the effect is realized in which the power amplifier of the present exemplary
cmbodimciit, when coiisideriiig ilie entire pvwer arnpiifier, is able io achieve a reduction of the
average power consumption while maintaining the withstand voltage across the drain and
20 source.
[0096]
(2) Second Exemplary Embodiment
Referring to FIG. 13, the power amplifier of the present exemplary embodiment differs
from the first exemplary embodiment shown in FIG. 4 with regard to the configuration of
25 switched-mode power amplifier B for low amplitude.
[0097]
In other words, switched-mode power amplifier B of the present exemplary embodiment
differs from the first exemplary embodiment in that amplifiers (driver amplifiers) 40-B 1,
40-B2, and power supply 4 1 -B 1 and 4 1 -B2 are provided, n-channel FET 52-B 1 is provided as
30 the switching device of the final stage of the high side, and pulse-width modulator 30-B
supplies complementary signals.
[0098]
Switched-mode power amplifier B of the present exemplary embodiment does not use a
p-channel FET as the switching device of the final stage of the high side and therefore requires
amplifier 40-B 1.
[0099]
However, in this case as well, large amplitude is not required for the ONIOFF of the
switching device of the final stage, and the output amplitude of amplifier 40-B 1 can therefore
5 be small (Vh = +2V, and Vl = -6 V), and the power consumption of amplifier 40-B 1 can also
be reduced. More specifically, the power consumption Pdc of aniplifier 40-B 1 is approximately
11 [W] if V1 = +2 V, V2 = -6 V, and load resistance RL = 3 L2 in Equation (2).
[O 1 001
In the present exemplary embodiment, the delay amounts of amplifiers 40-A1 and 40-A2
10 of switched-mode power amplifier A and amplifiers 40-B1 and 40-B2 of switched-mode power
amplifier B are preferably made identical to each other and the delay amounts of
switched-mode power amplifier A and switched-mode power amplifier B are preferably
matched. This case has the advantage of eliminating the need for delay circuit 20.
[OlOl]
15 Although the present invention has been described with reference to exemplary
embodiments, the present invention is not limited to the above-described exemplary
embodiments. The configuration and details of the present invention are open to various
inodif:Ica~ioiis within tlie scope of the inveiiiion that -will be c-ezr to one of ordiiiai-ji s'Ki;l
in the art.
20 [0102]
For example, in the above-described exemplary embodiments, delay circuit 20 is provided
in a stage preceding pulse-width modulator 30-B in switched-mode power amplifier B, but the
position of delay circuit 20 is not limited to this form. For example, delay circuit 20 may be
provided in a stage that follows pulse-width modulator 30-B or in a stage that precedes or
25 follows the switching device.
[0 1031.
In addition, although the RF input signal is branched into two amplitude components by
one threshold value voltage, and although two stages of switched-mode power amplifiers A and
B are provided in the above-described exemplary embodiments, the present invention is not
30 limited to this form. The present invention should be of a configuration in which RF input
signals are branched into N amplitude components by means of N-l (where N is a natural
number equal to or greater than 2) threshold value voltages and in which N stages of
switched-mode power amplifiers are provided.
[0 1 041
Still fusther, n-channel FET 50-A2 on the low side of switched-mode power amplifier A is
connected to ground and n-channel FET 50-B2 on the low side of switched-mode power
amplifier B is connected to power supply 5 1 -B2 in the above-described exemplary
embodimetlts, but the present invention is not limited to this form. In the present invention, the
5 switching devices on the low sides of switched-mode power anlplifiers A and B may be
connected to either a power supply or ground.
[0 1051
This application claims the benefits of priority based on Japanese Patent Application No.
20 1 1-28 13 53 for which application was submitted on December 22, 20 1 1 and incorporates by
10 citation all of the disclosures of that application.
Claims
What is claimed is:
1. A power amplifier comprising:
a branching unit that, according to amplitude of an input signal, branches the input
5 signal into signals of a plurality of amplitude components;
a plurality of switched-mode power a~nplifiersth at each amplify a signal of said
plurality of amplitude components that were branched by said branching unit; and
a combiner that combines the signals that were amplified by each of said plurality of
switched-mode power amplifiers.
10
2. The power anlplifier as set forth in claim 1, wherein:
said branching unit compares the amplitude of said input signal with a threshold value
voltage and branches said input signal into a signal of a large-amplitude component that is
equal to or greater than said threshold value voltage and a signal of a small-amplitude
15 colnponent that is smaller than said threshold value voltage; and
said plurality of switched-mode power amplifiers is made up of two switched-mode power
amplifiers: a first switched-mode power amplifier that amplifies said signal of said
large-amplihde ~ ~ i i i p ~ iain~d iai stc coiid switched-mode power aixplifier that amplifies said
signal of said small-amplitude component.
20
3. The power amplifier as set forth in claim 2, wherein:
said first switched-mode power amplifier includes:
a first switching device that is provided in the final stage of a high side and that is
connected to a first power supply;
25 a second switching device that is provided in the final stage of a low side and that is
connected to a second power supply or ground;
a first pulse-width modulator that performs pulse width modulation of said signal of said
large-amplitude con~ponenta; nd
a first driver amplifier that amplifies the signal supplied from said first pulse-width
30 modulator;
wherein said signal of said large-amplitude component is amplified by turning ON one of
said first and second switching devices and turning OFF the other according to the signal that is
supplied from said first driver amplifier; and
said second switched-mode power amplifier includes:
a third switching device that is provided in the final stage of a high side and that is
connected to a third power supply;
a fourth switching device that is provided in the final stage of a low side and that is
connected to a fourth power supply or ground; and
5 a second pulse-width modulator that performs pulse width modulation of said signal of
said small-amplitudc component;
wherein said signal of said small-amplitude component is amplified by turning ON one of
said third and fourth switching devices and turning OFF the other according to the signal that is
supplied from said second pulse-width modulator.
10
4. The power amplifier as set forth in claim 3, wherein:
said first, second, and fourth switching devices are n-channel FETs;
said third switching device is a p-channel FET; and
said second switched-mode power amplifier further comprises a delay circuit that delays
15 said signal of said small-amplitude component by the delay amount of said first driver
amplifier.
5. Thz powcr alliplifier as set f8i"Lh in claim 3, whereiii:
said first, second, third, and fourth switching devices are n-channel FETs;
20 said second switched-mode power amplifier further comprises a second driver amplifier
that is arranged between said second pulse-width modulator and said third and fourth switching
devices and that amplifies the signal supplied from said second pulse-width modulator; and
the delay amounts of said first driver amplifier and said second driver amplifier are
identical.
25
6. The power amplifier as set forth in any one of claims 2 to 5, wherein said branching unit
comprises:
a coupler that extracts a portion of said input signal;
an envelope detector that detects the envelope of the input signal that was extracted by
30 said coupler;
a comparator that compares the envelope that was detected by said envelope detector with
said threshold value voltage and that supplies a first control signal if said envelope is equal to or
greater than said threshold value voltage and a second control signal if said envelope is less
than said threshold value voltage;
a delay circuit that delays said input signal by the delay amount of said envelope detector
and said comparator; and
a switch that, when said first control signal is supplied froin said comparator, branches
said input signal that was delayed in said delay circuit to said first switched-mode power
5 amplifier, and when said second control signal is supplied from said comparator, branches said
input signal that was delayed in said delay circuit to said second switched-mode power
amplifier.
7. The power amplifier as set forth in any one of claims 2 to 6, further comprising:
an average power detector that detects the average power of said input signal;
a voltage controller that determines said threshold value voltage based on average power
that is detected in said average power detector; and
a threshold value voltage generator that generates said threshold value voltage that was
determined in said voltage controller and supplies said threshold value voltage to said
branching unit.
15 8. A power amplification method realized by a power amplifier comprising:
a branching step of, according to the amplitude of an input signal, branching the input
signal into signals of a plurality of amplitude components;
ar, zimp!ification step of arnplifjring, by a plurality of switched-mode power aiiiplifiei-s,
each of signals of said plurality of amplitude components that were branched; and
a combining step of combining signals that were amplified by each of said plurality of
switched-mode power amplifiers.
9. The power amplification method as set forth in claim 8, wherein:
in said branching step, the amplitude of said input signal is compared with a threshold
value voltage and said input signal is branched into two branches: a signal of a large-amplitude
25 component that is equal to or greater than said threshold value voltage and a signal of a
small-amplitude con~ponentth at is less than said threshold value voltage; and
said plurality of switched-mode power amplifiers is made up of two switched-mode power
amplifiers: a first switched-mode power amplifier that amplifies said signal of said
large-amplitude component and a second switched-mode power amplifier that amplifies said
30 signal of said spall-amplitude component.